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7619939 |
Semiconductor storage apparatus
A cell array selection circuit, a cell array bit line precharge circuit, and a sense amplifier bit line precharge circuit are provided in a semiconductor storage apparatus. In a standby state of...
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7619928 |
Semiconductor memory device including floating body memory cells and method of operating the same
A semiconductor memory device includes first and second memory cells having floating bodies, each of which includes a gate connected to a word line and an electrode connected to a common source...
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7616513 |
Memory device, current sense amplifier, and method of operating the same
A memory device, current sense amplifier and method of operating the same are disclosed herein. In accordance with one embodiment, the current sense amplifier circuit may include a pair of...
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7616510 |
Dynamic semiconductor storage device and method for operating same
The object of the present invention is to provide a DRAM, in which the operation speed for a sense amplifier can be increased. Bit line precharging circuits PCt and PCb are arranged to precharge...
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7613853 |
Output buffer circuit capable of synchronous and asynchronous data buffering using sensing circuit, and method and system of same
An improved output buffer having single ended as well as differential signaling capabilities, providing symmetrical outputs for differential output configurations for both synchronous and...
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7613059 |
Semiconductor memory device and method for driving the same
A semiconductor memory device can stabilize a voltage level of a normal driving voltage terminal in a normal driving operation, which is performed after an overdriving operation, even when an...
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7613057 |
Circuit and method for a sense amplifier
A circuit and method for providing a sense amplifier for a DRAM memory with reduced distortion in a control signal, the sense amplifier particularly useful for embedding DRAM memory with other...
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7613047 |
Efficient circuit and method to measure resistance thresholds
The embodiments of the invention provide an apparatus, method, etc. for an efficient circuit and method to measure resistance. A sense line driver for an integrated circuit memory is provided,...
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7613024 |
Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells
A DRAM array includes for each column a pair of complimentary digit lines that are coupled to a sense amplifier. Each of the global digit lines is selectively coupled to a plurality of local digit...
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7609573 |
Embedded memory databus architecture
A dynamic random access memory (DRAM) having pairs of bitlines, each pair being connected to a first bit line sense amplifier, wordlines crossing the bitlines pairs forming an array, charge storage...
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7606097 |
Array sense amplifiers, memory devices and systems including same, and methods of operation
A sense amplifier having an amplifier stage with decreased gain is described. The sense amplifier includes a first input/output (“I/O”) node and a second complementary I/O node. The sense...
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7606094 |
Semiconductor memory device and control method thereof
A semiconductor memory device of the invention has memory cells arranged at intersections of bit lines and word lines, and comprises a sense amplifier for amplifying a minute potential difference...
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7606087 |
Semiconductor memory device and over driving method thereof
A semiconductor memory device may include a power line, an over driver, and/or an internal voltage driver. The power line may be connected to at least one sense amplifier. The at least one sense...
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7602657 |
Semiconductor memory device having floating body cell
A semiconductor memory device includes a sense amplifier for the FBC, a first node and a second node can be disconnected from each other by a first isolation transistor. A third node and a fourth...
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7602653 |
Multimode data buffer and method for controlling propagation delay time
A data buffer, such as a data strobe input buffer or a data input buffer, which may operate in multiple modes, such as a single mode (SM) and a dual mode (DM) and where the mode is selected by...
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7599238 |
Semiconductor memory device and driving method thereof
A semiconductor memory device, for performing a writing operation faster without expanding a driver for the writing operation, includes a bit line sense amplifier (BLSA) for sensing and amplifying...
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7596044 |
Semiconductor memory device having sense amplifier operable as a semi-latch type and a full-latch type based on timing and data sensing method thereof
A semiconductor memory device includes a memory cell array having memory cells arranged in rows and columns, a row decoder selecting one of the rows and activating the selected row, a bit-line...
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7596039 |
Input-output line sense amplifier having adjustable output drive capability
An input-output line sense amplifier configured to drive input data signals over an input-output signal line to an output driver circuit, the input-output line sense amplifier having an output...
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7593277 |
Method for compensated sensing in non-volatile memory
One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and...
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7590019 |
Low voltage data path and current sense amplifier
Methods, circuits, devices, and systems are provided, including a low voltage data path and current sense amplifier. One data path includes a local input/output (LIO) line and a global input/output...
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7590018 |
Sense amp circuit, and semiconductor memory device using the same
A differential input circuit receives differential input signals at a pair of differential input terminals and produces a pair of first differential output signals. A sensing circuit senses at...
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7590010 |
Data output circuit in semiconductor memory device
A data output circuit includes a sense amplifier and first and second latches. The sense amplifier is for amplifying differential data to generate amplified differential data. The first latch is...
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7586798 |
Write circuit of memory device
A write circuit of a semiconductor memory device includes a global data input/output (I/O) line; an amplifying block for receiving and amplifying write data and transmitting the amplified write...
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7583550 |
Semiconductor memory device
In a sense amplifier circuit having a plurality of sense amplifier portions arranged in order, each of the sense amplifier portions includes a transistor that supplies a bit line potential to a bit...
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7583549 |
Memory output circuit and method thereof
An output circuit of a memory is provided. The output circuit includes a first pre-charge circuit, a multiplexer, and a sense amplifier. The first pre-charge circuit pre-charges the voltage of a...
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7583548 |
Semiconductor memory apparatus for allocating different read/write operating time to every bank
A semiconductor memory apparatus includes an active signal generation unit that generates a plurality of active signals having different enable timings in response to a refresh signal, a precharge...
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7583547 |
Over-driving circuit in semiconductor memory device
A semiconductor memory over-driving scheme for a semiconductor memory device makes it possible to secure a high-speed sensing operation of a memory sense amplifier, regardless of a change of a...
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7580313 |
Semiconductor memory device for reducing cell area
A semiconductor memory device with a reduced cell area and a high-speed data transfer by modifying a circuit layout. The semiconductor memory device includes: a cell area with a first and a second...
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7580297 |
Readout of multi-level storage cells
A multi-level sensing scheme compares the state of a multi-level storage cell with monotonously changing reference states, which are associated to different information values. That particular...
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7577043 |
Voltage regulator for semiconductor memory
A voltage regulator in a semiconductor memory has: a comparing unit including first and second bias current sources, for comparing an output voltage with first and second reference voltages under...
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7577025 |
Semiconductor memory device comprising floating body memory cells and related methods of operation
A semiconductor device comprising floating body memory cells performs read and write operations by selectively connecting bit lines and inverted bit lines to sense bit lines and inverted sense bit...
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7573768 |
Low voltage semiconductor memory device
A semiconductor memory device having a cell array area for reading or storing data, including: a normal cell block including a plurality of normal cells, each being coupled to one of a bit line and...
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7573767 |
Semiconductor memory device
A semiconductor memory device of the invention comprises unit blocks into which the memory cell array is divided, rows of sense amplifiers arranged at one end and the other end of the plurality of...
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7573756 |
Sense amplifiers and semiconductor memory devices for reducing power consumption and methods for operating the same
In a sense amplifier, a current amplifier outputs a first and a second voltage signal in response to a first control signal. The first and second voltage signals are output based on a detected...
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7573755 |
Data amplifying circuit for semiconductor integrated circuit
A data amplifying circuit for a semiconductor integrated circuit including a controller configured to generate a control signal for adjusting an amplification step in response to a test signal, and...
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7570531 |
Semiconductor memory device and method of controlling timing
In a semiconductor memory device, in addition to a sense amplifier connected to bit lines of a memory cell array having a plurality of memory cells in a disconnectable manner, the sense amplifier...
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7570507 |
Quasi-differential read operation
A memory device includes an array portion of resistive memory cells comprising a plurality of bit line pairs. The device further includes a read circuit operably associated with a first charged...
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7567477 |
Bias sensing in sense amplifiers through a voltage-coupling/decoupling device
Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices...
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7567465 |
Power saving sensing scheme for solid state memory
Methods and apparatus are disclosed, such as those involving a solid state memory device. One such method includes selecting a plurality of memory cells in a memory array. States of a plurality of...
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7564729 |
Differential and hierarchical sensing for memory circuits
A memory circuit includes multiple word lines, multiple pairs of complementary bank bit lines, multiple block select lines, and multiple of block circuits. Each of the block circuits includes a...
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7564271 |
Sense amplifier and electronic apparatus using the same
A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying...
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7561486 |
Flash memory devices with flash fuse cell arrays
A flash memory device includes a flash cell array, a first flash fuse cell fusing circuit, a second flash fuse cell fusing circuit, a third flash fuse cell fusing circuit and a plurality of fuse...
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7561484 |
Reference-free sampled sensing
Systems and methods for extending the usable lifetime of memory cells by utilizing reference-free sampled sensing. A stimulus component applies a plurality of different stimuli to a plurality of...
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7561479 |
Semiconductor memory device having a develop reference voltage generator for sense amplifiers
I describe and claim a device and method for generating develop voltage signals. The device includes a sense amplifier to sense a voltage difference between a plurality of bit lines responsive to a...
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7558140 |
Method for using a spatially distributed amplifier circuit
An exemplary amplifier circuit includes a first group of spatially distributed final amplifier stages having a first configuration, and a second group of spatially distributed final amplifier...
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7558137 |
Semiconductor memory and testing method of same
Column switches are disposed for sense amplifiers respectively and are selectively turned on according to a column address to connect the sense amplifiers to a common data line. A sense amplifier...
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7558125 |
Input buffer and method with AC positive feedback, and a memory device and computer system using same
An input buffer having a comparator that receives an input signal, a reference signal and a positive feedback. The comparator compares the input signal relative to the reference signal and...
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7558098 |
Ferroelectric memory with sub bit-lines connected to each other and to fixed potentials
A memory capable of suppressing increase of a chip area thereof while preventing nonselected subarrays from disturbance is obtained. This memory comprises a first transistor for connecting...
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7554870 |
DRAM with reduced power consumption
In one embodiment, a dynamic random access memory (DRAM) is provided that includes: a plurality of rows of memory cells, each of the memory cell rows being arranged into columns, wherein each of...
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7554869 |
Semiconductor memory device having internal circuits responsive to temperature data and method thereof
A semiconductor memory device having internal circuits responsive to temperature data, in order to compensate an output characteristic change of the internal circuits and reduce power consumption...
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