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8649211 Memory bit redundant vias  
An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant...
8649235 Semiconductor memory device and operating method thereof  
A semiconductor memory device includes an enable fuse unit configured to generate a repair enable signal corresponding to a cutting state of an enable fuse after a power-up operation starts, and...
8644104 Memory system components that support error detection and correction  
A memory system that includes a memory device and a memory bank. During operation, the memory device receives a request to concurrently access a data word at a first row in a first storage region...
8644097 Memory device  
A memory device has: a plurality of memory cell blocks, the memory cell block including a plurality of memory cells, a redundancy memory cell, and a selector switching a defective memory cell...
8644086 Semiconductor device having optical fuse and electrical fuse  
A semiconductor device includes a plurality of first chips, a second chip that controls the first chips, and internal wiring that connects the first chips and the second chip. The first chips each...
8638625 Semiconductor device having redundant bit line provided to replace defective bit line  
Disclosed herein is a device that responds to mat selection information, which is used to select one of memory mats, and selects at least one defective address from a plurality of defective...
8638631 Semiconductor device  
A semiconductor device has an antifuse element and a measurement unit. The antifuse element stores information according to whether the antifuse element is in the broken or unbroken state. The...
8638596 Non-volatile memory saving cell information in a non-volatile memory array  
Systems and methods for saving repair cell address information in a non-volatile magnetoresistive random access memory (MRAM) having an array of MRAM cells are disclosed. A memory access circuit...
8634263 Integrated circuit having memory repair information storage and method therefor  
A storage unit on an integrated circuit stores information that identifies a circuit on the integrated circuit, a selected operating condition, and a required operating configuration for the...
8634261 Semiconductor memory device and method of operating the same  
A semiconductor memory device includes an address controller for storing fail column addresses and sequentially outputting the fail column addresses while a first control signal is activated and a...
8634262 Word line driving signal control circuit, semiconductor memory apparatus having the same, and word line driving method  
A word line driving signal control circuit of a semiconductor memory apparatus provided with a sub-redundancy cell array includes a fuse unit configured to generate a redundancy enable signal in...
8634240 Non-volatile memory and method with accelerated post-write read to manage errors  
Data errors in non-volatile memory inevitably increase with usage and with higher density of bits stored per cell. The memory is configured to have a first portion operating with less error but of...
8634260 Semiconductor device and control method therefor  
A semiconductor device includes a first and a second ROMs; and a first control circuit having an input node and sets a first and a second addresses that are different each other to be respectively...
8630138 Memory system including semicondutor memory for decoupling bad memory block from sense amplifier in standby period  
Each memory block has a plurality of memory cells, and word lines and bit lines connected to the memory cells. Precharge switches connect the bit lines to a precharge line. A switch control...
8627177 Retrieving data from a dispersed storage network in accordance with a retrieval threshold  
A method begins with a processing module determining a retrieval threshold for retrieving a set of encoded data slices from a dispersed storage network (DSN). The set of encoded data slices...
8625355 Semiconductor memory device and method of operating the same  
A semiconductor memory device operate during a program verification operation to apply a read voltage to a word line and a pre-charge voltage to a bit line in order to provide output data. A...
8619481 Switched interface stacked-die memory architecture  
Systems and methods disclosed herein include those that may receive a memory request including a requested memory address and may send the memory request directly to an address decoder associated...
8615688 Method and system for iteratively testing and repairing an array of memory cells  
A memory system includes an array of memory cells and a repair module. Multiple memory cells in the array are redundant to other memory cells in the array. The repair module iteratively tests the...
8614907 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
 
A controller, includes a plurality of external terminals configured to supply a command and an address to a semiconductor memory device, communicate a data with the semiconductor memory device,...
8614926 Memory apparatus and associated method  
A memory apparatus includes a plurality of first bit columns for constructing a common memory space and at least one reserve second bit column. A column address of a damaged first bit column is...
8614925 Semiconductor memory device having a redundancy area  
Provided is a semiconductor memory device. The semiconductor memory includes a main area and a redundancy area. The main area includes a plurality of memory blocks sharing a write bit line and a...
8611465 Digital receiver for reactive radio  
A digital receiver is disclosed. In one aspect, the receiver includes a receiving module for receiving packetized data. The receive may further include a first processing module for packet...
8605475 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
 
A system, includes a controller including a plurality of first external terminals configured to supply a command, a clock signal and an address, and communicate a data, and communicate a strobe...
8605474 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
 
A semiconductor memory device, includes a clock terminal provided to receive a clock signal, a data terminal provided to transfer a data therethrough in synchronization with the clock signal, a...
8605484 Self-repairing memristor and method  
A self-repairing memristor and methods of operating a memristor, and repairing a memristor, employ thermal annealing. The thermal annealing removes a short circuit in an oxide layer, of the...
8605512 Nonvolatile semiconductor memory device and method of operating a nonvolatile memory device  
A nonvolatile memory device includes a memory cell array including a plurality of bitlines, a plurality of wordlines, and a plurality of memory cells. The memory device further includes a...
8605520 Replaceable, precise-tracking reference lines for memory products  
Systems and methods to improve reliability of sensing operations of semiconductor memory arrays requiring reading references such as MRAM or any type of phase change memory (PCM), and to improve...
8605527 Mechanisms for built-in self test and repair for memory devices  
Mechanisms for self-testing and self-repairing memories are efficient in testing and repairing failed memory cells. The self-test-repair mechanisms are based on self-test results of failed bit map...
8605525 System and method for testing for defects in a semiconductor memory array  
A system and method for testing semiconductor memory devices includes a variable voltage input to a memory cell control gate. The voltage to the control gate can be varied from a voltage level...
8605473 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system
 
A system, includes a controller comprising a plurality of first external terminals configured to supply a command and an address, and communicate a data, and communicate a strobe signal related to...
8599606 Memory bit repair scheme  
A memory device for providing memory bit repair. The memory device may include memory cells. Each of the memory cells may include a measurable characteristic that identifies a stored data value....
8599635 Fuse circuit and semiconductor memory device including the same  
A fuse circuit includes a program unit, a sensing unit and a control unit. The program unit is programmed in response to a program signal, and outputs a program output signal in response to a...
8599630 Semiconductor integrated circuit including column redundancy fuse block  
A semiconductor integrated circuit includes a column redundancy fuse block having a fuse set array having a plurality of fuse sets including a plurality of column address fuses, and a fuse blowing...
8599613 Nonvolatile semiconductor memory  
According to one embodiment, a nonvolatile semiconductor memory includes a memory cell array including memory cells of a first unit in which read and write are parallelly performed, n (n is a...
8599632 Semiconductor integrated circuit  
The built-in self-test (BIST) circuit includes an address generating circuit. The BIST circuit includes a data generating circuit. The BIST circuit includes a chip enable signal generating...
8593855 Semiconductor memory device  
In a semiconductor memory device using a variable resistive element made of a metal oxide for storing information, a voltage amplitude of a writing voltage pulse for changing the variable...
8593866 Systems and methods for operating multi-bank nonvolatile memory  
A non-volatile memory system that has multiple memory banks initially assigns logical addresses to memory banks according to an assignment scheme, maintains this assignment for a period of time,...
8593894 Semiconductor memory device having fuse elements programmed by irradiation with laser beam  
A relief-address control unit of a semiconductor memory device includes a fuse storage unit and a relief circuit. The fuse storage unit includes a plurality of fuse elements that are made...
8588016 Semiconductor memory device and method for fabricating the same  
A semiconductor memory device includes: a plurality of mats; a plurality of sense amplifier regions disposed on a side of the plurality of mats; and a plurality of main bit lines overlapping with...
8588017 Memory circuits, systems, and modules for performing DRAM refresh operations and methods of operating the same  
A memory module can include a plurality of dynamic memory devices that each can include a dynamic memory cell array with respective regions therein, where the plurality of dynamic memory devices...
8587978 Nonvolatile memory apparatus, repair circuit for the same, and method for reading code addressable memory data  
A nonvolatile memory apparatus includes: a memory cell array including a plurality of planes and configured to store a plurality of code addressable memory (CAM) data in independent planes. A...
8581755 Multiple word data bus inversion  
A data encoding scheme for transmission of data from one circuit to another circuit considers the Hamming Weight of combined multiple words to determine whether to invert or not invert an...
8582337 Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system  
A system, includes a controller including a plurality of first external terminals configured to supply a command, a clock signal and an address, and communicate a data, and communicate a strobe...
8582339 System including memory stacks  
Large capacity memory systems are constructed using stacked memory integrated circuits or chips. The stacked memory chips are constructed in such a way that eliminates problems such as signal...
8582377 Redundant memory array for replacing memory sections of main memory  
Memories and methods for replacing memory sections of a main memory array by mapping memory addresses for an entire main memory section to at least one memory section of a redundant memory array....
8576638 Non-volatile memory device and non-volatile memory system having the same  
A non-volatile memory device may include a memory cell array, a page buffer, a column decoder, a column selection circuit and a repair circuit. The memory cell array includes normal memory cells...
8570820 Selectable repair pass masking  
The present invention relates to a method and circuit for selectively repairing an embedded memory module having memory elements in an integrated circuit chip. The method includes performing a...
8570822 Semiconductor memory and semiconductor memory test method  
According to the embodiments, a read circuit is connected to the other end of the bit line for reading out data from read data storing memory cells and test data storing memory cells via the bit...
8570821 Semiconductor memory device and method for repairing the same  
A semiconductor memory device includes a latch address generation unit configured to latch row addresses to generate first and second latch addresses when at least one of memory cells coupled to...
8572445 Non-volatile memory (NVM) with imminent error prediction  
A method and system are provided for determining an imminent failure of a non-volatile memory array. The method includes: performing a first array integrity read of the memory array until an error...