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8179731 Storage devices with soft processing  
A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage...
8169842 Skew detector and semiconductor memory device using the same  
A skew detection circuit includes a data sensing block configured to sense a first data that is transferred earliest and a last data that is transferred latest among a plurality of data which are...
8159889 Solid state disk controller apparatus  
A solid state disk controller apparatus comprises a first port; a second port having a plurality of channels; a central processing unit connected to a CPU bus; a buffer memory configured to store...
8154901 Circuit providing load isolation and noise reduction  
Certain embodiments described herein include a memory module having a printed circuit board including at least one connector configured to be operatively coupled to a memory controller of a...
8111566 Optimal channel design for memory devices for providing a high-speed memory interface  
A system is provided for high-speed communication between a memory controller and a plurality of memory devices. A memory controller, and a plurality of memory devices are provided. Additionally,...
RE43162 Semiconductor memory module, electronic apparatus and method for operating thereof  
A semiconductor memory module (1) includes a circuit substrate (2), a first (100), a second (200), a third (300) and a fourth (400) rank of memory chips (3), a first register (10) and a second...
8107306 Storage devices with soft processing  
A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage...
8102724 Setting controller VREF in a memory controller and memory device interface in a communication bus  
A memory device is connected through an interface to a memory controller. The controller's reference voltage is set based on a driver's impendence of the memory device during driver training. The...
8076954 Memory control circuit, memory control method, and integrated circuit  
Each of a plurality of memories includes a terminating resistor for preventing signal reflection, and a memory control circuit includes an ODT control circuit for driving the terminating resistor...
8054702 Semiconductor memory device with signal aligning circuit  
A signal aligning circuit includes a plurality of pads receiving input signals in parallel 1 bit by 1 bit; a first transferring unit for transferring the input signals as first signals in...
8054703 Active termination circuit and method for controlling the impedance of external integrated circuit terminals  
An active termination circuit is used to set the input impedance of a plurality of input terminals. Each of the input terminals is coupled to a supply voltage through at least one PMOS transistor...
8036051 Semiconductor memory device and semiconductor memory system for compensating crosstalk  
A semiconductor memory device and a semiconductor memory system. The semiconductor memory device includes channels configured to transmit signals from a transmitter to a receiver, and a crosstalk...
8036053 Semiconductor memory device capable of suppressing a coupling effect of a test-disable transmission line  
Semiconductor device and semiconductor memory device include a plurality of internal circuits configured to perform test operations in response to their respective test mode signals and a plurality...
8036011 Memory module for improving signal integrity and computer system having the same  
A memory module includes a plurality of buses and a plurality of memory chips arranged close to each other along each of the plurality of buses. An N-th memory chip, where N is an integer, of the...
8031543 Memory chip having a complex termination  
A memory chip has a signal line and a complex impedance which is connected to the signal line for termination of the signal line. A memory having such a memory chip and a method for operating a...
8004887 Configurable digital and analog input/output interface in a memory device  
Methods and memory devices are disclosed, for example a memory device that has both an analog path and a digital path that both share the same input/output pad. One of the two paths on each pad is...
8000120 Read and match circuit for low-voltage content addressable memory  
A read, write, and match circuit for a low-voltage content addressable memory. A write circuit inputs signals for storing data in the memory cells, a read circuit retrieves the stored data from the...
7990768 Setting memory controller driver to memory device termination value in a communication bus  
A method and system are provided for coupling a DRAM and a memory controller during driver training to reduce mismatches by controlling impedances within the system environment. A memory device...
7978541 High speed interface for multi-level memory  
A solid state memory system includes a first memory chip that includes a plurality of storage elements, and a controller. Each of the plurality of storage elements have a measurable parameter that...
7948808 Data output circuit for semiconductor memory device  
The present invention relates to a semiconductor memory, and more specifically, to a data output circuit capable of differentiating global data lines in accordance to an operation mode to output...
7944726 Low power termination for memory modules  
An apparatus is provided that includes a memory controller to provide a first on-die termination (ODT) signal and a second ODT signal, a memory channel, a first memory module to couple to the...
7944763 Semiconductor memory device for preventing mal-operation induced by misrecognizing addresses/data as commands and operating method thereof  
A semiconductor memory device and an operating method thereof prevent the mal-operation of the semiconductor memory device induced by misrecognizing addresses or data as commands. The semiconductor...
7924634 Repeater of global input/output line  
A repeater of a global input/output line includes a data transmitter including first and second drivers for outputting data signals of the global input/output line through different transmission...
7894275 Methods of communicating data using inversion and related systems  
A method may be provided to communicate a plurality of groups of output data bits representing a respective plurality of groups of input data bits over a data bus with each group of output data...
7872494 Memory controller calibration  
Components of a memory controller are calibrated in a select sequence to compensate for variances in skew and signal level variations. The offset bias of the receiver of the I/O cell and the...
7864605 Apparatus for removing crosstalk in semiconductor memory device  
An apparatus for removing crosstalk in a semiconductor memory device includes pads for receiving externally provided signals, transmission lines for delivering the signals received by each of the...
7864604 Multiple address outputs for programming the memory register set differently for different DRAM devices  
A method, device, and system are disclosed. In one embodiment, the method includes programming a first On Die Termination (ODT) value into a first plurality of dynamic random access memory (DRAM)...
7835197 Integrated semiconductor memory with generation of data  
An integrated semiconductor memory with generation of data comprises a clock connection to apply a clock signal, a memory cell array with memory cells to store data of a first data record and a...
7826306 Semiconductor memory apparatus  
A semiconductor memory apparatus includes a clock generator configured to generate an internal clock signal, an asynchronous data input buffer configured to buffer a data input signal through a...
7816941 Circuit and method for controlling termination impedance  
A termination impedance control circuit is capable of controlling a dynamic ODT operation in a DDR3-level semiconductor memory device. The termination impedance control circuit includes a counter...
7817482 Memory device having data paths with multiple speeds  
A memory device has multiple bi-directional data paths. One of the multiple bi-directional data paths is configured to transfer data at one speed. Another one of the multiple bi-directional data...
7817483 Memory device having terminals for transferring multiple types of data  
A memory device includes terminals for transferring input data and output data to and from a memory array. The memory device also includes an auxiliary circuit for receiving input auxiliary...
7791958 Pseudo differential output buffer, memory chip and memory system  
An output buffer includes first and second input transistors, first and second output loads and a current source. The first and second input transistors have first current electrodes that are...
7782652 Volatile nanotube-based switching elements with multiple controls  
Nanotube-based switching elements with multiple controls and circuits made from such. A switching element includes an input node, an output node, and a nanotube channel element having at least one...
7755920 Electronic memory device  
An electronic memory device includes a bank of memories provided with a cache, a sequencer for providing physical access to said bank of memories, a physical interface for receiving high level...
7738307 Data transmission device in semiconductor memory device  
A semiconductor device is capable of minimizing data skew among respective data which are transmitted to a receiver through respective data lines. The semiconductor device includes a...
7719872 Write-once nonvolatile memory with redundancy capability  
A nonvolatile memory, such as a write-once memory, includes a memory cell array that has first memory cells and at least one second memory cell. The memory also includes a first writing circuit...
7715256 Active termination circuit and method for controlling the impedance of external integrated circuit terminals  
An active termination circuit is used to set the input impedance of a plurality of input terminals. Each of the input terminals is coupled to a supply voltage through at least one PMOS transistor...
7692983 Memory system mounted directly on board and associated method  
The invention provides an improved memory system that addresses signal degradation due to transmission line effects. The improved memory system includes a first buffer, at least one first memory...
7672179 System and method for driving a memory circuit using a pull-up resistance for inhibiting a voltage decay on a transmission line  
A system, method, and computer program product are provided for driving a memory circuit. In one embodiment, the memory circuit is driven utilizing a first resistance value in a first mode of...
7663945 Semiconductor memory with a delay circuit  
A cell core unit and its peripheral circuit are driven by a relatively low voltage power supply. A constant voltage that does not depend on the power supply voltage is provided as a boosted voltage...
7643363 Concept for testing an integrated circuit  
An integrated circuitry operable in a normal and test mode has a processing circuit, an output circuit associated with the processing circuit and a storage with a plurality of memory cells. The...
7623397 Semiconductor device  
A semiconductor device with a packaging circuit portion connected to a semiconductor chip therein. The semiconductor chip includes a plurality of pad electrodes, and the packaging circuit portion...
7619923 Apparatus for reducing leakage in global bit-line architectures  
A circuit for reducing current leakage in hierarchical bit-line architectures includes a sense amplifier having transistors, the sense amplifier coupled to bit-lines of cells in a memory array, the...
7609574 Method, apparatus and system for global shared memory using serial optical memory  
In some embodiments, a method, apparatus and system for global shared memory using serial optical memory are presented. In this regard, a memory device is introduced to circulate a signal among a...
7609575 Method, apparatus and system for N-dimensional sparse memory using serial optical memory  
In some embodiments, a method, apparatus and system for n-dimensional sparse memory using serial optical memory are presented. In this regard, a memory device is introduced to circulate a signal...
7602656 Power supply control circuit and controlling method thereof  
A power supply control circuit and a control method secure an accurate operation of a GIO in a burst data transmission having a high compression rate. The power supply control circuit of a...
7573760 Integrated circuit for sampling a sequence of data packets at a data output  
An integrated circuit comprises a sampling circuit arranged at a data output of an operating section and operated by sampling edges, data packets appearing at the data output in response to a...
7561455 Memory system using single wavelength optical transmission  
A controller converts a parallel command signal and address signal, or a parallel write data signal into a first serial signal, and outputs the converted signal as a first optical signal with a...
7554875 Bus structure, memory chip and integrated circuit  
A bus structure comprises a plurality of driver circuits, each driver circuit comprising an input for a first signal and a terminal for an output signal wherein each driver circuit is capable of...
Matches 1 - 50 out of 187 1 2 3 4 >