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7024496 Operation method of input/output pad with monitoring ability  
An I/O pad has a data transmitting circuit, a data monitoring control circuit, and a control selection circuit. The control selection circuit controls the data transmitting circuit. When it is...
7016241 Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used  
A semiconductor device of this invention includes an initialization circuit for initializing a predetermined circuit in accordance with the level of a power source voltage, and a status setting...
6996006 Semiconductor memory preventing unauthorized copying  
A memory mat is provided separately from a memory mat that is a normal memory area, and data therein cannot be read from the outside. In a page buffer, information input from the outside is stored....
6993679 System and method for inhibiting reads to non-guaranteed data in remapped portions of a storage medium  
Various embodiments of a method and system for inhibiting reads to non-guaranteed data in remapped portions of a storage medium are disclosed. In one embodiment, a method of managing a non-read...
6990026 Data processing apparatus and memory card  
A CPU locks a memory card attached to a card mount with a password by a lock/unlock processing according to an access limit application program, and unlocks the lock based on a predetermined...
6981169 Modified glitch latch for use with power saving dynamic register file structures  
In the Retirement Payload Array (RPA) of a microprocessor, the signal “READ” is logically combined with the primary clock signal “CLK” in a control circuit of a modified glitch latch such...
6975547 Flash memory devices that support efficient memory locking operations and methods of operating flash memory devices  
Flash memory devices include at least one flash memory array and an address compare circuit that is configured to indicate whether an applied row address associated with a first operation (e.g.,...
6965530 Semiconductor memory device and semiconductor memory device control method  
A semiconductor memory device wherein, in continuous data reading, a notification signal to notify whether a suspend mode is entered or not is given synchronously with data output control according...
6956786 Random access memory with optional inaccessible memory cells  
A random access memory comprises a plurality of data pads and an array of memory cells comprising a first portion of memory cells and a second portion of memory cells. The random access memory...
6956424 Timing of and minimizing external influences on digital signals  
The performance of digital signals depends to a great extent on the frequency. However, the higher the frequency, the shorter the remaining time, in which digital signals can be reliably received...
6957307 Mapping data masks in hardware by controller programming  
A memory controller or other device may be programmed with a data mask mapping scheme. A selection device within the memory controller may be set with the data mask mapping scheme between data and...
6954388 Delay locked loop control circuit  
A memory device includes delay locked loop that generates an internal signal based on an external signal. The internal signal serves a reference clock signal for most modes operations of the memory...
6948041 Permanent memory block protection in a flash memory device  
A secure command is entered into a Flash memory device. A control data word is written to the memory device to specify which blocks of memory are to be permanently secured against write and erase...
6944083 Method for detecting and preventing tampering with one-time programmable digital devices  
According to one embodiment, an apparatus for detecting and preventing tampering with a programmable digital device. The apparatus comprises a one-time programmable (OTP) memory that includes a...
6940764 Memory with a bit line block and/or a word line block for preventing reverse engineering  
A method and circuit for blocking unauthorized access to at least one memory cell in a semiconductor memory. The method includes providing a switch and/or a link which assumes an open state when...
6930925 Suspend-resume programming method for flash memory  
In a non-volatile memory, a programming cycle consists of the following phases: high voltage charging up, programming pulse, and discharge. The actual programming process only takes place in the...
6923572 Data acquisition device using radio frequency identification (RFID) system  
A sensor 2 of a data collection system 2 is designed to make, in a predetermined environment, an operation of writing output data of a sensing circuit 24 into a non-volatile memory 22 as...
6901026 Semiconductor integrated circuit equipment with asynchronous operation  
A semiconductor integrated circuit device includes a memory, /CE transition detector, address transition detector, /WE transition detector and controller. The controller includes a timeout circuit....
6888760 System and method for multiplexing data and data masking information on a data bus of a memory device  
A method and system masking data being written to a memory device having a data bus. One method includes applying masking data on the data bus, storing the masking data in the memory device,...
6885606 Synchronous semiconductor memory device with a plurality of memory banks and method of controlling the same  
A synchronous semiconductor memory device includes a plurality of memory banks which read data from memory cells and write data into the memory cells, a command decoder circuit which receives a...
6882586 Semiconductor memory device equipped with control circuit for controlling memory cell array in non-normal operation mode  
A semiconductor memory device is provided with a memory cell array including memory cells being arranged in a shape of matrix and requiring a refresh operation. In the semiconductor memory device,...
6879518 Embedded memory with security row lock protection  
A memory device having a memory array of nonvolatile memory elements also includes one or more security rows (or columns) of security bits that can be programmed to a locked status. External memory...
6856529 Cutting CAM peak power by clock regioning  
A CAM device architecture where CAM cells are divided into at least two arrays and each array is operated in a different clock domain so that at no time are the arrays simultaneously drawing...
6853595 Semiconductor memory device  
A semiconductor memory device having a plurality of pair cells including a pair of cells for storing ordinary data and auxiliary data in which the operation of one cell in a pair cell can be...
6847572 Refresh control circuit and methods of operation and control of the refresh control circuit  
A refresh operation in a PSRAM device to hidden-refresh an internal memory cell by using a refresh pulse signal may be controlled by forming a dummy duration for the refresh operation in a...
6842371 Permanent master block lock in a memory device  
A master block lock control word is written to a mini array of non-volatile fuses. The control word is recalled and decoded. A successful recall of the control word generates an indication that the...
6842391 Semiconductor memory of a dynamic random access memory (DRAM) type having a static random access memory (SRAM) interface  
A method for controlling a semiconductor memory in which mode register can be set in burst mode. To set an operation mode in burst mode, the semiconductor memory is changed first from the burst...
6839288 Latch scheme with invalid command detector  
Methods and circuits for reducing unnecessary changes to outputs of latch circuits are provided. Unnecessary changes to outputs of latch circuits may be reduced by preventing the outputs of the...
6826659 Digital data processing system  
A digital data processing system minimizes overall power consumption in a system having embedding large capacity RAMs. Power consumption is reduced by establishing sufficient set-up times when...
6826097 Nonvolatile memory device including write protected region  
A nonvolatile memory device including a write protected region, comprising a program command processor, a write protected region setting unit and a write controller. The program command processor...
6826106 Asynchronous hidden refresh of semiconductor memory  
Improved semiconductor integrated circuit random access memory (RAM) features pin-compatible replacement of SRAM devices, while providing low power and high density characteristics of DRAM devices....
6822901 Non-volatile memory circuit comprising automatic erase function  
A nonvolatile memory circuit, comprises: memory regions, which contain N (N is a plurality) of the sectors, N not being an exponentiated number of two and the sectors having the same capacity; a...
6819580 Semiconductor chip selectively providing a predetermined potential to a dead pin  
A semiconductor chip is provided, with which presence of dead pins can be easily noticed and a process for controlling the potential at dead pins can be performed easily. An input/output controller...
6813203 Semiconductor memory device and method for testing semiconductor memory device  
A semiconductor memory device for easily and accurately evaluating a device. The memory device has a first access mode and a second access mode. The memory device includes an entry signal...
6804752 Event data protection method for a flash programmable microprocessor-based control module  
A flash programmable microprocessor-based control module is operated in a manner to protect the integrity of event data stored in the programmable memory of the module while permitting authorized...
6798708 Memory controller and serial memory  
In a memory controller, a serial data including an instruction bit train with addition of a start bit, a clock signal, a chip enable signal, and a reset signal are inputted. During the active...
6795363 Refresh control method of semiconductor memory device and semiconductor memory device comprising the same control method  
There are provided a semiconductor memory device and a refresh control method thereof to realize a refresh operation without any problem for external accesses while realizing low current...
6788599 Auto precharge apparatus having autoprecharge gapless function protecting circuit in semiconductor memory device  
An auto precharge apparatus having an auto precharge gapless function protecting circuit in a semiconductor memory device which can prevent an externally-inputted illegal command from being...
6785189 Method and apparatus for improving noise immunity in a DDR SDRAM system  
In a memory controller for use with a DDR SDRAM, an apparatus improves the immunity of the controller to noise glitches on the DQS signal provided by the DDR SDRAM during READ operations. A method...
6771108 Input circuit and semiconductor integrated circuit having the input circuit  
An input circuit has an input buffer and a detection circuit. The input buffer receives an external signal and outputs an internal signal. The detection circuit detects whether or not the external...
6757853 Semiconductor memory, memory device, and memory card  
A memory apparatus packaged in one package is provided which includes first data terminals, first address terminals, a status terminal, and memory chips integrated in one semiconductor substrate,...
6731562 Power validation for memory devices on power up  
A multiple power supply connection memory that prohibits initialization until each power supply connection is powered up. Requiring all power supply connections to be powered up before...
6728122 Semiconductor memory device capable of rewriting data signal  
In DRAM, a bit line pair are connected to the respective gates of an N channel MOS transistor pair of a read gate, and a write data line pair are connected to the respective gates of an N channel...
6728136 Electronically rewritable non-volatile semiconductor memory device  
The present invention provides a non-volatile semiconductor memory device that can protect each block without increasing a memory element area, and make an access to the memory cells in hidden...
6711055 Nonvolatile semiconductor memory device of dual-operation type with data protection function  
A nonvolatile semiconductor memory device includes a plurality of banks including respective memory cell arrays independent of each other, a password storage area that is associated with one of the...
6707744 Apparatus for controlling refresh of memory device without external refresh command and method thereof  
An apparatus and method for controlling a refresh operation of a memory device capable of performing an internal refresh after a power-up sequence is completed. The apparatus an apparatus for...
6654303 Semiconductor memory device, method for controlling same, and electronic information apparatus  
A semiconductor memory device of the present invention includes: a time measurement section for measuring a critical amount of time for the memory cells to hold data; a plurality of memory circuits...
6643203 Semiconductor memory device including clock-independent sense amplifier  
A semiconductor memory device includes a memory cell array, a read control circuit, a row decoder, a column decoder, a sense amplifier, and a sense amplifier control circuit. The read control...
6643194 Write data masking for higher speed drams  
A method and apparatus for masking data written to a memory device that reduces the effective write cycle time of the memory device is disclosed. Firing of the column selects is pre-empted, thereby...
6633501 Integrated circuit and circuit configuration for supplying power to an integrated circuit  
An integrated circuit for processing security-relevant data has data output circuits and access control circuits wherein a disturbance of the power supply of the access control circuits results in...
Matches 101 - 150 out of 733 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >