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4669064 Semiconductor memory device with improved data write function  
A semiconductor memory device which has improved and flexible writing function of multi-bit data. The memory has a plurality of data access circuits operable in parallel. Each of the data access...
4665506 Memory system with write protection  
A memory apparatus including an array of storage elements connected to a plurality of addressing lines for selectively connecting a group of the storage elements to a plurality of data lines....
4653028 Radio paging receiver  
A calling signal memory device for a radio paging receiver includes nx memory cells which are arranged in n lines and x columns to constitute shift registers in the line direction and flipflops...
4648077 Video serial accessed memory with midline load  
A semiconductor memory circuit includes memory arrays (10), (12), (14) and (16). Each of the memory arrays has associated therewith shift registers (34), (36), (38) and (40). Transfer gates (54)...
4648076 Circuit having a data memory and addressing unit for reading, writing and erasing the memory  
A circuit includes a data memory having an input and non-volatile storage cells being electrically writable and erasable, a function data memory having an input, an output, and a storage cell, an...
4641280 High-density semiconductor memory device with charge-coupling memory cells  
A high-density semiconductor memory with charge-coupling memory cells is disclosed. Each CC cell includes three field effect transistors and one capacitor, which are integrated in a small area by...
4636986 Separately addressable memory arrays in a multiple array semiconductor chip  
A circuit for inhibiting data transfer to addressed memory locations in a plurality of arrays on a semiconductor chip includes an arbitration circuit (68) that distinguishes between separate...
4636990 Three state select circuit for use in a data processing system or the like  
An improved cascode current switch circuit particularly adapted for use in a data system or the like. The circuit provides a binary output, or an inhibit output under the control of a...
4631706 System for preventing the overwriting of previously optically recorded data and for reading optically recorded data during writing  
An optical file system in which a command to store data results in a write operation in the next available storage position. A single optical path is used for both reading and writing. By dividing...
4628488 Semiconductor memory device with a refresh mechanism  
A semiconductor memory device with a refresh mechanism having a plurality of memory cells integrated on a semiconductor substrate, a plurality of word lines and digit lines each connected to the...
4617650 Memory module for a programmable electronic device  
A memory module is provided for read/writing a program. The memory module is connected to a programmable device including a programmable electronic calculator, a personal computer, a computer, or a...
4599707 Byte wide EEPROM with individual write circuits and write prevention means  
An array arrangement for EEPROMS in which each memory cell has two transistors. Selection is simplified whereby in selecting a cell all of the cells in the selected row are connected to one...
4594690 Digital storage apparatus including sections exhibiting different access speeds  
A digital storage includes several sections having different time characteristics. Such sections are operated in the overlap mode and include a common address and control circuit. The fast sections...
4592018 Removable RAM package for ambulatory medical monitor  
A removable package for use primarily in an ambulatory monitoring device, such as a medical monitor includes a RAM and a power supply. The RAM package is connected to an external device via an edge...
4590552 Security bit for designating the security status of information stored in a nonvolatile memory  
A digital processing device implemented on a single semiconductor substrate includes an nonvolatile memory for the storage of data and instructions that define operations on the data. The memory is...
4580246 Write protection circuit and method for a control register  
A write protection circuit for a control register includes a first logic circuit which provides a write enable signal to the control register in response to simultaneously receiving a register...
4580248 Electronic apparatus with memory backup system  
An electronic apparatus comprising a memory and a memory backup power source for supplying power to the memory when normal power supply to the apparatus is interrupted; wherein after resumption of...
4578774 System for limiting access to non-volatile memory in electronic postage meters  
A method and associated apparatus for limiting the erasing and writing of data in the non-volatile memory (NVM) of an electronic postage meter operated under microcomputer control to predetermined...
4577292 Support circuitry for multi-port systems  
The present invention is especially directed towards an improved support circuitry for a memory array which utilizes support circuitry in a memory array such that, when an address compare occurs,...
4577295 Hybrid E.sup.2 cell and related array  
An improved MOS E 2 cell is described which includes a floating gate and a thin oxide region. Charge injected into the substrate is used to program the floating gate by hot electron injection...
4550391 Data capture window extension circuit  
A digital data capture window extension circuit utilizing a matched pair of signal detection subcircuits that are activated during alternate cycles of a master read clock. The interleaved operation...
4549101 Circuit for generating test equalization pulse  
A circuit for generating an equalization pulse for test purposes uses an equalization pulse generator which generates an equalization pulse in response to receiving one or more address transition...
4523302 Core memory with return drive scheme  
A highly efficient core memory drive system passes currents down a selected X and Y conductor and divides the currents for return through the unselected drive wires in the same X or Y dimension....
4521853 Secure microprocessor/microcomputer with secured memory  
A digital processing device fabricated on a single semiconductor substrate includes an electrically programmable memory, a random access memory, a central processing unit, all connected by an...
4520464 Transparent instruction word bus memory system  
A memory architecture for a single chip microprocessor or microcomputer in which instruction words have a greater bit length than the data words and the need exists for additional off-chip program...
4464736 In-package E.sup.2 PROM redundancy  
An E 2 PROM redundant memory element is provided whereby faulty or improperly coded ROM or E 2 PROM elements may be replaced by the user in-package. An address programming element including an E...
4453236 Memory array addressing circuitry  
An integrated circuit comprises a memory array containing a plurality of memory cells arranged in a matrix shape having rows and columns, and memory array addressing circuitry for addressing such...
4446475 Means and method for disabling access to a memory  
An integrated circuit chip having a digital memory is provided wherein direct access to at least a portion of the memory is prevented. Contact pads having coupling lines to couple the contact pads...
4439804 Protection circuit for memory programming system  
A protection circuit inhibits the generation of a write-erase signal to an E 2 PROM when the logic supply voltage falls below a predetermined threshold level. A differential-input amplifier...
4438489 Interrupt pre-processor with dynamic allocation of priority levels to requests queued in an associative CAM  
Interrupt requests of different priorities, presented by various interrupt sources (0 to 3), are transferred through control ST, in an associative storage and selection process, into preprocessing...
4412314 Semiconductor memory for use in conjunction with error detection and correction circuit  
A semiconductor dynamic memory circuit (10) includes a memory cell array (38) which includes a plurality of memory cells which are accessed through row and column lines by operation of row and...
4400801 Read/write circuit for a random access memory  
A read/write circuit for a random access memory comprises mode switching means for placing the memory into a read mode if an external read request signal is received and for placing the memory into...
4398269 MNOS Over-write protection circuitry  
Apparatus for preventing the writing of data into an MNOS memory during various time intervals, whereby the over-writing and premature fatiguing of the differential voltage separation of the memory...
4398102 Gated parallel decoder  
The decoder includes a plurality of input signal responsive transistors having their conduction paths connected in parallel between a node and a point of reference potential. These transistors,...
4387447 Column and ground select sequence in electrically programmable memory  
An electrically programmable memory array having rows and columns of floating gate type memory cells employs alternate output lines and ground lines between the columns of cells, providing a...
4314164 Computer channel access circuit for multiple input-output devices  
An access circuit for use in a computer input-output channel. Retriggerable mono-stable multivibrators are used to provide access timing periods during which an input-output device can access a...
4312048 Magnetic core memory inhibit current driver circuit  
A low cost, low power inhibit current drive circuit includes a pair of sense-inhibit conductors each inductively coupling 16K low drive memory cores and having sufficiently low resistance to permit...
4272833 Two switchable resistive element per cell memory array  
A memory array wherein each memory cell includes a resistive device which switches from a high to a low resistance state when a potential above its programmable threshold is applied and including a...
4241424 Semiconductor devices  
A novel mode of operation of an array of MNOS memory transistors is provided which employs the punch through mode of erase and enables a single transistor memory cell to be used. It being arranged...
4219883 Cache memory control system  
Block information from a main memory, which is registered in an address register, is applied to a directory. A bank address in the main memory is taken out from the respective locations defined by...
4163291 Input-output control circuit for FIFO memory  
In transmitting data between a plurality of sequentially connected FIFO type memory elements by controlling a binary coded signal a circuit element is provided in a manner to correspond to each...
4156291 Circuitry for eliminating double ram row addressing  
Word select circuitry which eliminates double RAM row addressing is used with a read-write memory system of the type employing a plurality of word select lines. Sample and latch devices store input...
4137563 Circuitry for reducing power dissipation in equipment which operates in synchronism with clock pulses  
A minimum number of clock pulses required for keeping an electronic component in a waiting condition or state are intermittently applied to the electronic component, thereby minimizing the heat...
4125877 Dual port random access memory storage cell  
A dual port memory cell suitable for use in emitter coupled logic applications is accessible from two different address ports. The dual port storage cell includes first and second cross coupled...
4104734 Low voltage data retention bias circuitry for volatile memories  
Circuitry that senses a drop in the power supply voltage and turns off bias voltages in the proper sequence to prevent further writing into the cells of a random access memory while permitting the...
4090258 MNOS non-volatile memory with write cycle suppression  
An improved memory for storing digital data is described incorporating two variable threshold transistors per memory cell which are written in opposite directions concomitantly by applying a...
4085311 Memory device with error prevention of data during power failure  
Memory device including an input circuit adapted to provide signal pulses to be applied to an IC counter so that they are counted by the counter. Auxiliary power source is provided to supply the...
4056807 Electronically alterable diode logic circuit  
A crosspoint (X-Y) matrix array of electrically reprogrammable memory logic elements, such as an array of dual dielectric insulated gate field effect transistor (IGFET) structures, is...
4017853 Radar display system  
In a radar display system wherein radar return signals are received at a first rate and displayed at a second, usually higher rate, each radar return signal is digitized and used to update a main...
3997877 Timing control means for a magnetic domain memory  
A non-volatile digital memory is utilized to generate digital pulses for controlling memory operations of a magnetic domain memory system. Each word stored in the memory contains data corresponding...
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