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7679950 |
Integrated circuit having a switch
A reprogrammable switch includes first phase-change material, a reference element, and a sense amplifier. The sense amplifier is coupled to the first phase-change material and the reference element...
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7675781 |
Memory device, method for operating a memory device, and apparatus for use with a memory device
A memory device, including a non-volatile memory device, a method for operating a memory device, and an apparatus for use with a memory device is disclosed. In one embodiment, the memory device...
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7675790 |
Over driving pin function selection method and circuit
A novel method and circuit are disclosed for providing an alternate function to a semiconductor device having a normal operating voltage range and an input pin for receiving an input signal of a...
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7675765 |
Phase-change memory (PCM) based universal content-addressable memory (CAM) configured as binary/ternary CAM
Content-addressable memory (CAM) cells comprised of phase change material devices (PCMDs), including PCMD-based binary CAM cells (PCMD-based BCAM cells), PCMD-based ternary CAM cells (PCMD-based...
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7673195 |
Circuits and methods for characterizing device variation in electronic memory circuits
A circuit includes a comparator circuit configured such that its output toggles from a first digital logical level to a second digital logical level when its first and second inputs transition...
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7668679 |
Individual data line strobe-offset control in memory systems
Systems and methods for strobe signal timing calibration and control in strobe-based memory systems are provided below. These strobe-offset control systems and methods receive a strobe signal from...
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7660171 |
Semiconductor memory device and method for driving the same
A semiconductor memory device includes: a first count unit for counting a delayed locked loop (DLL) clock in response to a clock enable signal; a first delay unit for delaying the clock enable...
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7656730 |
Semiconductor memory device with a reference or dummy cell for testing
A semiconductor memory device includes: memory cells respectively arranged on intersecting points of a plurality of word lines and a plurality of data lines, and respectively having a capacitor for...
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7656723 |
Semiconductor memory device with hierarchical bit line structure
A semiconductor memory device has a hierarchical bit line structure. The semiconductor memory device may include first and second memory cell clusters, which share the same bit line pair and are...
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7657713 |
Memory using packet controller and memory
A memory that includes a plurality of packet pins, a synchronous memory, and a packet controller. The synchronous memory receives address and control signals in synchronization with a clock signal....
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7652932 |
Memory system having incorrupted strobe signals
A memory system circuit and method therefor are included. The circuit is adapted to detect a transition in a data timing signal from an indeterminate logic level to a selected one of a high logic...
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7652938 |
Methods and systems for generating latch clock used in memory reading
Methods and systems for generating a latch clock in memory reading. Data with a first logic level and with a second logic level are stored into a first address and a second address of a memory,...
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7652919 |
Multi-level operation in dual element cells using a supplemental programming level
The claimed subject matter provides systems and/or methods that facilitate programming and reading multi-level, multi-bit memory cells in a memory device. In multi-bit memory cells, programming one...
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7652942 |
Sense amplifier, semiconductor memory device including the same, and data sensing method
A sense amplifier includes a reference signal providing unit and an internal sense amplification unit. The reference signal providing unit provides a reference bit line signal in response to a...
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7649781 |
Bit cell reference device and methods thereof
A memory device is disclosed. A reference device of the memory includes a trimmable current source and a fixed current source. Currents provided by each source are summed to provide a reference...
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7649785 |
Flash memory device and related high voltage generating circuit
A flash memory device is disclosed and includes; a memory cell array, a high voltage generating circuit generating a high voltage applied to a selected word line to select one or more memory cells...
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7646648 |
Apparatus and method for implementing memory array device with built in computational capability
A computational memory device includes an array of memory cells arranged in rows and columns, and a pair of read word lines associated with each row of the array. The array is configured to...
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7646656 |
Semiconductor memory device
A semiconductor memory device includes: an input pad set configured to receive an external input signal and a reference voltage; an input buffer set configured to detect and transmit the input...
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7646661 |
Self-refresh control circuit for detecting current flowing from current generator and semiconductor device including same
A self-refresh control circuit includes a first constant current generating circuit that generates a constant current to change depending on the temperature, a second constant current generating...
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7643336 |
Phase change memory device
A phase change memory device comprises a cell array unit including a phase change resistance cell disposed in a region where a word line and a bit line are crossed, a sense amplifier configured to...
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7644223 |
Circuit and method for patching for program ROM
This invention discloses a system comprising a first comparator circuit configured to assert a first control signal in response to a first input number matching one of a first numbers stored...
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7643356 |
Semiconductor memory device having input device
A semiconductor memory device includes a pad for receiving an external signal through a first external pin, a reference voltage pad for receiving an external reference voltage through a second...
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7639547 |
Semiconductor memory device for independently controlling internal supply voltages and method of using the same
Provided is a semiconductor memory device and method that can control internal supply voltages independently. The semiconductor memory device includes a memory cell array, a reference voltage...
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7636263 |
Semiconductor memory having function to determine semiconductor low current
A semiconductor memory, including word lines, bit lines, memory cells provided at intersections between the word lines and bit lines, and a sense amplifier for reading out what is stored in the...
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7633816 |
Semiconductor memory device, rewrite processing method therefor, and program thereof
A comparing unit ( 12 ) in a readout control unit ( 11 ) compares one bit data stored in a memory body ( 20 ) with a value stored in a data storage unit B[m] which is prepared to store the one bit...
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7633815 |
Flexible word line boosting across VCC supply
Systems and methods for producing a boosted voltage which can be used as a boosted word line voltage for read mode operations of memory cells are disclosed. The system contains a VCC comparator, a...
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7633822 |
Circuit and method for controlling sense amplifier of a semiconductor memory apparatus
A sense amplifier control unit include: a control unit that detects a variation in the level of an external voltage and outputs a delay time selection signal on the basis of the result of the...
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7634500 |
Multiple string searching using content addressable memory
A method and apparatus for multiple string searching using a ternary content addressable memory. For one embodiment, the method includes receiving a text string having a plurality of characters and...
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7630275 |
Latency counter
A latency counter includes: a point-shift type FIFO circuit having plural latch circuits connected in parallel, each latch circuit including an input gate and an output gate, and having an internal...
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7626847 |
Memory device, motion vector detection device, and detection method
This invention relates to a memory device and the like that are preferably applied to a case where motion vector is detected using a block matching. Pixel data of a first frame (a reference frame)...
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7623394 |
High voltage generating device of semiconductor device
A high voltage generator of a semiconductor device includes a first high voltage pump unit, a second high voltage pump unit, and a clock signal generating unit. The first high voltage pump unit...
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7623405 |
SRAM with switchable power supply sets of voltages
A circuit includes a memory cell having a high voltage supply node and a low voltage supply node. Power multiplexing circuitry is included to selectively apply one of a first set of voltages and a...
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7623401 |
Semiconductor device including multi-bit memory cells and a temperature budget sensor
One embodiment provides a semiconductor device including a plurality of multi-bit memory cells, a first temperature budget sensor, and a circuit. Each of the plurality of multi-bit memory cells is...
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7623388 |
Method for detecting erroneous word lines of a memory array and device thereof
A method detects if a word line of a memory array is broken. The method includes writing a first datum to a memory cell when coupling a corresponding word line to a voltage source, writing a second...
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7623391 |
Data transfer verification systems and methods
Systems and methods are directed to verification of configuration data stored in memory cells. For example, in one embodiment, an integrated circuit such as a programmable logic device includes a...
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7623392 |
Method and system for controlling refresh to avoid memory cell data losses
A DRAM includes a register storing subsets of row addresses corresponding to rows containing at least one memory cell that is unable to store a data bit during a normal refresh cycle. Each subset...
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7619928 |
Semiconductor memory device including floating body memory cells and method of operating the same
A semiconductor memory device includes first and second memory cells having floating bodies, each of which includes a gate connected to a word line and an electrode connected to a common source...
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7619924 |
Device and method for reading out memory information
A device for reading out memory information storable in a memory has an integrator and a comparator. The memory provides, in a hold phase, a leakage current, and in a readout phase, a readout...
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7616512 |
Semiconductor memory device with hierarchical bit line structure
A semiconductor memory device has a hierarchical bit line structure. The semiconductor memory device may include first and second memory cell clusters, which share the same bit line pair and are...
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7613056 |
Semiconductor memory device
In a semiconductor memory device provided with a redundancy circuit for conducting a repair of defective memory cells, the memory cell defects which are unevenly distributed can be efficiently...
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7613050 |
Sense-amplifier assist (SAA) with power-reduction technique
A design structure comprising an apparatus which reduces the power in memory devices in general and, in particular, static random access memory (SRAM) arrays featuring sense amplifier assist (SAA)...
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7609546 |
Multivalue memory storage with two gating transistors
Digital memory devices and systems, as well as methods of operating digital memory devices, that include a multivalue memory cell with a first and a second gating transistor arranged in parallel,...
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7606054 |
Cache hit logic of cache memory and processor chip having the same
A processor chip having a cache hit logic for determining whether data required by a processor is stored in a cache memory includes a dummy cell string that operates the same as a sense amplifier...
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7602653 |
Multimode data buffer and method for controlling propagation delay time
A data buffer, such as a data strobe input buffer or a data input buffer, which may operate in multiple modes, such as a single mode (SM) and a dual mode (DM) and where the mode is selected by...
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7602663 |
Fuse cell array with redundancy features
A plurality of fuse cells are arranged in an array. One or more fuse cells include a pair of fuse devices to output a pair of voltages, respectively, wherein the pair of fuse devices are...
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7602649 |
Method of operating an integrated circuit for reading the logical state of a memory cell
In an embodiment of the invention, a method of operating an integrated circuit for reading the logical state of a selected one of a plurality of memory cells included within a memory cell string in...
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7599224 |
Systems for coarse/fine program verification in non-volatile memory using different reference levels for improved sensing
Coarse/fine programming of non-volatile memory is provided in which memory cells are programmed at a first rate of programming prior to reaching a coarse verify level for their intended state and a...
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7596045 |
Design structure for initializing reference cells of a toggle switched MRAM device
A design structure embodied in a machine readable medium used in a design process includes an apparatus for initializing a reference cell in a toggle switched MRAM device, with a first sense...
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7596052 |
Method and apparatus for reducing oscillation in synchronous circuits
Control signal oscillation filtering circuits, delay-locked loops, clock synchronization methods and devices and system incorporating control signal oscillation filtering circuits is described. An...
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7596036 |
Memory control circuit, microcomputer, and data rewriting method
A memory control circuit according to an embodiment of the present invention includes: a writable/readable memory; a comparison unit comparing write data to write in the memory with read data that...
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