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7391643 Semiconductor memory device and writing method thereof  
To provide a semiconductor memory device comprising a phase-change memory and having high compatibility with DRAM interface. The memory cell array 18 comprises a memory cell that includes a...
7388775 Detecting switching of access elements of phase change memory cells  
A memory includes a storage element (OUM) made of a phase-change material for storing a logic value and an access element (OTS) switching from a higher resistance condition to a lower resistance...
7388770 One-time programable memory with additional programming time to ensure hard breakdown of the gate insulating film  
A nonvolatile semiconductor memory device includes a storage element which is programmed with information by breaking an insulating film by application of electrical stress to the storage element,...
7388768 Semiconductor device  
Control clocks of different phases are distributed to a memory array divided into multiple banks, and processing of entries and search keys (read and write operations and search operation) is...
7385867 Memory device and operating method thereof  
A method of operating a memory device adapted for determining a program/erase state of a memory cell in the memory device. The method includes applying a drain operation voltage to a drain of the...
7382675 Semiconductor memory device  
According to an aspect of the invention, there is provided a semiconductor memory device including a first power source which generates a first power supply voltage, a second power source which...
7382673 Memory having parity generation circuit  
A memory includes a column segment including memory cells along word lines, and a parity generation circuit configured to receive a first serial data stream of data bit values stored in memory...
7382638 Matchline sense circuit and method  
A matchline sense circuit for detecting a rising voltage on a matchline of a CAM array is disclosed. The circuit initially precharges a matchline to ground before turning on a current source to...
7379380 Low power multi-chip semiconductor memory device and chip enable method thereof  
A multi-chip semiconductor device capable of selectively activating and deactivating the individual semiconductor chips of the device and a chip enable method thereof are provided. The individual...
7379365 Method and apparatus for charging large capacitances  
A method and apparatus for charging large capacitances of a circuit, such as an integrated circuit, without imparting noise on an operating voltage. A comparator compares a reference voltage to a...
7379341 Loading data with error detection in a power on sequence of flash memory device  
A method of performing a power on sequence for a flash memory includes applying device voltage to the flash memory and loading nonvolatile memory data and nonvolatile memory complementary data to a...
7376025 Method and apparatus for semiconductor device repair with reduced number of programmable elements  
An apparatus and method using a reduced number of fuses for enabling redundant memory blocks in a semiconductor memory is disclosed. In one embodiment, a redundancy selection module may be...
7376023 Semiconductor memory device with MOS transistors each having floating gate and control gate and method of controlling the same  
A semiconductor memory device includes memory cells, a memory cell array, a first voltage generating circuit, a reference voltage generating circuit, and a first voltage control circuit. Each of...
7375998 Ferroelectric random access memory circuits for guarding against operation with out-of-range voltages and methods of operating same  
A method of operating a ferroelectric random access memory (FRAM) can include reading a low-voltage FRAM monitoring memory array and preventing a read/write-back of an FRAM memory cell array if...
7372760 Semiconductor device and entry into test mode without use of unnecessary terminal  
A semiconductor device includes a first power supply terminal, a second power supply terminal, a comparison circuit coupled to the first power supply terminal and the second power supply terminal...
7372758 Semiconductor memory device, method for controlling the same, and mobile electronic device  
A memory cell array employs a memory element as a memory cell. The memory element is constructed of a gate electrode formed via a gate insulation film on a semiconductor layer, a channel region...
7372751 Using redundant memory for extra features  
Apparatus and methods are provided. A memory device has a memory array comprising primary and redundant portions. A redundancy circuit is coupled to the memory array and is coupled to receive a...
7372749 Methods for repairing and for operating a memory component  
In a method for repairing a memory component, data retention times of regular memory cells are determined. Weak regular memory cells having a data retention time that is shorter than a...
7372717 Methods for resistive memory element sensing using averaging  
A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled voltage supply, an electronic charge...
7369454 Semiconductor integrated circuit device  
A semiconductor integrated circuit device comprises several blocks including a word line connected with a memory cell, a row decoder selecting the word line, and a block decoder selecting the...
7369449 Semiconductor integrated circuit and data output method  
A semiconductor integrated circuit for reducing power consumption and simultaneous switching noise in an output circuit, which outputs plural pieces of output data including first and second output...
7369430 Adaptive algorithm for MRAM manufacturing  
Magnetic Random Access Memory (MRAM) can be programmed and read as fast as Static Random Access Memory (SRAM) and has the non-volatile characteristics of electrically eraseable programmable read...
7366860 Storage device configured to sequentially input a command  
A storage device is capable of sequentially inputting a command, which includes address information and attached information, from an information processor through an input/output unit. The storage...
7366049 Apparatus and method for updating data in a dual port memory  
A dual port memory is updated at substantially the same data sampling rate as a clock frequency of the dual port memory. The dual port memory stores data relating to each different parameter value...
7366019 Nonvolatile memory  
There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold...
7363423 Multiple match detection circuit  
Multiple matches of words in a content addressable memory are detected by identifying each match of the input word to a word in the memory, and generating a representation of a relationship OR (x i...
7362633 Parallel read for front end compression mode  
Methods and apparatus for increasing front-end testing throughput by allowing simultaneous access to multiple banks are provided. Techniques described herein take advantage of the reduced number of...
7362622 System for determining a reference level and evaluating a signal on the basis of the reference level  
A circuit exhibits a signal input, means for determining a reference level on the basis of properties of a signal received at the signal input. In addition, the circuit further exhibits means for...
7359281 Read and/or write detection system for an asynchronous memory array  
This invention provides an asynchronous electronic circuit that has an asynchronous memory circuit where the memory cells are arranged in columns and rows. The asynchronous circuit includes a read...
7355921 Device in a memory circuit for definition of waiting times  
A device for definition of the waiting time which should pass in a clock-controlled memory circuit after the start of a specific operation until a subsequent operation may be started. The device...
7352609 Voltage controlled static random access memory  
A static random access memory (SRAM) ( 200, 400 ) comprising a plurality of SRAM cells ( 204 ), a plurality of wordlines (WL 0 -WLN) and a voltage regulator ( 240, 240′, 300, 516 ) for driving...
7349283 Integrated semiconductor memory  
An integrated semiconductor memory includes a test mode control circuit and at least one voltage generator for generating an operating voltage that is fed into memory banks via interconnects....
7349269 Programmable DQS preamble  
A method and apparatus for programming a data strobe (DQS) preamble in a memory by loading a defined set of bits into one or more registers of the memory, where one or more bits are formatted...
7349231 Semiconductor memory device  
There is provided a control circuit ( 409 ) for fetching a result of a comparison of a part of bits of entry data with a corresponding bit of comparison data and prohibiting a comparison of...
7349230 Associative memory cells configured to selectively produce binary or ternary content-addressable memory lookup results  
Associative memory bit cells are disclosed for selectively producing binary or ternary content-addressable memory lookup results. Associative memory bit cells are grouped together to act as n...
RE40172 Multi-bank testing apparatus for a synchronous dram  
A multi-bank testing apparatus for a synchronous DRAM, which allows all banks of the synchronous DRAM to simultaneously carry out their write and read operations in a test mode, thereby being...
7345941 Semiconductor memory device and method of refreshing the semiconductor memory device  
When a semiconductor memory device enters a refresh mode, retention times of memory cells are measured for each word line. A plurality of refresh cycles are set in correspondence to the retention...
7345930 Write circuit of memory device  
A write circuit of a semiconductor memory device includes a global data input/output (I/O) line; an amplifying block for receiving and amplifying write data and transmitting the amplified write...
7345921 Method and system for a programming approach for a nonvolatile electronic device  
Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or...
7342836 One time programmable latch and method  
A one-time programmable (OTP) latch circuit can include a single OTP device capable of storing a logic value in a nonvolatile fashion, or only two OTP devices in the event redundancy is desired. A...
7342814 Content addressable memory with reduced search current and power  
The power required to search a content addressable memory (CAM) is substantially reduced by forming the CAM to have a number of CAM banks with a corresponding number of power switches that control...
7339810 Device and method for ensuring current consumption in search engine system  
A search engine system ( 100 ) can include a key multiplexer ( 104 ) and logic circuit ( 108 ). A key from a previous operation can be received by logic circuit ( 108 ) and altered to generate an...
7336517 Physical priority encoder  
A priority encoder can be used for a Content-Addressable Memory (CAM) device that typically has an array of CAM cells arranged in columns and rows with each row having a match signal indicative...
7334137 Memory interface systems that couple a memory to a memory controller and are responsive to a terminal voltage that is independent of supply voltages for the memory and the memory controller  
Memory interface systems include one or more channel lines that couple a memory to a memory controller such that the channel line(s) are responsive to a terminal voltage that is independent of...
7333372 Reset circuit and integrated circuit device with reset function  
A reset circuit, which generates a reset signal for initializing an internal circuit of an integrated circuit device having an auto-loading function, includes a first register which stores a...
RE40076 Program circuit  
The program circuit according to the present invention can apply a program voltage to the only memory cells which are not programmed during a re-programming operation, thus, the present invention...
RE40075 Method of multi-level storage in DRAM and apparatus thereof  
A method of processing data having one of four voltage levels stored in a DRAM cell is comprised of sensing whether or not the data voltage is above or below a voltage level midway between a...
7330383 Semiconductor device with a plurality of fuse elements and method for programming the device  
A device and method for programming the semiconductor device that includes a plurality of first fuse-sets which store first information, wherein each of the first fuse-sets includes at least one...
7330381 Method and apparatus for a continuous read command in an extended memory array  
The present invention relates to a memory on a silicon microchip, comprising a serial input/output and an integrated memory array addressable under N bits. According to the present invention, the...
7330374 Nonvolatile semiconductor memory device, such as an EEPROM or a flash memory, with reference cells  
To set a threshold of a reference cell in short time in a semiconductor memory device using a variable threshold type nonvolatile memory cell as a reference current/voltage generating unit, a...