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7391655 |
Data processing system and nonvolatile memory
Erasing is performed with respect to a nonvolatile memory cell without causing depletion halfway therethrough. A control circuit for reversibly and variably controlling the threshold voltage of the...
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7385857 |
Non-volatile, static random access memory with regulated erase saturation and program window
A system and method for regulating the erase saturation in a semiconductor memory is disclosed. More particularly, the present invention measures the under-erase and over-erase condition of all...
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7385854 |
Selective operation of a multi-state non-volatile memory system in a binary mode
A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two...
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7382663 |
Erase voltage generator circuit for providing uniform erase execution time and nonvolatile memory device having the same
An erase voltage generation circuit providing a uniform erase execution time and a non-volatile semiconductor memory device having the same, in which the erase voltage generation circuit includes a...
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7379346 |
Erase inhibit in non-volatile memories
A non-volatile memory and method for its operation that can reduce the amount of disturb in non-selected cells during an erase process are presented. For a set of storage elements formed over a...
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7379331 |
Nonvolatile semiconductor memory including redundant cell for replacing defective cell
A nonvolatile semiconductor memory includes a cell array, redundancy array, erase circuit, timer, and controller. The cell array has a plurality of memory cells. The redundancy array has a...
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7379330 |
Retargetable memory cell redundancy methods
In a memory array having redundant columns, a scheme allows defective cells to be individually remapped to redundant cells in a redundant column. Redundant cells in one redundant column replace...
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7376011 |
Method and structure for efficient data verification operation for non-volatile memories
An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with three data registers and a controller circuit. During a flash program operation, one data...
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7372741 |
Nonvolatile memory apparatus having a processor and plural memories one or more of which is a nonvolatile memory having circuitry which performs an erase operation and an erase verify operation when the processor specifies the erase operation mode to the nonvolatile memory
A nonvolatile memory apparatus which includes plural memories one of which is a nonvolatile memory such as a Flash EEPROM capable of being specified a plurality of operations from a processing unit...
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7372740 |
Semiconductor memory device
Based on a continuous erase start signal outputted, in response to an inputted continuous erase command, from a continuous erase control circuit, a shift circuit outputs a control signal for giving...
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7372739 |
High voltage generation and regulation circuit in a memory device
An auxiliary voltage generation circuit is part of a high voltage generation and regulation circuit. The auxiliary voltage generation circuit generates an auxiliary intermediate voltage that is...
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7372738 |
Flash memory device with reduced erase time
A NOR flash memory device comprises a memory cell array, a row selection circuit adapted to drive wordlines in the memory cell array with a wordline voltage during an erase operation, and an erase...
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7372733 |
Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method
A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first...
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RE40311 |
Zero-power programmable memory cell
A zero-power electrically erasable and programmable memory cell is implemented in CMOS (complementary metal oxide semiconductor) technology. A P-channel sense transistor has a source coupled to a...
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7369440 |
Method, circuit and systems for erasing one or more non-volatile memory cells
The present invention is a method, circuit and system for erasing one or more non-volatile memory (“NVM”) cells in an NVM array or array segment. According to some embodiments of the present...
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7369438 |
Combo memory design and technology for multiple-function java card, sim-card, bio-passport and bio-id card applications
A combination volatile and nonvolatile memory integrated circuit has at least one volatile memory array placed on the substrate and multiple nonvolatile memory arrays. The volatile and nonvolatile...
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7369432 |
Method for implementing a counter in a memory with increased memory efficiency
A method for implementing a counter in memory, e.g., non-volatile memory such as flash memory. A first number of first binary values indicating a first portion of a current number of the counter in...
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7366027 |
Method and apparatus for erasing memory
The present invention provides a method and apparatus for erasing memory blocks. The apparatus includes a first plurality of memory cells formed in a substrate and a second plurality of memory...
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7366020 |
Flash memory device capable of preventing an overerase of flash memory cells and erase method thereof
We describe a NAND flash memory device including a memory cell array formed on a substrate including a plurality of cell strings each including a string selecting transistor, a ground selecting...
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7359251 |
Non-volatile semiconductor memory device, erase method for same, and test method for same
A non-volatile semiconductor memory device includes a memory cell array and an operation control circuit. The memory cell array includes a plurality of non-volatile memory cells that are...
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7355897 |
Methods to resolve hard-to-erase condition in charge trapping non-volatile memory
A method for operating a nitride trapping memory cell is provided to resolve hard-to-erase condition by employing a reset technique to eliminate or reduce the number of electrons in the middle of a...
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7355896 |
System for improving endurance and data retention in memory devices
A memory system includes a memory block having at least one memory cell. The current is sensed after the erase operations of the memory cell. A signal is generated in response to the current...
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7355895 |
Nonvolatile semiconductor memory and driving method the same
A nonvolatile semiconductor memory includes a memory cell array, a control circuit and an address control circuit. In the memory cell array, a plurality of memory cells are arranged in a matrix of...
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7355892 |
Partial page fail bit detection in flash memory devices
A flash memory device, and a method of operating the same, is disclosed. The array of the flash memory device is arranged in pages of memory cells, each page having memory cells associated into...
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7352620 |
Non-volatile semiconductor device and method for automatically recovering erase failure in the device
A spare sector is in a blank state beforehand. Each time the erasing is carried out in practical use, the number of erase pulses is counted or the presence/absence of overcurrent flowing when the...
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7350044 |
Data move method and apparatus
An improved Flash memory device, control circuit, or data handling methods is described that facilitate the moving and consolidating data in split and non-split user/overhead data sector...
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7349262 |
Methods of programming silicon oxide nitride oxide semiconductor (SONOS) memory devices
A method of programming a silicon oxide nitride oxide semiconductor (SONOS) memory device is provided. The SONOS memory device includes a substrate, first and second impurity regions spaced apart...
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7349256 |
Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats
A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first...
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7349254 |
Charge-trapping memory device and methods for its manufacturing and operation
A charge-trapping memory device includes an array of non-volatile memory cells. The array has at least a first sector and a second sector. Each sector includes a multiplicity of memory cells. Each...
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7345925 |
Soft erasing methods for nonvolatile memory cells
Erasure methods for a nonvolatile memory cell that includes a gate electrode on a substrate, source and drain regions in the substrate at respective sides of the gate electrode, and a charge...
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7345922 |
Position based erase verification levels in a flash memory device
The location of a cell to be erase verified is determined. The erase verification threshold voltage is then set. The threshold voltage is changed in response to the cell's location with respect to...
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7342834 |
Data storage having injected hot carriers and erasable when selectively exposed to ambient light radiation
A data storage includes a part of functioning for, when data reading operation is carried out on a storage part storing data for a case where the data storage is handled in a predetermined manner,...
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7339835 |
Non-volatile memory structure and erase method with floating gate voltage control
Feedback between the floating gate voltage and a high erase voltage is utilized in the erase operation of a non-volatile memory (NVM) cell. Erasing stops when the floating gate voltage reaches the...
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7336539 |
Method of operating flash memory cell
A flash memory cell is provided. A deep well is disposed in a substrate and a well is disposed within the deep well. A stacked gate structure is disposed on the substrate. A source region and a...
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7327611 |
Method and apparatus for operating charge trapping nonvolatile memory
A memory cell with a charge trapping structure is operated by measuring current between the substrate region of the memory cell and at least one of the source region of the memory cell and the...
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7327609 |
Methods of program-verifying a multi-bit nonvolatile memory device and circuit thereof
Methods of verifying a program state may be provided for a non-volatile memory device including a multi-bit memory cell transistor providing more than two different program states. More...
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7324387 |
Low power high density random access memory flash cells and arrays
Low power high density random access memory flash cells and arrays using Fowler Nordheim (FN) tunneling for both programming and erasing. The memory array is divided into sectors, each sector...
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7324386 |
Reliable method for erasing a flash memory
A method for erasing a flash memory group is provided, which comprises the following steps. (a) Apply a erase (ERS) pulse to a first subset of the group. (b) Perform one of a soft program...
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7324385 |
Molecular memory
Molecular memories, i.e., memories that incorporate molecules for charge storage, are disclosed. Molecular memory cells, molecular memory arrays, and electronic devices including molecular memory...
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7324377 |
Apparatus and method for programming and erasing virtual ground EEPROM without disturbing adjacent cells
A method is described for erasing a selected data region in an NROM cell that is a member of a virtual ground NROM EEPROM array. The method provides that erasing the selected data region does not...
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7317640 |
Nonvolatile memory with erasable parts
In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively...
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7315475 |
Non-volatile semiconductor memory device
A sense amplifier has first and second input nodes. A reference memory cell is connected to the first input node. To the second input node, a constant current source circuit and a main memory cell...
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7315474 |
Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays
Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric...
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7313029 |
Method for erasing flash memories and related system thereof
A method for erasing data of a flash memory is disclosed. The flash memory includes a plurality of memory cells coupled to a word line, where each of the memory cells has a substrate, an isolated...
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7313024 |
Non-volatile memory device having page buffer for verifying pre-erase
Non-volatile memory devices have a page buffer that can verify pre-erase. A non-volatile memory device may include a cell array having a plurality of strings consisting of memory cells disposed at...
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7310270 |
Nonvolatile semiconductor memory device
A NAND cell unit includes memory cells which are connected in series. An erase operation is effected on all memory cells. Then, a soft-program voltage, which is opposite in polarity to the erase...
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7307280 |
Memory devices with active and passive doped sol-gel layers
The present memory device includes first and second electrodes, an active layer; and a passive layer, the active and passive layers being between the first and second electrodes, with at least one...
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7305513 |
Circuit for preventing nonvolatile memory from over-erase
A method for preventing the over-erase in a nonvolatile memory comprises the following steps. First, at least one normal cell of the nonvolatile memory and at least one reference cell that...
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7304893 |
Method of partial page fail bit detection in flash memory devices
A flash memory device, and a method of operating the same, is disclosed. The array of the flash memory device is arranged in pages of memory cells, each page having memory cells associated into...
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7301834 |
Semiconductor memory
A plurality of memory cell arrays Array 0 , Array 1 , Array 2 , Array 3 , Array 4 , Array 5 , Array 6 and Array 7 which can perform a parallel operation are arranged in a later generation chip....
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