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7075831 Method for erasing an NROM cell  
An operation to erase a nitride read only memory (NROM) memory block starts by erasing the memory block. An erase verify operation can then be performed to determine the success of the erase. If a...
7075828 Operation scheme with charge balancing erase for charge trapping non-volatile memory  
A method of operating a memory cell comprises applying a first procedure (typically erase) to establish a low threshold state including a first bias arrangement causing reduction in negative charge...
7072222 Nonvolatile memory system, semiconductor memory and writing method  
A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing...
7072224 Nonvolatile memory and method of erasing for nonvolatile memory  
The number of rewrites for memory cells is to be increased, and the reliability of data reading to be substantially improved. Where data in memory cells are to be erased, the switching of an erase...
7072226 Method of erasing a flash memory cell  
Methods are disclosed for erasing a flash memory cell including: (a) a semiconductor substrate, (b) a gate, (c) a source, (d) a drain, (e) a well, the gate including: (1) a tunnel oxide film, (2) a...
7072223 Asymmetric band-gap engineered nonvolatile memory device  
Systems and methods are provided for nonvolatile memory devices that incorporate a band-gap engineered gate stack with asymmetric tunnel barriers. One embodiment of a memory device includes first...
7068540 Method and device for programming an electrically programmable non-volatile semiconductor memory  
A device and method for programming an electrically programmable memory applies at least one first programming pulse to a group of memory cells (MC 1 –MCk) of the memory, accesses the memory...
7068541 Nonvolatile memory and method of erasing for nonvolatile memory  
The number of rewrites for memory cells is to be increased, and the reliability of data reading to be substantially improved. Where data in memory cells are to be erased, the switching of an erase...
7068543 Flash memory  
Flash memory supporting methods for erasing memory cells using a decrease in magnitude of a source voltage of a first polarity to increase the magnitude of a control gate voltage of a second...
7061810 Erasing flash memory without pre-programming the flash memory before erasing  
An erase operation in a flash memory device includes applying an erase pulse to memory cells of the flash memory device to convert the contents of the memory cells into logic 1 bits before any...
7061812 Memory card  
Disclosed is a memory card which ensures high-speed data writing operations. The memory card is formed of an erasable and programmable nonvolatile memory and a control circuit. A memory array of...
7062602 Method for reading data in a write-once memory device using a write-many file system  
The preferred embodiments described herein provide a method for reading data in a write-once memory device using a write-many file system. In one preferred embodiment, data traffic between a data...
7061811 Faster method of erasing flash memory  
An erase operation in a flash memory device includes applying an erase pulse to memory cells of the flash memory device to convert the contents of the memory cells into logic 1 bits before any...
7061790 Semiconductor memory device and data write method  
A semiconductor memory device including a plurality of memory cells is provided. One of the plurality of memory cells includes a variable resistor having a resistance value thereof reversibly...
7057936 Nonvolatile semiconductor memory device  
A cell array is configured by arranging a plurality of electrically writable erasable nonvolatile memory cells on a semiconductor substrate. Each of the memory cells has a charge accumulation layer...
7057935 Erase verify for non-volatile memory  
A memory device verify system determines a state of memory cells in a memory. The memory includes a memory array having a plurality of memory cells coupled to bit lines. A verify circuit is coupled...
7057938 Nonvolatile memory cell and operating method  
One embodiment of the present invention provides a system having a nonvolatile memory comprising a p type semiconductor substrate, an oxide layer over the p type semiconductor substrate, a nitride...
7057940 Flash memory cell, flash memory cell array and manufacturing method thereof  
A flash memory cell array comprises a substrate, a string of memory cell structures and source region/drain region. Each of memory cell structures includes a stack gate structure including a select...
7057928 System and method for erasing high-density non-volatile fast memory  
A system and method for erasing a high-density non-volatile fast memory is presented. In one embodiment the high-density non-volatile fast memory is a modified flash memory having modified flash...
7054194 Non-volatile SRAM cell having split-gate transistors  
This specification discloses a non-volatile static random access memory (SRAM) cell with the feature of keeping data even after the power is turned off. It includes a static random access unit and...
7053442 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device having a small layout area includes a memory cell array in which a plurality of memory cells are arranged in a row direction and a column direction. The...
7050344 Failure test method for split gate flash memory  
A failure test method of word line-bit line short circuit in a split gate flash memory is provided. A well leakage-current test is performed to identify a sector with a failed memory cell. After...
7050336 Nonvolatile semiconductor memory device having reduced erasing time  
An operation of erasing data in a memory block of a nonvolatile semiconductor memory device employs an operation of collectively applying an erase pulse to the memory block, and an operation of...
7050335 Flash memory comprising means for checking and refreshing memory cells in the erased state  
The present invention relates to a method for checking and refreshing a floating-gate transistor in the erased state, comprising the steps of applying a positive erase voltage to a control gate of...
7046552 Flash memory with enhanced program and erase coupling and process of fabricating the same  
Self-aligned split-gate flash memory cell array and process of fabrication in which erase and select gates are positioned on opposite sides of stacked floating and control gates, with source...
7046570 Programmable logic devices optionally convertible to one time programmable devices  
Programmable logic devices (PLDs) that can be repeatedly erased and reprogrammed, e.g., during the testing and/or design phases, and then converted to one-time programmable (OTP) devices on a...
7046558 Method for controlling a nonvolatile memory  
A block comprises physical addresses 0, 1, 2, 3 . In an initial state, all the physical addresses 0, 1, 2, 3 , are in an erase state. When data LA 0 , LA 1 , LA 2 , LA 3 are written in the...
7046559 Semiconductor memory device capable of erasing or writing data in one bank while reading data from another bank  
There is disclosed a semiconductor memory device including a memory cell array containing a plurality of banks each having one or more blocks, a data erase circuit configured to erase data from...
7039754 Detachably mounted removable data storage device  
A removable memory card detachably mounted to a host device. The memory card includes a non-volatile semiconductor memory in which data recorded in the memory is erased as a block of a...
7038951 Non-volatile semiconductor memory device and erasing control method thereof  
A non-volatile semiconductor memory device includes a memory cell array including a plurality of memory cells, wherein information is writable to each of the plurality of memory cells and...
7035147 Overerase protection of memory cells for nonvolatile memory  
The invention provides a nonvolatile memory and corresponding method having an optimal memory erase function and, more particularly, a method for erasing a nonvolatile memory comprising a source, a...
7035151 Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system  
Memory array architectures and operating methods suitable for super high density in the giga bits for multilevel nonvolatile memory integrated circuit system. The array architectures and operating...
7031192 Non-volatile semiconductor memory and driving method  
A data control unit is used to proved program, erase and verify signals to a non-volatile metal-oxide3-nitride-oxide-semiconductor (MONOS) memory. The data control unit comprises a plurality of...
7031195 Nonvolatile semiconductor memory having a control gate driver transistor whose gate insulator thickness is greater than that of a select gate driver transistor  
A nonvolatile semiconductor memory includes: a memory sub array including a memory cell unit configured with a memory cell transistor and a select transistor connected in series; a control gate...
7031196 Nonvolatile semiconductor memory and operating method of the memory  
A method of programming the memory cell comprises setting the memory cell to an initial state of a first gate threshold voltage, performing a processing sequence including: applying a voltage bias...
7031197 EEPROM writing and reading method  
An electrically erasable programmable read-only memory receives a single supply voltage and a ground voltage, and generates a first voltage higher than both the supply voltage and the ground...
7032064 Single chip embedded microcontroller having multiple non-volatile erasable PROMS sharing a single high voltage generator  
A single chip embedded microcontroller has a processor that communicates with multiple non-volatile erasable PROMS which may be an OTPROM and an EEPROM. The processor also communicates with a high...
7027331 Write state machine architecture for flash memory internal instructions  
A system and method for a write state machine for a non-volatile memory. The write state machine has an associated read only memory (ROM) for storing instructions for operation of the non-volatile...
7027328 Integrated circuit memory device and method  
Structures and methods for DEAPROM memory with low tunnel barrier intergate insulators are provided. The DEAPROM memory includes a first source/drain region and a second source/drain region...
7028240 Diagnostic mode for testing functionality of BIST (built-in-self-test) back-end state machine  
In a method and system for diagnosing a back-end state machine used for testing flash memory cells fabricated on a semiconductor substrate, a signal selector and a diagnostic matching logic are...
7023732 Data erasing method, and memory apparatus having data erasing circuit using such method  
The present invention is to propose an data erasing method, a memory apparatus, and a data erasing circuit which are able to reduce the time required to boost the potential of the semiconductor...
7023731 Semiconductor memory device and portable electronic apparatus  
A semiconductor memory device including: a memory cell array in which memory cells are arranged; a plurality of terminals for accepting commands issued by an external user; a command interface...
7023734 Overerase correction in flash EEPROM memory  
A method of overerase correction for memory cells in a memory array after the memory cells have been erased is provided comprising the following steps: (a) setting a gate voltage of memory cells...
7020019 System and method for destructive purge of memory device  
A memory purge system destructively purges the memory circuits of a memory device. The system includes a power supply for supplying a selectable voltage and current. Switching circuits electrically...
7020028 Nonvolatile semiconductor memory device  
An EEPROM having an erasing control circuit that performs at least the read out operation one time on the corresponding memory cells after an erasing operation is performed in connection therewith....
7020024 Methods and devices for increasing voltages on non-selected wordlines during erasure of a flash memory  
A flash memory can operate by providing a first voltage level from a row decoder to a wordline associated with a cell of a flash memory device. An address provided to the row decoder is decoded...
7012836 Nonvolatile memory and method of restoring of failure memory cell  
An electrically writable/erasable nonvolatile semiconductor memory such as an AND-type or NOR-type flash memory having an array structure, in which numerous memory cells are connected in parallel...
7009889 Comprehensive erase verification for non-volatile memory  
Systems and methods in accordance with various embodiments can provide for comprehensive erase verification and defect detection in non-volatile semiconductor memory. In one embodiment, the results...
7006385 Semiconductor storage device  
A nonvolatile memory device includes a memory cell array, a control circuit, a voltage boost circuit, a timer circuit, a discharge circuit and a sensor circuit. The control circuit generates an...
7007140 Storage device, storage device controlling method, and program  
A first storage unit is accessed randomly in a unit equal to or greater than a predetermined data unit. The first storage unit stores a target program required to be read randomly in a unit smaller...
Matches 351 - 400 out of 1338 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >