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6834012 Memory device and methods of using negative gate stress to correct over-erased memory cells  
Methods of operating dual bit flash memory devices and correcting over-erased dual bit flash memory devices are provided. The present invention includes a corrective action that employs a negative...
6834011 Structure, fabrication method and operating method for flash memory  
A flash memory structure. The structure includes device isolation regions defined on an active area of a substrate, a deep well of first conductive type, stacked gate structures, a tunneling oxide...
6831863 Array of flash memory cells and data program and erase methods of the same  
The present invention relates to an array of flash memory cells whose unit cell includes a single transistor of MONOS/SONOS structure (Metal/poly-Silicon Oxide Nitride Oxide Semiconductor) and to...
6831860 Nonvolatile semiconductor memory device  
A sector structure of a flash memory device minimizes a layout area in a chip without deteriorating a high-speed operation. The sector structure of the flash memory device includes a plurality of...
6831864 Method of erasing data of nonvolatile semiconductor memory unit  
A method of erasing data of a nonvolatile semiconductor memory unit includes the first step of collectively applying a preliminary write pulse to memory transistors, the second step of repeating,...
6829167 Error recovery for nonvolatile memory  
An error recovery technique is used on marginal nonvolatile memory cells. A marginal memory cell is unreadable because it has a voltage threshold (VT) of less than zero volts. By biasing adjacent...
6829174 Method of narrowing threshold voltage distribution  
A method of narrowing the threshold voltage distribution in a memory. The method includes separating the erase and erase identification of odd memory cells from the erase and erase identification...
6828194 Low voltage programmable and erasable flash EEPROM  
A new method of fabricating and programming and erasing a Flash EEPROM memory cell is achieved. A tunneling oxide layer is formed overlying a semiconductor substrate. A first polysilicon layer, an...
6826086 Method, apparatus and system for erasing and writing a magnetic random access memory  
A method of erasing a logical data block of a MRAM according to an embodiment of the present invention is disclosed. The method comprises providing a MRAM having a logical data block configured for...
6822910 Non-volatile memory and operating method thereof  
A non-volatile memory device is described, comprising a plurality of memory cells, a plurality of word lines, a plurality of drain lines, and a plurality of source lines, wherein two adjacent...
6822901 Non-volatile memory circuit comprising automatic erase function  
A nonvolatile memory circuit, comprises: memory regions, which contain N (N is a plurality) of the sectors, N not being an exponentiated number of two and the sectors having the same capacity; a...
6819591 Method for erasing a memory sector in virtual ground architecture with reduced leakage current  
An exemplary memory sector erase method comprises the steps of pre-programming a first bit and a second bit of a plurality of core memory cells of a plurality of memory blocks of a target memory...
6819597 Row decoder in flash memory and erase method of flash memory cell using the same  
Disclosed are a row decoder in a flash memory and erasing method in a flash memory cell using the same. The row decoder comprises a PMOS transistor having a gate electrode for receiving a first...
6819594 Electrically erasable programmable logic device  
An electrically erasable programmable logic device includes a P-type substrate, a first N-type doped region located inside the P-type substrate, and a first gate located on the P-type substrate....
6819615 Memory device having resistive element coupled to reference cell for improved reliability  
A reference cell transistor with a series resistance to improve reliability in reading cells in an associated memory array. The reference cell transistor is coupled in series with a resistive...
6816414 Nonvolatile memory and method of making same  
A method of discharging a charge storage location of a transistor of a non-volatile memory includes applying first and second voltages to a control gate and a well region, respectively, of the...
6815983 Analog floating gate voltage sense during dual conduction programming  
A method for sensing the voltage on a floating gate in a floating gate circuit during a set mode is disclosed. The method includes the steps of: a) causing the floating gate circuit to enter into a...
6813191 Microcomputer with nonvolatile memory protected against false erasing or writing  
A microcomputer includes a nonvolatile memory for storing contents that can be erased from and written to the nonvolatile memory electrically when an erasing/writing voltage is supplied to the...
6809969 Non-volatile semiconductor memory device capable of rapid operation  
At a time a voltage of 6V is applied to all word lines and memory cells connected to a bit line are all simultaneously subjected to a weak write operation using a channel hot electron. Furthermore...
6809964 Nonvolatile semiconductor memory device capable of transferring data internally without using an external bus  
A flash memory receives an internal data transfer command from a memory controller which causes the flash memory to copy data from one sector of the flash memory to another sector of the flash...
6801456 Method for programming, erasing and reading a flash memory cell  
A method for programming PMOS single transistor flash memory cells through channel hot carrier induced hot electron injection mechanism is disclosed. The PMOS single transistor flash memory cell...
6798696 Method of controlling the operation of non-volatile semiconductor memory chips  
Disclosed herewith is a method for controlling the operation of non-volatile semiconductor chips with high sequential access performance realized by smoothing out the variation of the times for...
6798699 Flash memory device and method of erasing  
A non-volatile memory device for erasing a block of stack-gate single transistor flash memory cells performs an efficient and controllable mode of programming, referred to as block convergence....
6798692 Programmable sub-surface aggregating metallization structure and method of making same  
A programmable sub-surface aggregating metallization structure (“PSAM”) includes an ion conductor such as a chalcogenide-glass which includes metal ions and at least two electrodes disposed at...
6795347 Memory circuit  
The non-volatile memory cell of a memory circuit includes at least one enhancement pMOS transistor having a floating gate. It further includes an enhancement nMOS transistor having a floating gate...
6795348 Method and apparatus for erasing flash memory  
Method and apparatus for the erase of non-volatile memory in which holes trapped in the tunnel oxide are reduced.
6794997 Extending non-volatile memory endurance using data encoding  
An embedded system comprising a CPU and non-volatile memory is adapted to extend the endurance of the non-volatile memory through the use of an encoding of information stored in the non-volatile...
6795890 Data storage method, and data processing device using an erasure block buffer and write buffer for writing and erasing data in memory  
A data processing device includes flash memory; nonvolatile memory having an erasure block buffer in which there are stored data recorded in an erasure-unit region of the flash memory; a write...
6791883 Program and erase in a thin film storage non-volatile memory  
A non-volatile memory having a thin film dielectric storage element is programmed by hot carrier injection (HCI) and erased by tunneling. The typical structure for the memory cells for this type of...
6791884 Nonvolatile memory  
In a nonvolatile memory in which a load on a boosting circuit changes according to the number of rewrite bytes, the boosting circuit is configured so as to perform voltage boosting at a relatively...
6788580 Nonvolatile semiconductor storage device and data erasing method  
A nonvolatile semiconductor storage device includes a memory cell array and a reference cell providing a reference level with which data of the memory cell array is compared with so as to determine...
6788576 Complementary non-volatile memory cell  
A complimentary non-volatile memory (CNVM) cell includes an n-channel transistor and a p-channel transistor that have drains connected like a CMOS inverter, and that are controlled by a shared...
6781878 Dynamic sub-array group selection scheme  
A method of selecting numbers of sub-array groups for simultaneous operation to optimize bandwidth biases a number of sub-array groups and compares a circuit state value, preferably voltage, to a...
6781882 Nonvolatile semiconductor storage device having a shortened time required for a data erasing operation and data erasing method thereof  
It is an object to obtain a nonvolatile semiconductor storage device and a data erasing method thereof in which a time required for a data erasing operation can be shortened. When second and...
6778437 Memory circuit for providing word line redundancy in a memory sector  
According to one embodiment, the memory circuit comprises a memory sector having a plurality of memory cells. Each of the plurality of memory cells has a gate connected to a corresponding word...
6771541 Method and apparatus for providing row redundancy in nonvolatile semiconductor memory  
In a NOR-type flash memory of either the ETOX or virtual ground type that is programmed using electron injection and erased using FN tunneling, and that has row redundancy, the typical sequence of...
6771540 Nonvolatile semiconductor storage device and method for operating the device  
The present invention discloses a nonvolatile semiconductor memory device including a memory cell array composed of a plurality of memory cells, each of which is formed with a gate insulating film,...
6771544 EEPROM writing method  
An electrically erasable programmable read-only memory receives a single supply voltage and generates a first voltage higher than both the supply voltage and the ground voltage, a second voltage...
6771545 Method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell array  
An array of non-volatile memory cells includes active columns of cells wherein a data pattern may be stored adjacent to damaged or inactive columns wherein data is not stored. A method of storing a...
6767790 Methods of writing/erasing of nonvolatile semiconductor storage device  
A nonvolatile semiconductor storage device can achieve a shortened write time and a reduced absolute value of an operating voltage at the time of erasing. A P-type silicon substrate ( 1 ) is set at...
6768671 Nonvolatile memory and method of operation thereof to control erase disturb  
In an array of nonvolatile memory cells, as many memory cells as desired and indeed even the entire array of memory cells may be placed in a single region of the bulk, illustratively a p-well....
6766960 Smart card having memory using a breakdown phenomena in an ultra-thin dielectric  
A smart card having improved non-volatile memory and a processor. The memory includes of a plurality of memory cells. The semiconductor memory cells each have a data storage element constructed...
6762956 High-speed data programmable nonvolatile semiconductor memory device  
A semiconductor integrated circuit device includes a memory block. The device performs a programming operation, a pre-programming operation, and an erasing operation. The pre-programming operation...
6760805 Flash management system for large page size  
A system and method for enabling flash memory systems to support flash devices with pages that are larger than operating system data sector sizes, while not violating the device's specifications,...
6760270 Erase of a non-volatile memory  
An erase of a non-volatile memory (NVM) is achieved by first using oxide tunneling followed by hot hole injection (HHI). The subsequent use of HHI completes the erase that the tunneling cannot...
6760271 Semiconductor memory device with shorter signal lines  
A semiconductor memory device includes a plurality of input/output terminals, a memory cell array which are divided into blocks respectively corresponding to the input/output terminals such that...
6759290 Stitch and select implementation in twin MONOS array  
In this invention, by offering specific array-end structures and their fabrication method, the three resistive layers of diffusion bit line, control gate and word gate polysilicons, where control...
6760258 Means to erase a low voltage programmable and erasable flash EEPROM  
A new method of fabricating and programming and erasing a Flash EEPROM memory cell is achieved. A tunneling oxide layer is formed overlying a semiconductor substrate. A first polysilicon layer, an...
6760259 Non-volatile semiconductor memory device that can be fabricated with erasure unit modified  
Particular blocks are a boot block and parameter block having a storage capacity smaller than that of a general block. In the case where a boot block is not required, a signal BOOTE is set at an L...
6757201 Nonvolatile memory, IC card and data processing system  
The invention facilitates to meet both of the mode of use that finds precedence in frequent rewrite to the nonvolatile memory and data retention during the power supply being cut off, and the mode...
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