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6452837 Nonvolatile semiconductor memory and threshold voltage control method therefor  
This invention discloses a memory cell threshold voltage shift method effective for the erase or write sequence of a nonvolatile semiconductor memory. First, the threshold voltages V TH of a...
6452841 Dynamic random access memory device and corresponding reading process  
A dynamic random access memory device includes a memory plane including at least one first matrix of memory cells, a read/write amplifier connected to the end of each column of the matrix, and at...
6449190 Adaptive reference cells for a memory device  
A memory device is provided with reference cells that can be adapted to the core cells of the memory device. An erase verify reference cell. is adapted to the core cells by changing the threshold...
6442070 Semiconductor nonvolatile memory apparatus and computer system using the same  
A nonvolatile semiconductor memory device is provided which includes a plurality of memory cells each having a floating gate, wherein a threshold level of each memory cell depends on a value of...
6442074 Tailored erase method using higher program VT and higher negative gate erase  
A method and system for programming and erasing the normal bits of a memory array of dual bit memory cells is accomplished by programming at a substantially high delta VT and an erase pulse that...
6438056 Method and device for refreshing the memory content of a memory cell of a read-only memory  
A method and a device for refreshing the memory content of at least one memory cell of a read-only memory is described. An embodiment of the present invention involves determining the instantaneous...
6434040 Loadless NMOS four transistor SRAM cell  
A static random access memory cell utilizes four NMOS transistors and does not require load elements. The semiconductor memory cell device maintains a stable data hold by utilizing a sub-threshold...
6424569 User selectable cell programming  
A user selectable option to a memory cell, such as a multilevel NAND flash cell, that allows the user to select to optimize programming time or the data integrity. A programmable memory cell can...
6421277 Non-volatile semiconductor memory device  
A threshold voltage distribution D 2 apparently decreases to a distribution D 3 when there is a distribution D 1 of memory cells having deep depletion. After an erase is performed utilizing an...
6421275 Method for adjusting a reference current of a flash nitride read only memory (NROM) and device thereof  
A reference current is generated by inputting an adjusting current, which is about two or three micro amperes larger than the drain current of the NROM cell having a highest threshold voltage of...
6418053 Piggyback programming using graduated steps for multi-level cell flash memory designs  
A method of programming a memory cell that has 2 N voltage levels where N>1 and represents the number of bits stored within the memory cell. The method includes generating a multi-stepped...
6418054 Embedded methodology to program/erase reference cells used in sensing flash cells  
Programming lines are attached to reference cells of a memory device. A state machine controls voltages and/or currents applied to the reference cells via the programming lines to program and...
6411548 Semiconductor memory having transistors connected in series  
A memory cell array is comprised of plural cell units. Each cell unit is connected between a bit line and a source line. Each cell unit is comprised of plural series-connected MFSFETs having...
6411547 Nonvolatile memory cell and method for programming and/or verifying the same  
Nonvolatile memory device and a method of programming the same, is disclosed, wherein, for single level or multi-level programming of a cell, predetermined voltages are applied to a control gate,...
6411551 Multi-state nonvolatile semiconductor memory device which is capable of regularly maintaining a margin between threshold voltage distributions  
A nonvolatile semiconductor memory device of the present invention has an array that includes a bit line, a plurality of word lines arranged perpendicularly to the bit line and a plurality of...
6407945 Method for reading nonvolatile semiconductor memory configurations  
A method for reading non-volatile semiconductor memory configurations includes determining a high threshold voltage and a low threshold voltage based on a charge state of a floating gate for a...
6400606 Sense amplifier circuit for use in a nonvolatile semiconductor memory device  
A novel sense amplifier circuit is provided that includes a resistor and a reference cell connected in parallel to a reference line. The reference cell is composed of a floating-gate field effect...
6400601 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor device is provided, which does not need excessive writing or verification operations, except for the originally required writing and verification operations. The data is...
6392930 Method of manufacturing mask read-only memory cell  
A method of manufacturing a ROM cell. A DRAM cell is provided. An ONO (oxide-nitride-oxide) stacked layer is used as a dielectric film of a capacitor of the DRAM cell. When a supply power is over 6...
6392920 Nonvolatile memory and its driving method  
A nonvolatile memory in which transistors having MFMIS structure each of which is composed by sequentially laminating a floating-gate, a ferroelectric layer and a control gate via a gate insulating...
6392931 Method for high precision programming nonvolatile memory cells, with optimized programming speed  
A programming method comprises the steps of applying a ramp voltage having a first slope to the gate terminal of a selected memory cell to rapidly bring the threshold voltage of the selected cell...
6385110 Multilevel non-volatile semiconductor memory device  
The present invention provides a multilevel non-volatile semiconductor memory device comprising: plural memory cells having plural threshold levels for allowing the plural memory cells to turn ON...
6381178 Non-volatile semiconductor memory device and method of rewriting data stored in non-volatile semiconductor memory device  
There is provided a non-volatile semiconductor memory device, including (a) a first gate insulating film formed on a channel region of a semiconductor substrate, (b) a floating gate electrode...
6381185 Method and a circuit architecture for testing an integrated circuit comprising a programmable, non-volatile memory  
A method for testing a programmable, nonvolatile memory including a matrix of memory cells is provided. A plurality of memory cells are programmed. The programmed memory cells are addressed in...
6363013 Auto-stopped page soft-programming method with voltage limited component  
Method for soft-programming at least one floating gate memory cell in at least one page of a persistent memory device by converging the low threshold voltages of the several cells of the page...
6347053 Nonviolatile memory device having improved threshold voltages in erasing and programming operations  
A nonvolatile memory device having a predetermined threshold voltage is disclosed. In the nonvolatile memory device comprising a gate electrode including a control gate, a floating gate and a gate...
6342806 Structure of a floating gate of a MOS transistor and method of changing the threshold value thereof  
An object of the present invention is to economize in power consumption of a semiconductor integrated circuit. The semiconductor integrated circuit has first and second capacitors electrically...
6335882 Nonvolatile semiconductor memory device capable of erasing blocks despite variation in erasing characteristic of sectors  
A power generating portion generates an erasing potential for an erasing operation with respect to information stored in a memory cell and variably generates a first potential applied to the...
6324092 Random access memory cell  
A random access memory cell. The RAM cell includes a first transistor and a second transistor. A control gate of the first transistor is coupled to a control signal line. A data read terminal of...
6324099 2-bit/cell type nonvolatile semiconductor memory  
A control method for a nonvolatile semiconductor memory having a number of nonvolatile semiconductor memory cells formed on a surface of a semiconductor substrate each having a gate insulating film...
6320791 Writing apparatus for a non-volatile semiconductor memory device  
A writing apparatus for a non-volatile semiconductor memory device in which data is written into a flash memory 11 and written data being verified, whereby only data not having been written...
6314026 Nonvolatile semiconductor device using local self boost technique  
With a local self boost (LSB) technique, the distribution of threshold voltages after data erase is set toward a higher side and the distribution width is narrowed sufficiently within the range in...
6310800 Non-volatile semiconductor memory device and method for driving the same  
A non-volatile semiconductor memory device of the present invention includes, on a semiconductor substrate, a plurality of memory cells arranged in a matrix, a plurality of word lines extending in...
6304490 Memory cell integrated structure with corresponding biasing device  
A biasing device for biasing a memory cell having a substrate bias terminal associated therewith. The biasing device includes a first sub-threshold circuitry block adapted to supply an appropriate...
6292398 Method for the in-writing verification of the threshold value in non-volatile memories  
A method for the in-writing verification of the threshold value of the multilevel cells suitable to memorize n bits each, that provides for the utilization of a sense amplifier containing a...
6288936 Nonvolatile memory for storing multivalue data  
A nonvolatile memory that has a plurality of floating gate type cell transistors comprises a read buffer circuit, connected to the bit line, that detects the threshold voltage states in the cell...
6282122 Evaluation of memory cell characteristics  
Techniques are used to evaluate margin of programmable memory cells. In particular, techniques are used to measure negative erased threshold voltage levels. Techniques are used to increase the...
6275418 Circuit with non-volatile memory and method of erasing the memory a number of bits at a time  
The threshold of a number of storage transistors is shifted in steps. After such a step, a collective current through the main current channels of a number of these storage transistors is sensed....
6272586 Memory system having programmable control parameters  
A memory system capable of being configured for optimum performance after fabrication using control parameters stored in non-volatile data storage units. The system includes an array of memory...
6272049 Non-volatile semiconductor memory device having increased operating speed  
In order to read a data stored in a given memory cell, two dummy cells are provided, one of which is set to an erase state and the other to a program state. The threshold voltage of each cell...
6269022 Threshold voltage setting circuit for reference memory cell and method for setting threshold voltage using the same  
Threshold voltage setting circuit for a reference memory cell for immediate and accurate setting of a threshold voltage without time consumption; and a method for setting a threshold voltage using...
6269023 Method of programming a non-volatile memory cell using a current limiter  
A memory cell that includes a substrate that has a first region and a second region with a channel therebetween, wherein the first region generates hot carriers. The memory cell further includes a...
6266279 Nonvolatile semiconductor memory device, method for reading data from the nonvolatile semiconductor memory device, and method for writing data into the nonvolatile semiconductor memory device  
An object is to obtain a nonvolatile semiconductor memory device which can achieve a reduction in processing time required for data writing operation and an increase in storage density through the...
6262916 Non-volatile semiconductor memory device capable of pre-conditioning memory cells prior to a data erasure  
In a non-volatile semiconductor memory device, a binary counter is connected to a most significant bit portion of an address counter for successively generating addresses of rows of a memory cell...
6259625 Method and apparatus for reducing high current chip erase in flash memories  
A method and an apparatus is provided to decrease the erase current level by subdividing the memory array into small segments and cycle through complete address space sequentially during the chip...
6246608 Non-volatile memory circuit  
There is provided a non-volatile memory circuit which stores information by altering a threshold voltage of memory cells so as to associate first and second threshold voltages respectively with...
6243290 Nonvolatile semiconductor memory device  
The present invention provides a nonvolatile semiconductor memory device for multilevel data storage that simultaneously carries out programming of multilevel data and subsequent verification at a...
6243298 Non-volatile memory cell capable of being programmed and erased through substantially separate areas of one of its drain-side and source-side regions  
In accordance with the present invention, a low VCC operational non-volatile memory cell includes a drain region and a source region separated by a channel region. A tunneling dielectric layer...
6233178 Method and apparatus for pre-conditioning flash memory devices  
Pre-conditioning method and apparatus for mitigating erase-induced stress within flash memory devices are disclosed. The pre-condition method includes subjecting flash memory cell to a short write...
6233175 Self-limiting multi-level programming states  
A method of programming flash EEPROM devices that provides self-limiting multi-level programming states. Each cell in the flash EEPROM device can be programmed to have one of multiple threshold...
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