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9047973 Group word line erase and erase-verify methods for 3D non-volatile memory  
An erase operation for a 3D stacked memory device assigned storage elements to groups according to an expected erase speed. The storage elements are then erased according to their group to provide...
9042181 Periodic erase operation for a non-volatile medium  
An apparatus, system, and method are disclosed for managing erase operations for a data storage medium. A method includes determining whether a use threshold for one or more non-volatile storage...
9042177 Semiconductor device and method of operating the same  
A semiconductor device includes first memory blocks arranged in a longitudinal direction, and including a plurality of strings, wherein the strings are formed along a vertical direction, and the...
9036415 Mitigating variations arising from simultaneous multi-state sensing  
Methods and devices for mitigating sensing variations that may arise from simultaneous multi-threshold (SMT) sensing are provided. During SMT sensing, two or more different bias conditions may be...
9030883 Adaptive erase recovery for non-volatile memory (NVM) systems  
Methods and systems are disclosed for adaptive erase recovery of non-volatile memory (NVM) cells within NVM systems. The adaptive erase recovery embodiments adaptively adjust the erase recovery...
9030870 Threshold voltage compensation in a multilevel memory  
Threshold voltages in a charge storage memory are controlled by threshold voltage placement, such as to provide more reliable operation and to reduce the influence of factors such as neighboring...
9030886 Memory device and driving method thereof  
A memory device includes a memory array, an array gap, a voltage provider, and a voltage divider. The voltage provider is disposed in the array gap and coupled to a column of memory cells of the...
9030873 Semiconductor device and method of operating the same  
A method of operating a semiconductor device includes storing a supplying condition of a read voltage inputted from an external source into an internal register to perform a read operation of...
9030871 Integrated circuit with programmable storage cell array and boot-up operation method thereof  
An integrated circuit may include a first programmable storage cell group suitable for storing program validity information, second to N-th programmable storage cell groups suitable for storing a...
9025379 Semiconductor device and method of operating the same  
A method of operating a semiconductor device includes storing LSB data in a LSB page included in plural pages of corresponding word line group of a first memory block, generating a data...
9019771 Dielectric charge trapping memory cells with redundancy  
A memory cell array of dielectric charge trapping memory cells and method for performing program, read and erase operations on the memory cell array that includes bits stored at charge trapping...
9019764 Low-voltage page buffer to be used in NVM design  
A low-current FN channel for Erase, Program, Program-Inhibit and Read operations is disclosed for any non-volatile memory using FN-tunneling scheme for program and erase operation, regardless...
9019773 Nonvolatile memory device and method of operating the same  
A nonvolatile memory device includes a memory cell array and control logic. The memory cell array includes multiple memory blocks, each memory block including memory cells connected to word lines...
9013919 Data randomization in 3-D memory  
In a nonvolatile memory array, such as a three-dimensional array of charge-storage memory cells, data is randomized so that data of different strings along the same bit line are randomized using...
9007832 Methods for programming a memory device and memory devices  
Methods for programming memory cells and memory devices are disclosed. One such method for programming includes performing a program verify operation of a group of memory cells. A number of...
9007827 Nonvolatile memory device and method of programming nonvolatile memory device  
A memory system includes a nonvolatile memory device and a memory controller. The nonvolatile memory device includes first memory blocks configured to store m-bit data per cell and second memory...
9007826 Non-volatile semiconductor memory device  
In one embodiment, a control circuit executes a first page writing operation, a first verify operations, a second page writing operation, a second verify operations, a step-up operation. The...
9007842 Retention detection and/or channel tracking policy in a flash memory based storage system  
A method for determining a retention time in a solid state device (SSD), comprising the steps of providing a plurality of write operations to a memory, determining a reference voltage for each of...
8995198 Multi-pass soft programming  
Disclosed herein are system, method and computer program product embodiments for utilizing soft programming a nonvolatile memory. An embodiment operates by sequentially applying a single soft...
8988104 Multiple-time configurable non-volatile look-up-table  
Innovative Non-Volatile Look-Up-Table (NV-LUT) has been constructed by Single Gate Logic Non-Volatile Memory (SGLNVM) devices processed with the standard CMOS logic process. One of a pair of...
8988938 Method to reduce program disturbs in non-volatile memory cells  
A non-volatile memory and methods of operating the same to reduce disturbs is provided. In one embodiment, the method includes coupling a first positive high voltage to a first global wordline in...
8982619 Managing non-volatile media  
Apparatuses, systems, and methods are disclosed to manage non-volatile media. A method includes determining a configuration parameter for a set of storage cells of a non-volatile recording medium....
8976588 NVSRAM cells with voltage flash charger  
The present invention discloses two preferred embodiments of a 12T NVSRAM cell with a flash-based Charger and a pseudo 10T NVSRAM cell with one shared Flash-based Charger. The Flash-based Charger...
8976603 Nonvolatile semiconductor memory device  
A control circuit is configured to, during an erase operation, set a voltage of a first line connected to a selected cell unit to a voltage larger than a voltage of a gate of a first transistor...
8976584 Flash memory device and method of programming the same  
A method is provided for programming a flash memory device including memory cells formed in a direction perpendicular to a substrate, a first sub word line connected to first memory cells and...
8976596 Controller  
According to one embodiment, CONTROLLER includes a phase comparator that receives a data strobe signal outputted from a memory in response to a read enable signal, and a delayed data strobe signal...
8971126 Charge loss compensation methods and apparatus  
Methods and apparatus for compensating for charge loss in memories include tracking a specific block of the main memory array and determining charge loss compensation by comparing pre-cycled and...
8971115 Semiconductor memory device  
A semiconductor memory device includes a string of memory cell transistors that are connected to each other in series. A selection transistor is connected between one end of the string of the...
8971113 Pseudo-8T NVSRAM cell with a charge-follower  
The present invention discloses a 10T NVSRAM cell with a 6T SRAM cell with 4T Flash cell with one dedicated Flash-based Charger. In addition, a Pseudo-8T NVSRAM cell with a shared Flash-based...
8971122 Group based read reference voltage management in flash memory  
Apparatus, methods, and other embodiments associated with group based read reference voltage management in flash memory are described. According to one embodiment, an apparatus includes a...
8971112 Method of programming a multi-level memory device  
Method of programming a multi-level memory cell may include transferring one or more values between an auxiliary latch of the multi-level memory cell and a most significant bit (MSB) latch of the...
8964464 System and method for accelerated sampling  
A system and method for reading memory cells in a multi-level cell memory device. A set of thresholds may be received for reading a current page of the memory cells. The set of threshold may...
8964480 Detecting programmed word lines based on NAND string current  
A number (Nwl) of programmed word lines in a block of NAND strings is determined by measuring a reference combined current (Iref) in the block when all of the memory cells are in a conductive...
8964463 Read disturb control in a nonvolatile semiconductor memory device having P-type memory cell transistor  
A nonvolatile semiconductor memory device is provided which includes: a P-type memory cell transistor having a source, a drain, a gate, and a charge storage layer; and a control circuit which, in...
8964467 Systems and methods for partial page programming of multi level cells  
Multiple bits of data are programmed together to each cell of a segment of a word line while other segments of the same word line are unprogrammed. Subsequently, additional segments are similarly...
8958244 Split block decoder for a nonvolatile memory device  
A non-volatile memory device having a memory array organized into a plurality of memory blocks, having either planar memory cells or stacks of cells. Row decoding circuitry of the memory device is...
8958243 Group classification method for solid state storage device  
A group classification method includes the following steps. Firstly, a voltage shift parameter table is established. The voltage shift parameter table includes a first positional parameter table...
8953374 Programming based on controller performance requirements  
Methods and solid state drives are disclosed, for example a solid state drive that is adapted to receive and transmit analog data signals representative of bit patterns of three or more levels...
8947935 Integrated circuit and apparatuses including the same  
An integrated includes a memory cell, a bit line connected to the memory cell, a boosting circuit to boost the bit line up to a boosting voltage during a pre-charge operation pre-charging the bit...
8947938 Two-transistor non-volatile memory cell and related program and read methods  
A memory device includes an N-channel transistor and a P-channel transistor. A word line is electrically connected to a drain terminal of the N-channel transistor, and a source terminal of the...
8947933 Nonvolatile semiconductor memory apparatus  
According to one embodiment, a nonvolatile semiconductor memory apparatus includes a memory cell array, a row decoder, a controller. The memory cell array includes a plurality of memory strings....
8947930 Semiconductor memory device for storing multivalued data  
Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of 5 first memory cells selected...
8942048 Semiconductor device and method of operating the same  
A semiconductor device includes a memory block coupled to word lines and configured to a memory cell including a floating gate, an inter-poly dielectric and a control gate and a peripheral circuit...
8942037 Threshold acquisition and adaption in NAND flash memory  
A method, apparatus, and controller for acquiring and tracking at least one threshold voltage of at least one cell of at least one flash chip. The method can include acquiring the at least one...
8942028 Data reprogramming for a data storage device  
A data storage device includes a non-volatile memory and a controller. A method includes programming information to the non-volatile memory. The information includes multiple codewords. The method...
8937837 Bit line BL isolation scheme during erase operation for non-volatile storage  
A system for erasing non-volatile storage system that reduces the voltage across the transistor that interfaces between the sense amplifier and the bit line so that the transistor can be made...
8937835 Non-volatile storage with read process that reduces disturb  
A apparatus and process for reading data from non-volatile storage includes applying a read compare signal to a selected data memory cell of a NAND string, applying a first set of one or more read...
8934306 Memory and sense parameter determination methods  
Memory devices and methods for operating a memory include filtering a histogram of sensed data of the memory, and adjusting a parameter used to sense the memory using the filtered histogram....
8934297 Method and system for programming non-volatile memory cells based on programming of proximate memory cells  
A multi-level non-volatile memory device programs cells in each row in a manner that takes into account the coupling from the programming of cells that are proximate the row to be programmed. In...
8934304 Operating method of nonvolatile memory device and operating method of memory system including nonvolatile memory device  
A nonvolatile memory device includes a plurality of memory cells and a plurality of monitor cells. The method of operating the device includes erasing the plurality of memory cells and the...