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7391650 |
Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
Reading and verify operations are performed on non-volatile storage elements using temperature-compensated read voltages for unselected word lines, and/or for select gates such as drain or source...
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7385851 |
Repetitive erase verify technique for flash memory devices
Erase verify operations as described herein can be utilized for a flash memory device having an array of memory cells. The erase verify operations employ repetitive erase verify testing to...
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7385850 |
Method of programming and verifying cells of a nonvolatile memory and relative NAND FLASH memory
A method of programming cells in a nonvolatile memory is based upon a Global Verify operation and a Byte-by-byte Verify operation. The cells of a destination page of the nonvolatile memory are...
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7385849 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device is disclosed. The device includes a memory cell array, an I/O buffer, a read/write buffer, an error checking and correcting circuit, and an initialization...
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7382663 |
Erase voltage generator circuit for providing uniform erase execution time and nonvolatile memory device having the same
An erase voltage generation circuit providing a uniform erase execution time and a non-volatile semiconductor memory device having the same, in which the erase voltage generation circuit includes a...
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7382661 |
Semiconductor memory device having improved programming circuit and method of programming same
A program method for a flash memory semiconductor device includes the steps of providing a bit line voltage for programming a group of memory cells and detecting if the bit line voltage meets a...
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7382656 |
Nonvolatile memory with program while program verify
A page mode program sequence is described that includes first and second bias applying cycles. In the first cycle, a program bias is applied to a first part of a page of memory cells, while a...
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7382655 |
Access time adjusting circuit and method for non-volatile memory
An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance...
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7379342 |
Flash memory device being programmed and verified using voltage higher than target/read threshold voltage to achieve uniform threshold voltage characteristic
A program operation and a program verification operation are repeatedly performed. The program verification operation is performed on memory cells including pass cells to obtain a uniform...
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7379333 |
Page-buffer and non-volatile semiconductor memory including page buffer
In one aspect, a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of...
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7376016 |
Method of writing to non-volatile semiconductor memory device storing information depending on variation in level of threshold voltage
In a flash memory, after an initial write operation ends, each bit line associated with a memory cell subjected to a write is precharged and each bit line associated with a memory cell that is not...
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7376015 |
Nonvolatile memory, semiconductor device, and method of programming to nonvolatile memory
Disclosed is a nonvolatile memory with a shortened total write time, capable of stably writing data by making a write current constant while reducing fluctuations in a voltage generated by a...
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7376011 |
Method and structure for efficient data verification operation for non-volatile memories
An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with three data registers and a controller circuit. During a flash program operation, one data...
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7376009 |
Semiconductor memory device which stores plural data in a cell
A memory cell array is configured to have a plurality of memory cells arranged in a matrix, each of the memory cells being connected to a word line and a bit line and being capable of storing n...
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7372741 |
Nonvolatile memory apparatus having a processor and plural memories one or more of which is a nonvolatile memory having circuitry which performs an erase operation and an erase verify operation when the processor specifies the erase operation mode to the nonvolatile memory
A nonvolatile memory apparatus which includes plural memories one of which is a nonvolatile memory such as a Flash EEPROM capable of being specified a plurality of operations from a processing unit...
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7372733 |
Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method
A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first...
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7372730 |
Method of reading NAND memory to compensate for coupling between storage elements
A method for reading a non-volatile memory arranged in columns and rows which reduces adjacent cell coupling, sometimes referred to as the Yupin effect. The method includes the steps of: selecting...
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7366022 |
Apparatus for programming of multi-state non-volatile memory using smart verify
In a non-volatile memory, the initiation of program verification is adaptively set so that programming time is decreased. In one approach, non-volatile storage elements are programmed based on a...
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7366014 |
Double page programming system and method
A method for programming an electrically programmable memory including a plurality of memory cells arranged in individually-selectable memory cell sets each including at least one memory cell. The...
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7362610 |
Programming method for non-volatile memory and non-volatile memory-based programmable logic device
A method for programming a flash memory cell comprises providing input data to the flash cell and providing a segmented programming pulse to the flash memory cell. The segmented programming pulse...
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7359248 |
Methods for programming and reading NAND flash memory device and page buffer performing the same
Methods for programming and reading a multi-level-cell NAND flash memory device having plural memory cells are disclosed to reduce the programming time and the reading time. The program method...
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7355892 |
Partial page fail bit detection in flash memory devices
A flash memory device, and a method of operating the same, is disclosed. The array of the flash memory device is arranged in pages of memory cells, each page having memory cells associated into...
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7352630 |
Non-volatile memory device having improved program speed and associated programming method
A non-volatile memory device comprises a memory cell array having a plurality of non-volatile memory cells arranged in rows and columns. Selected memory cells are programmed by applying program...
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7352629 |
Systems for continued verification in non-volatile memory write operations
Temporary lock-out is provided while programming a group of non-volatile memory cells to more accurately program the memory cells. After successfully verifying that the threshold voltage of a...
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7352620 |
Non-volatile semiconductor device and method for automatically recovering erase failure in the device
A spare sector is in a blank state beforehand. Each time the erasing is carried out in practical use, the number of erase pulses is counted or the presence/absence of overcurrent flowing when the...
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7349263 |
Circuit and method for adaptive incremental step-pulse programming in a flash memory device
Nonvolatile memory devices support programming and verify operations that improve threshold-voltage distribution within programmed memory cells. This improvement is achieved by reducing a magnitude...
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7345928 |
Data recovery methods in multi-state memory after program fail
A non-volatile memory device includes the ability to recover data in event of a program failure without having to maintain a copy of the data until the write is completed. As the integrity of the...
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7345922 |
Position based erase verification levels in a flash memory device
The location of a cell to be erase verified is determined. The erase verification threshold voltage is then set. The threshold voltage is changed in response to the cell's location with respect to...
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7345921 |
Method and system for a programming approach for a nonvolatile electronic device
Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or...
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7345918 |
Selective threshold voltage verification and compaction
Non-volatile memory devices for providing selective compaction verification and/or selective compaction to facilitate a tightening of the distribution of threshold voltages in memory devices...
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7342831 |
System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
Reading and verify operations are performed on non-volatile storage elements using temperature-compensated read voltages for unselected word lines, and/or for select gates such as drain or source...
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7342830 |
Program and program verify operations for flash memory
A method for programming a nonvolatile memory array including an array of memory cells, each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain...
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7339831 |
Non-volatile semiconductor memory device allowing efficient programming operation and erasing operation in short period of time
Until the number of pulse application n reaches 12, as a first-half pulse, a pulse is set to have a width fixed to 2 ms, and its voltage is increased every time. As a latter-half pulse, the pulse...
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7339825 |
Nonvolatile semiconductor memory with write global bit lines and read global bit lines
A nonvolatile semiconductor memory is capable of dual and triple operation with a small chip size. A plurality of sectors is formed. Each sector has nonvolatile memory cells, local bit lines...
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7336538 |
Page buffer circuit and method for multi-level NAND programmable memories
A page buffer for an electrically programmable memory including at least one read/program unit having a coupling line operatively associable with at least one of said bit lines and adapted to at...
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RE40110 |
Nonvolatile semiconductor memory device for storing multivalued data
A multivalued memory has data of state “0”, state “1”, state “2”, and state “3” whose threshold voltages increase in that order. In a first-page write operation, a memory cell whose...
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7333364 |
Cell-downgrading and reference-voltage adjustment for a multi-bit-cell flash memory
A flash memory has multi-level cells (MLC) that can each store multiple bits per cell. Blocks of cells can be downgraded to fewer bits/cell when errors occur, or for storing critical data such as...
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RE40076 |
Program circuit
The program circuit according to the present invention can apply a program voltage to the only memory cells which are not programmed during a re-programming operation, thus, the present invention...
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7330384 |
Verifying circuit and method of repairing semiconductor device
A verifying circuit and a method of repairing a semiconductor device, the verifying circuit of example embodiments may include a first fuse circuit configured to determine whether a first fuse has...
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7330376 |
Method for memory data storage by partition into narrower threshold voltage distribution regions
A method for data storage of a memory unit and a memory unit using the same are provided in the present invention. The method for data storage of a memory unit includes: first, dividing a memory...
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7330373 |
Program time adjustment as function of program voltage for improved programming speed in memory system
In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of...
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7327609 |
Methods of program-verifying a multi-bit nonvolatile memory device and circuit thereof
Methods of verifying a program state may be provided for a non-volatile memory device including a multi-bit memory cell transistor providing more than two different program states. More...
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7324387 |
Low power high density random access memory flash cells and arrays
Low power high density random access memory flash cells and arrays using Fowler Nordheim (FN) tunneling for both programming and erasing. The memory array is divided into sectors, each sector...
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7324383 |
Selective slow programming convergence in a flash memory device
A plurality of memory cells are programmed with incrementally increased programming pulses applied to word lines to which the memory cells are coupled. After each pulse, a verify operation...
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7319615 |
Ramp gate erase for dual bit flash memory
A method of erasing a block of flash memory cells by applying a ramped gate erase voltage to the block of memory cells. When an erase verify of the block of memory cells indicates that erasure has...
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7319614 |
Non-volatile semiconductor memory device and data programming method
In a non-volatile semiconductor memory, a large current can be flowed through the memory cell during reading. The number of the column lines can be reduced. The electron injection to the floating...
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7317637 |
Programming method of multilevel memories and corresponding circuit
A method and circuit for programming a multilevel memory of a flash EEPROM type having a matrix of cells grouped in memory words. The method provides for the simultaneous generation of a first...
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7317636 |
Nonvolatile semiconductor memory, a data write-in method for the nonvolatile semiconductor memory and a memory card
A nonvolatile semiconductor memory includes a memory cell array, a page buffer that is connected to the memory cell array and retains program verification results of a write-in operation of...
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7315475 |
Non-volatile semiconductor memory device
A sense amplifier has first and second input nodes. A reference memory cell is connected to the first input node. To the second input node, a constant current source circuit and a main memory cell...
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7313649 |
Flash memory and program verify method for flash memory
In conventional memory arrays in which a bit line is shared by memory cells, a cell current flows over into neighbor cell(s) in a program verify process, and therefore, the threshold of a memory...
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