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9047973 Group word line erase and erase-verify methods for 3D non-volatile memory  
An erase operation for a 3D stacked memory device assigned storage elements to groups according to an expected erase speed. The storage elements are then erased according to their group to provide...
9042183 Non-volatile semiconductor memory device having non-volatile memory array  
According to one embodiment, a non-volatile semiconductor memory device which is provided with a memory cell array, bit lines, word lines, and a sense amplifier circuit is presented. The memory...
9042184 Non-volatile memory programming  
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines associated with different groups of...
9042181 Periodic erase operation for a non-volatile medium  
An apparatus, system, and method are disclosed for managing erase operations for a data storage medium. A method includes determining whether a use threshold for one or more non-volatile storage...
9042169 Shifting cell voltage based on grouping of solid-state, non-volatile memory cells  
Cells of a solid-state, non-volatile memory are assigned to one of a plurality of groups. Each group is defined by expected symbols stored in the cells in view of actual symbols read from the...
9036416 Non-volatile storage with broken word line screen and data recovery  
Data, normally read using a page-by page read process, can be recovered from memory cells connected to a broken word line by performing a sequential read process. To determine whether a word line...
9036417 On chip dynamic read level scan and error detection for nonvolatile storage  
Techniques for efficiently programming non-volatile storage are disclosed. A second page of data may efficiently be programmed into memory cells that already store a first page. Data may be...
9036424 Memory device and method for verifying the same  
A memory includes a cell string including a plurality of memory cells connected in series, a bit line connected to the cell string, a voltage transfer unit configured to electrically connect the...
9030873 Semiconductor device and method of operating the same  
A method of operating a semiconductor device includes storing a supplying condition of a read voltage inputted from an external source into an internal register to perform a read operation of...
9025389 Erasing method of non-volatile memory device  
A method for erasing a first sub-block of a plurality of sub-blocks included in a block of a non-volatile memory device, wherein the first sub-block includes at least one word line, includes...
9025390 Nonvolatile semiconductor memory device which performs improved erase operation  
According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array and a control unit. The memory cell array includes a plurality of memory cells arranged in a...
RE45497 Programming memory with reduced pass voltage disturb and floating gate-to-control gate leakage  
Program disturb is reduced in a non-volatile storage system by programming storage elements on a selected word line WLn in separate groups, according to the state of their WLn−1 neighbor storage...
9019775 Erase operation for 3D non-volatile memory with controllable gate-induced drain leakage current  
An erase operation for a 3D stacked memory device applies an erase pulse which includes an intermediate level (Vgidl) and a peak level (Verase) to a set of memory cells, and steps up Vgidl in...
9019780 Non-volatile memory apparatus and data verification method thereof  
A non-volatile memory apparatus and a data verification method thereof are provided. The non-volatile memory apparatus includes a plurality of memory cells, a page buffer, a write circuit, a sense...
9019774 Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells  
A flash memory device programs cells in each row in a manner that minimizes the number of programming pulses that must be applied to the cells during programming. The flash memory device includes...
9019773 Nonvolatile memory device and method of operating the same  
A nonvolatile memory device includes a memory cell array and control logic. The memory cell array includes multiple memory blocks, each memory block including memory cells connected to word lines...
9013920 Systems and methods of write precompensation to extend life of a solid-state memory  
Write precomensation mechanisms for non-volatile solid-state memory are disclosed. In one embodiment, programming verify voltage levels are lowered from the default levels in the early life of the...
9013924 Semiconductor device and operating method thereof  
An operating method of a semiconductor device includes precharging bit lines corresponding to selected memory cells, supplying a first verify voltage to a word line coupled to the selected memory...
9007832 Methods for programming a memory device and memory devices  
Methods for programming memory cells and memory devices are disclosed. One such method for programming includes performing a program verify operation of a group of memory cells. A number of...
9007841 Programming scheme for improved voltage distribution in solid-state memory  
Systems and methods are disclosed for reducing programming interference in solid-state memory using a program suspend command. A data storage system includes a non-volatile memory array including...
9007843 Internal data compare for memory verification  
A method and apparatus to program data into a row of a non-volatile memory array and verify, internally to the non-volatile memory array, that the data was successfully programmed. The...
9007829 Memory repairing method, and memory controller and memory storage apparatus using the same  
A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the...
9007826 Non-volatile semiconductor memory device  
In one embodiment, a control circuit executes a first page writing operation, a first verify operations, a second page writing operation, a second verify operations, a step-up operation. The...
9007840 Semiconductor memory apparatus and program verification method  
A non-volatile memory apparatus includes a memory cell array, a power supply configured to generate an operation voltage according to an operation mode and provide the memory cell array with the...
9007842 Retention detection and/or channel tracking policy in a flash memory based storage system  
A method for determining a retention time in a solid state device (SSD), comprising the steps of providing a plurality of write operations to a memory, determining a reference voltage for each of...
9001589 Method for erasing charge trap devices  
A method of erasing charge trap devices includes applying a first erase voltage to the charge trap devices; applying an erase verify voltage to the charge trap devices; performing a current first...
9001582 Nonvolatile semiconductor memory device having a column decoder with multiple data bus portions connected via a switch  
A nonvolatile semiconductor memory device includes memory cells arranged into memory strings with word lines each connected to a different memory cell of the memory strings. The device also...
8995202 Test flow to detect a latent leaky bit of a non-volatile memory  
A technique for detecting a leaky bit of a non-volatile memory includes erasing cells of a non-volatile memory. A bias stress is applied to the cells subsequent to the erasing. An erase verify...
8995198 Multi-pass soft programming  
Disclosed herein are system, method and computer program product embodiments for utilizing soft programming a nonvolatile memory. An embodiment operates by sequentially applying a single soft...
8995200 Non-volatile memory (NVM) with dynamically adjusted reference current  
A sense amplifier is configured to sense a current from a selected bit cell of a non-volatile memory array and compare the sensed current to a reference current to determine a logic state stored...
8995192 Method of programming selection transistors for NAND flash memory  
Disclosed herein is a method that includes providing a non-volatile memory device which includes a plurality of cells, a plurality of selection transistors each having a gate and each coupled to...
8988937 Pre-charge during programming for 3D memory using gate-induced drain leakage  
In a programming operation of a 3D stacked non-volatile memory device, the channel of an inhibited NAND string is pre-charged by gate-induced drain leakage (GIDL) to achieve a high level of...
8988939 Pre-charge during programming for 3D memory using gate-induced drain leakage  
In a programming operation of a 3D stacked non-volatile memory device, the channel of an inhibited NAND string is pre-charged by gate-induced drain leakage (GIDL) to achieve a high level of...
8988947 Back bias during program verify of non-volatile storage  
Different back bias (or body bias) conditions are applied to a non-volatile storage system during different program verify operations of a programming operation. A back bias may be applied during...
8982636 Accessing method and a memory using thereof  
A memory comprises a memory cell, a sense amplifier, and a control unit. The memory cell stores a first bit and a second bit. The sense amplifier senses a first cell current and a second cell...
8982608 Semiconductor device and data processing system  
A semiconductor device having a memory cell including a capacitor and a select transistor with a floating body structure, a bit line connected to the select transistor, a bit line control circuit,...
8982626 Program and read operations for 3D non-volatile memory based on memory hole diameter  
Techniques are provided for programming and reading memory cells in a 3D stacked non-volatile memory device by compensating for variations in a memory hole diameter. The memory hole diameter is...
8982623 Nonvolatile semiconductor memory device  
A non-volatile semiconductor memory device has memory cell arrays, with the memory cells arranged in a matrix configuration and divided into p areas in the column direction, a column redundancy...
8982629 Method and apparatus for program and erase of select gate transistors  
Techniques are provided for programming and erasing of select gate transistors in connection with the programming or erasing of a set of memory cells. In response to a program command to program...
8982625 Memory program disturb reduction  
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method can include applying, during a first pass of programming, a first bias...
8982638 Semiconductor memory device and method of operating the same  
A semiconductor memory device and a method of operating the same perform a program loop, including a program operation and a program verification operation based on a sub-verification voltage...
8976587 Data storage system having multi-bit memory device and operating method thereof  
The operating method of a data storage device includes storing data in a buffer memory according to an external request, and determining whether the data stored in the buffer memory is data...
8976599 Method of programming nonvolatile memory device  
A method of programming a nonvolatile memory device comprises programming target memory cells among a plurality of memory cells connected to a wordline, performing a first sensing operation on the...
8976598 Semiconductor memory device and method of operating the same  
A semiconductor memory device includes a memory block comprising cell strings each of which includes a plurality of memory cells, a current measurement circuit measure a current flowing through a...
8976597 Electrically rewriteable nonvolatile semiconductor memory device  
A control circuit executes an erase operation that includes an erase pulse application operation and an erase verify operation. The erase pulse application operation applies an erase pulse voltage...
8976582 Analog sensing of memory cells in a solid-state memory device  
A memory device that includes a sample and hold circuit coupled to a bit line. The sample and hold circuit stores a target threshold voltage for a selected memory cell. The memory cell is...
8976581 Non-volatile memory capable of programming cells by hot carrier injection based on a threshold voltage of a control cell  
A non-volatile memory system includes a bit line and a plurality of memory cells associated with the bit line and coupled in a serial manner. The system further has a control circuitry in...
8971116 Semiconductor device and method of operating the same  
A semiconductor device includes a plurality of page buffers coupled to bit lines and suitable for performing a verification operation to output a verification signal to a verification terminal,...
8971126 Charge loss compensation methods and apparatus  
Methods and apparatus for compensating for charge loss in memories include tracking a specific block of the main memory array and determining charge loss compensation by comparing pre-cycled and...
8971125 Erase operations with erase-verify voltages based on where in the erase operations an erase cycle occurs  
Memory devices and methods of erasing the memory devices are disclosed. One such method includes performing an erase cycle of an erase operation on a plurality of memory cells, where performing...