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7391650 |
Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
Reading and verify operations are performed on non-volatile storage elements using temperature-compensated read voltages for unselected word lines, and/or for select gates such as drain or source...
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7391649 |
Page buffer and non-volatile memory device including the same
In one aspect, a non-volatile memory device includes a non-volatile memory cell array and a page buffer. The page buffer includes a sense node selectively connected to a bit line of the memory cell...
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7391648 |
Low voltage sense amplifier for operation under a reduced bit line bias voltage
A regulated charge pump, regulated by a plurality of capacitor boost stages and separate from the memory device supply voltage (V cc ), generates a regulated voltage (V SA ) over a range of supply...
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7388787 |
Reference current generator
In a reference current generator, a current mirror has a referent branch with a first current flowing thereon and a mirror branch to produce a second current by mirroring the first current, a first...
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7388767 |
Electrochemical lithography memory system and method
Electronic memory devices fabricated using nanolithography techniques enables rapid and reliable storage of data on a substrate. One such device includes a memory access head, which includes a...
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7385855 |
Nonvolatile memory device having self reprogramming function
A nonvolatile memory device having a self reprogramming function is provided. The nonvolatile memory device includes a memory cell, a first transistor, a second transistor, and a latch circuit. The...
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7385851 |
Repetitive erase verify technique for flash memory devices
Erase verify operations as described herein can be utilized for a flash memory device having an array of memory cells. The erase verify operations employ repetitive erase verify testing to...
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7385848 |
Semiconductor storage device and electronic equipment
A semiconductor storage device has a memory cell array composed of a plurality of arrayed memory cells, word lines, bit lines, a bit line charging and discharging circuit, and a readout section....
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7385838 |
Semiconductor device with a non-erasable memory and/or a nonvolatile memory
A semiconductor device comprises a plurality of memory cells, a central processing unit, a timer circuit which times a RESET time, and a timer circuit which times a SET time. A threshold voltage of...
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7379341 |
Loading data with error detection in a power on sequence of flash memory device
A method of performing a power on sequence for a flash memory includes applying device voltage to the flash memory and loading nonvolatile memory data and nonvolatile memory complementary data to a...
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7379340 |
Sense amplifier circuit in non-volatile semiconductor memory comprising a boosting capacitor for boosting the potential at sense node
A non-volatile semiconductor device has a memory cell array having electrically erasable programmable non-volatile memory cells, reprogramming and retrieval circuits that temporarily store data to...
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7379339 |
Device and procedure for measuring memory cell currents
The invention relates to a procedure and a device for measuring memory cell currents, in particular for non-volatile memory components, where the device has a current mirroring device for mirroring...
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7372737 |
Nonvolatile memory and method of driving the same
The nonvolatile memory according to the present invention can precisely read information included in a memory transistor subject to a shift phenomenon because electrical read is performed on the...
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7369450 |
Nonvolatile memory having latching sense amplifier and method of operation
A memory comprises a sense amplifier for sensing a logic state of a selected bitline. The sense amplifier includes a first precharge circuit, a current-to-voltage converter, a latch circuit, and a...
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7369441 |
Sensing circuit for multi-level flash memory
A sensing circuit for multi-level flash memory is disclosed. The advantages of the sensing circuit are reducing the circuit size, reducing the testing time for tuning reference voltage and...
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7362614 |
Non-volatile semiconductor storage apparatus
A non-volatile semiconductor storage apparatus includes a memory cell array including at least one memory cell unit in which multiple electrically rewritable non-volatile memory cells are serially...
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7362605 |
Nanoelectromechanical memory cells and data storage devices
Nanoelectromechanical (NEM) memory cells are provided by anchoring a conductive nanometer-scale beam (e.g., a nanotube) to a base and allowing a portion of the beam to move. A charge containment...
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7355914 |
Methods and apparatuses for a sense amplifier
Various apparatuses and methods in which a sense amplifier circuit couples to a current source to provide current for the sense amplifier circuit and also couples to one or more memory cells to...
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7355896 |
System for improving endurance and data retention in memory devices
A memory system includes a memory block having at least one memory cell. The current is sensed after the erase operations of the memory cell. A signal is generated in response to the current...
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7352646 |
Semiconductor memory device and method of arranging a decoupling capacitor thereof
A semiconductor memory device with improved operational performance by reducing the level variation of first and second power voltages applied to a sense amplifier by efficiently locating a...
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7352626 |
Voltage regulator with less overshoot and faster settling time
A voltage regulator may include an operational-amplifier section, a capacitor connected to an output of the operational-amplifier section, and a switch configured to connect the capacitor to a...
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7352618 |
Multi-level cell memory device and associated read method
A NOR flash memory device comprises a memory cell adapted to store at least two bits of data. A read operation is performed on the memory cell by generating a reference current with a first...
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7349265 |
Reading method of a NAND-type memory device and NAND-type memory device
A reading method of a NAND memory device includes the steps of first connecting a first end terminal of a stack of cells to a reference line, second connecting a second end terminal of the stack of...
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7349264 |
Alternate sensing techniques for non-volatile memories
The present invention presents a scheme for sensing memory cells. Selected memory cells are discharged through their channels to ground and then have a voltage level placed on the traditional...
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7345928 |
Data recovery methods in multi-state memory after program fail
A non-volatile memory device includes the ability to recover data in event of a program failure without having to maintain a copy of the data until the write is completed. As the integrity of the...
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7342832 |
Bit line pre-settlement circuit and method for flash memory sensing scheme
A flash memory array includes a reference bit line on which a reference current is imposed. During read operation, bit lines selected for reading are connected to current-to-voltage converters,...
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7342831 |
System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates
Reading and verify operations are performed on non-volatile storage elements using temperature-compensated read voltages for unselected word lines, and/or for select gates such as drain or source...
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7342826 |
Semiconductor device
The read speed of an on-chip nonvolatile memory enabling electric rewrite is increased. The nonvolatile memory has a hierarchal bit line structure having first bit lines specific to each of a...
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7339825 |
Nonvolatile semiconductor memory with write global bit lines and read global bit lines
A nonvolatile semiconductor memory is capable of dual and triple operation with a small chip size. A plurality of sectors is formed. Each sector has nonvolatile memory cells, local bit lines...
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7330375 |
Sense amplifier circuit for parallel sensing of four current levels
A single-ended sense amplifier having a precharge circuit for maintaining a stable voltage on a bitline, and a sensing circuit coupled to the bitline for sensing an amount of current flowing into...
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7330374 |
Nonvolatile semiconductor memory device, such as an EEPROM or a flash memory, with reference cells
To set a threshold of a reference cell in short time in a semiconductor memory device using a variable threshold type nonvolatile memory cell as a reference current/voltage generating unit, a...
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7327619 |
Reference sense amplifier for non-volatile memory
One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and...
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7327611 |
Method and apparatus for operating charge trapping nonvolatile memory
A memory cell with a charge trapping structure is operated by measuring current between the substrate region of the memory cell and at least one of the source region of the memory cell and the...
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7327609 |
Methods of program-verifying a multi-bit nonvolatile memory device and circuit thereof
Methods of verifying a program state may be provided for a non-volatile memory device including a multi-bit memory cell transistor providing more than two different program states. More...
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7324393 |
Method for compensated sensing in non-volatile memory
One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and...
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7324383 |
Selective slow programming convergence in a flash memory device
A plurality of memory cells are programmed with incrementally increased programming pulses applied to word lines to which the memory cells are coupled. After each pulse, a verify operation...
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7324382 |
Current-mode sensing structure used in high-density multiple-port register in logic processing and method for the same
A current-mode sensing structure used in a high-density multiple-port register in logic processing and a method for the same are proposed. First, a reference current is defined by a dummy word line...
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7324377 |
Apparatus and method for programming and erasing virtual ground EEPROM without disturbing adjacent cells
A method is described for erasing a selected data region in an NROM cell that is a member of a virtual ground NROM EEPROM array. The method provides that erasing the selected data region does not...
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7321513 |
Semiconductor device and method of generating a reference voltage therefor
A semiconductor device includes at least one reference cell ( 6 ), a cascode circuit ( 8 ) that has at least two current mirror circuits ( 30, 33 and 30, 34 ) and outputs voltages dependent on a...
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7321512 |
Ramp generator and relative row decoder for flash memory device
A non-volatile memory device includes an array of memory cells organized into a plurality of array sectors, with each array sector being singularly addressable through an array wordline. An array...
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7307885 |
Multi-value nonvolatile semiconductor memory device equipped with reference cell and load balancing circuit
A nonvolatile semiconductor memory device includes a plurality of memory cells holding memory cell information, a plurality of bit lines connected to the plurality of memory cells, the plurality of...
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7307869 |
Method and circuit for reading a dynamic memory circuit
A method for reading data from a dynamic memory circuit is provided, wherein at least one memory cell can be addressed via a word line and a bit line, wherein the memory cell is connected to a...
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7304889 |
Serially sensing the output of multilevel cell arrays
A serial sensing scheme may be utilized to sense the information stored on a multilevel cell. The more significant bit of the information in the cell may sense initially. The more significant bit...
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7301827 |
Semiconductor memory device
In a semiconductor memory device for reading out multilevel data in a time-shared manner at different timings, by providing plural control signal lines for controlling the operation timings of the...
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7301814 |
System and method for avoiding offset in and reducing the footprint of a non-volatile memory
A system and method for avoiding offset in and reducing the footprint of a non-volatile memory that has a plurality of memory bank circuits. Each memory bank circuit has memory cells coupled to...
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7289379 |
Memory devices and methods of operation thereof using interdependent sense amplifier control
A memory device includes a control circuit configured to disable a local input/output line sense amplifier responsive to a global input/output line sense amplifier enable signal. The device may...
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7286407 |
Semiconductor device and method for controlling the same
A semiconductor device includes a program voltage supply circuit that supplies a drain of a memory cell with a program voltage, and a pull-down circuit that pulls down a potential of an output of...
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7286399 |
Dedicated redundancy circuits for different operations in a flash memory device
A flash memory device can include a bank including normal memory cells and redundant memory cells arranged in a matrix of rows and columns. A read redundancy circuit is configured to generate read...
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7280406 |
Semiconductor memory device
Provided is a semiconductor memory device compatible with a SRAM and capable of a high-speed data transfer operation while maintaining data reliability. An access to a memory core 6 starts when...
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7280405 |
Integrator-based current sensing circuit for reading memory cells
Near-ground sensing of non-volatile memory (NVM) cells is performed on a selected NVM cell by applying a potential to a first terminal, coupling a second terminal to ground, and then decoupling the...
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