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8179734 |
Semiconductor device
A charge pump circuit, whose output is connected to a first node, starts a boosting operation after start of a test period. A load current application circuit supplies a load current to the first...
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8174885 |
High speed operation method for twin MONOS metal bit array
The present invention provides a novel read method of twin MONOS metal bit or diffusion bit structure for high-speed application. In a first embodiment of the present invention, the alternative...
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8174896 |
Nonvolatile memory device and method of operating the same
A nonvolatile memory device comprises a page buffer unit, a counter, a program pulse application number storage unit, and a program start voltage setting unit. The page buffer is configured to...
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8169823 |
Memory devices having volatile and non-volatile memory characteristics and methods of operating the same
Multi-bit semiconductor memory devices having both volatile and nonvolatile memory characteristics and methods of operating the same are disclosed, the semiconductor memory device including a...
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8164958 |
Memory apparatus and method for operating the same
The invention provides a method for reading a first data storage of a memory cell. The method comprises sensing a first current of the memory cell by applying a first bit line voltage on the memory...
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8164953 |
Memory and boundary searching method thereof
A memory and an operating method thereof are provided therein. When searching a boundary of a threshold voltage distribution of the memory, data errors resulted from tail bits of the memory would...
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8154927 |
Nonvolatile memory device and nonvolatile memory system employing same
A nonvolatile memory device comprises a memory cell array, a row selection circuit and a voltage generator. The memory cell array comprises a first dummy memory cell, a second dummy memory cell,...
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8154936 |
Single-ended bit line based storage system
A single-ended bit line based storage system. The storage system includes a first set of storage cells, a second set of storage cells, a first set of reference storage cells, a second set of...
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8149620 |
Flash memory device having dummy cell
A nonvolatile semiconductor memory device includes a string selection transistor coupled to a bit line. The device also includes a plurality of memory cells coupled in series to the string...
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8145968 |
Method of determining binary signal of memory cell and apparatus thereof
A method and apparatus to determine a binary signal of a memory cell capable of decreasing an error rate of binary signal determination that occur due to neighboring cells and noise, the apparatus...
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8144538 |
Semiconductor device
A semiconductor device to improve layout uniformity may include an active region formed in a substrate, a dummy active region formed in the substrate and separated from the active region, a word...
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8134873 |
Flash memory device and programming/erasing method of the same
A flash memory device includes a bulk region, first through nth memory cell transistors arranged in a row on the bulk region, first through nth word lines respectively connected to gates of the...
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8134869 |
Semiconductor memory having electrically erasable and programmable semiconductor memory cells
An electrically alterable non-volatile multi-level memory device and a method of operating such a device, which includes setting a status of at least one of the memory cells to one state selected...
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8130584 |
Semiconductor device and control method of the same
The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12)...
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8125831 |
Sensing against a reference cell
Memory devices, bulk storage devices, and methods of operating memory are disclosed, such as those adapted to process and generate analog data signals representative of data values of two or more...
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8125827 |
Flash memory systems and operating methods using adaptive read voltage levels
Some embodiments of the present invention provide methods of operating nonvolatile memory devices. Reference data is stored in a plurality of memory cells. The reference data is read, and a...
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8125825 |
Memory system protected from errors due to read disturbance and reading method thereof
A method of reading a memory system including a flash memory includes: reading data from a page in a first block of the flash memory, incrementing a counter each time data is read from the page to...
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8125833 |
Adaptive dynamic reading of flash memories
A data storage device includes a controller and storage elements. The controller is configured to read a threshold voltage of each of a plurality of the storage elements to generate read threshold...
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8111553 |
Non-volatile semiconductor memory device in which program disturb is reduced and method of programming the same
A non-volatile semiconductor memory device capable of reducing program disturb and a method of programming the same are provided. A bit line connected to a non-selected memory cell in the same...
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8111556 |
Nonvolatile memory device and method of operating the same
A nonvolatile memory device and a method of operating the same. The nonvolatile memory device includes a memory cell array including memory cells for storing data, a temperature sensor and a...
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8107291 |
Method of programming flash memory device
A method of programming data in a flash memory device is disclosed. The memory device includes a memory cell array which in turn includes at least one block, and the block in turn includes a...
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8107297 |
Method of reading nonvolatile memory device and method of operating nonvolatile memory device
A method of reading a nonvolatile memory device may include, after an nth erase operation is performed, reading dummy cells on which a program operation has been performed based on a first read...
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8102713 |
Non-volatile memory monitor
The invention provides circuits, systems, and methods for monitoring a non-volatile memory (NVM) cell, or an array of NVM cells. The monitor is capable of switching from a normal operating state to...
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8102718 |
Method for programming a floating gate
The invention provides methods for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an...
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8094494 |
Memory and operation method therefor
In an operation method for a memory including a plurality of memory cells, a first reading is performed on the memory cells by applying a reference voltage; the reference voltage is moved if it is...
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8094493 |
Memory devices and methods using improved reference cell trimming algorithms for accurate read operation window control
A memory device is disclosed that includes a plurality of word lines and a plurality of memory cells operating in one of a plurality of modes and coupled to at least one of the word lines. The...
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8089804 |
Non-volatile semiconductor memory device using weak cells as reading identifier
A non-volatile semiconductor memory is configured to monitor for onset of a read disturbance (e.g., due to soft programming) and to carry out operations to protect data therein. A non-volatile...
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8089813 |
Controllable voltage reference driver for a memory system
A voltage reference driver includes a voltage divider circuit with a voltage reference output node to output a voltage between a first voltage and a second voltage. The voltage reference driver...
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8089812 |
Semiconductor memory device
A semiconductor memory device can reduce a circuit area necessary for row repair. The semiconductor memory device includes a plurality of memory banks, a plurality of cell arrays arranged in each...
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8089811 |
Flash memory devices with memory cells strings including dummy transistors with selective threshold voltages
Flash memory devices include a first memory cell string including a plurality of serially-connected memory cells and first and second serially-connected dummy transistors configured to couple the...
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8085592 |
Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof
Operation methods of charge-trap flash memory devices having an unused memory cell for data storage and a normal memory cell used for data storage are discussed. The operation method may include...
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8085591 |
Charge loss compensation during programming of a memory device
In programming a selected word line of memory cells, a first program verify or read operation is performed, after one page of a selected word line is programmed, in order to determine a first...
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8085599 |
Memory device and method for estimating characteristics of multi-bit programming
Memory devices and/or methods that may estimate characteristics of multi-bit cell are provided. A memory device may include: a multi-bit cell array; a monitoring unit to extract a threshold voltage...
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8081523 |
Circuit with a memory array and a reference level generator circuit
A circuit comprises an array of memory cells (10). A plurality of sensing circuits (20), are coupled to the output (14) of respective memory cells (10), for comparing the output signal of the...
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8077520 |
Determining threshold voltage distribution in flash memory
Methods, apparatuses, and systems for comparing threshold voltages of a plurality of flash memory cells to a plurality of reference voltages. A number of flash memory cells having threshold...
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8077515 |
Methods, devices, and systems for dealing with threshold voltage change in memory devices
The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control...
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8072802 |
Memory employing redundant cell array of multi-bit cells
A memory that employs a redundant cell array for recovery of one or more failed core cell arrays of multi-bit memory cells is described. The memory includes a plurality of core cell arrays, at...
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8072815 |
Array of non-volatile memory cells including embedded local and global reference cells and system
An array of memory cells has a first side adjacent to a first column, a second side opposite the first side, a third side adjacent to a first row, and a fourth side opposite the third side. Each...
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8068367 |
Reference current sources
Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current source, all coupled to an electrical...
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8068368 |
Method of performing read operation in flash memory device
A method of performing a read operation in a flash memory device is disclosed. The flash memory has a memory cell array including at least one block, the block having a plurality of pages. The...
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8064262 |
Semiconductor device and method using stress information
A semiconductor device in accordance with one embodiment of the invention can include a first data storage region including a non-volatile main data storage region. Additionally, the semiconductor...
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8064261 |
Semiconductor nonvolatile memory device
An operation scheme for operating stably a semiconductor nonvolatile memory device is provided. When hot-hole injection is conducted in the semiconductor nonvolatile memory device of a split gate...
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8059468 |
Switched bitline VTH sensing for non-volatile memories
A transistor provides a voltage source commonly switched by SE and SO switches to pre-charge both the even bitline and the odd bitline. The SE and SO switches are open during a sensing stage to...
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8054689 |
Memory card using multi-level signaling and memory system having the same
A memory card including a memory controller, a memory system and a method to control a memory are provided. The memory card includes a flash memory, a memory interface outputting a writing data...
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8050100 |
Non-volatile semiconductor memory device with a sense amplifier reference circuit having a MONOS transfer transistor
A non-volatile semiconductor memory device includes a sense amplifier, first and second bit lines that are connected to the sense amplifier, a first memory cell column that is connected to the...
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8050089 |
Multi-bit flash memory device and memory cell array
A flash memory device includes a plurality of memory blocks. A selected memory block among the plurality of memory blocks includes 2n pages of data. The selected memory block includes different...
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8045383 |
Non-volatile memory devices including dummy word lines and related structures and methods
A non-volatile memory device may include a semiconductor substrate including an active region at a surface thereof, a first memory cell string on the active region, and a second memory cell string...
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8045389 |
Semiconductor memory device
A dummy cell array is provided in a memory cell array, and an intermediate buffer is provided between input/output circuits, whereby control signals to the input/output circuits can be operated at...
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8045388 |
Semiconductor device and control method of the same
The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit (16) connected to a core cell (12)...
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8045385 |
Methods of operating nonvolatile memory devices to inhibit parasitic charge accumulation therein
Methods of operating a charge trap nonvolatile memory device include operations to erase a first string of nonvolatile memory cells by selectively erasing even-numbered nonvolatile memory cells in...
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