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7382650 |
Method and apparatus for sector erase operation in a flash memory array
A memory device is provided which includes a substrate, a common P-well isolated from the substrate, a plurality of sectors, and a common sector selection transistor configured to select one of the...
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7382656 |
Nonvolatile memory with program while program verify
A page mode program sequence is described that includes first and second bias applying cycles. In the first cycle, a program bias is applied to a first part of a page of memory cells, while a...
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7382653 |
Electrically rewritable non-volatile semiconductor memory device
A first selection transistor is connected between one end of a memory cell group and a bit line. A second selection transistor which has a gate length shorter than a gate length of the first...
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7379335 |
Nonvolatile semiconductor memory device and a method for programming NAND type flash memory
A non-volatile semiconductor memory device comprise a memory cell array having a plurality of memory cell units each having a plurality of electrically-programmable memory cell connected in series,...
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7379346 |
Erase inhibit in non-volatile memories
A non-volatile memory and method for its operation that can reduce the amount of disturb in non-selected cells during an erase process are presented. For a set of storage elements formed over a...
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7379338 |
Method and system for regulating a program voltage value during multilevel memory device programming
Regulating a program voltage value during multilevel memory device programming includes utilizing a program path duplicate in an output pump regulator circuit. Further, the output pump regulator...
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7379337 |
Flash memory device and read operation method thereof
A flash memory device having a function of selectively changing a precharge voltage for a sensing node and a read operation method thereof. The flash memory device includes a memory cell array, a...
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7376019 |
Nonvolatile semiconductor memory
The nonvolatile semiconductor memory includes a plurality of memory devices for storing data, a write circuit for supplying a high voltage for data writing, a plurality of selectors connected...
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7376015 |
Nonvolatile memory, semiconductor device, and method of programming to nonvolatile memory
Disclosed is a nonvolatile memory with a shortened total write time, capable of stably writing data by making a write current constant while reducing fluctuations in a voltage generated by a...
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7376017 |
Flash memory device and program method thereof
A flash memory device which comprises a memory cell array having memory cell arranged in rows and columns; a word line voltage generator circuit configured to generate a program voltage, a...
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7376009 |
Semiconductor memory device which stores plural data in a cell
A memory cell array is configured to have a plurality of memory cells arranged in a matrix, each of the memory cells being connected to a word line and a bit line and being capable of storing n...
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RE40311 |
Zero-power programmable memory cell
A zero-power electrically erasable and programmable memory cell is implemented in CMOS (complementary metal oxide semiconductor) technology. A P-channel sense transistor has a source coupled to a...
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7372740 |
Semiconductor memory device
Based on a continuous erase start signal outputted, in response to an inputted continuous erase command, from a continuous erase control circuit, a shift circuit outputs a control signal for giving...
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7372736 |
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
A nonvolatile memory array has a single transistor flash memory cell and a two transistor EEPROM memory cell which maybe integrated on the same substrate. The nonvolatile memory cell has a floating...
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7369436 |
Vertical NAND flash memory device
Memory devices, arrays, and strings are included that facilitate the use of vertical floating gate memory cells in NAND architecture memory strings, arrays, and devices. NAND Flash memory strings,...
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7366019 |
Nonvolatile memory
There is provided a non-volatile memory capable of being supplied with two varieties of externally supplied voltages, stabilizing the operation thereof, at a voltage in the vicinity of a threshold...
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7366027 |
Method and apparatus for erasing memory
The present invention provides a method and apparatus for erasing memory blocks. The apparatus includes a first plurality of memory cells formed in a substrate and a second plurality of memory...
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7366020 |
Flash memory device capable of preventing an overerase of flash memory cells and erase method thereof
We describe a NAND flash memory device including a memory cell array formed on a substrate including a plurality of cell strings each including a string selecting transistor, a ground selecting...
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7362616 |
NAND flash memory with erase verify based on shorter evaluation time
A non-volatile memory device is proposed. The non-volatile memory device includes a plurality of memory cells each one having a programmable threshold voltage, and means for reading a set of...
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7362609 |
Memory cell
A one-transistor (1T) NVRAM cell that utilizes silicon carbide (SiC) to provide both isolation of non equilibrium charge, and fast and non destructive charging/discharging. To enable sensing of...
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7362615 |
Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices
A NAND flash memory device incorporates a unique booster plate design. The booster plate is biased during read and program operations and the coupling to the floating gates in many cases reduces...
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7359251 |
Non-volatile semiconductor memory device, erase method for same, and test method for same
A non-volatile semiconductor memory device includes a memory cell array and an operation control circuit. The memory cell array includes a plurality of non-volatile memory cells that are...
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7355891 |
Fabricating bi-directional nonvolatile memory cells
A memory transistor having a pair of separate floating gates overlying end regions of a channel and a control gate that overlies the floating gates and a central region of the channel effectively...
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7355886 |
Method of programming, erasing and reading memory cells in a resistive memory array
The present approach is a method of writing (which may be programming or erasing) data to a selected memory cell of a memory array. The array includes a plurality of word lines, a plurality of bit...
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7355893 |
Semiconductor memory device and method for writing to semiconductor memory device
The semiconductor memory device comprising: an n-channel memory cell transistor including: a first diffused region and a second diffused region formed in a semiconductor substrate; a charge storage...
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7355903 |
Semiconductor device including memory cells and current limiter
A semiconductor device, including a memory cell having a control gate, a source and drain; and a current limiting circuit coupled to the source. The current limiting circuit may be configured to...
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7355887 |
Non-volatile semiconductor memory device having non-selected word lines adjacent to selected word lines being charged at different timing for program disturb control
A non-volatile semiconductor memory device comprises a memory cell array of data-rewritable non-volatile memory cells or memory cell units containing the memory cells, and a plurality of word lines...
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7352626 |
Voltage regulator with less overshoot and faster settling time
A voltage regulator may include an operational-amplifier section, a capacitor connected to an output of the operational-amplifier section, and a switch configured to connect the capacitor to a...
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7352631 |
Methods for programming a floating body nonvolatile memory
A technique to speed up the programming of a non-volatile memory device that has a floating body actively removes holes from the floating body that have accumulated after performing hot carrier...
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7352625 |
Semiconductor memory device and memory card
A semiconductor memory device disclosed herein includes: a first select gate line, a gate electrode of a first select transistor connected to the first select gate line; a second select gate line,...
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7352632 |
Non-volatile semiconductor memory device
A memory cell has a selection transistor constituted of an MOS transistor having a gate electrode and a cell transistor constituted of an MOS transistor having the same polarity as the selection...
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7348829 |
Slew rate control of a charge pump
A charge pump system including a clock circuit and a charge pump circuit is provided. The clock circuit provides a first clock with a frequency based on a memory block select signal indicative of...
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7349262 |
Methods of programming silicon oxide nitride oxide semiconductor (SONOS) memory devices
A method of programming a silicon oxide nitride oxide semiconductor (SONOS) memory device is provided. The SONOS memory device includes a substrate, first and second impurity regions spaced apart...
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7349265 |
Reading method of a NAND-type memory device and NAND-type memory device
A reading method of a NAND memory device includes the steps of first connecting a first end terminal of a stack of cells to a reference line, second connecting a second end terminal of the stack of...
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7348832 |
Dual-voltage generation system
A voltage generation system for generating operating voltages for memory devices, especially non-volatile memories, from a single external high voltage source. In one embodiment, the system...
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7345919 |
Semiconductor device that enables simultaneous read and write/read operation
A semiconductor device includes a memory cell array including a plurality of cores, each of said cores including one block or a plurality of blocks. The semiconductor device further includes a...
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7345916 |
Method and apparatus for high voltage operation for a high performance semiconductor memory device
A method and apparatus are provided for high performance, high voltage memory operations on selected memory cells ( 200 ) of a semiconductor memory device ( 100 ). A high voltage generator ( 106 )...
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7345905 |
Memory device with time-shifting based emulation of reference cells
A memory device includes a plurality of memory cells and a comparison circuit that compares a set of selected memory cells with at least one reference cell having a threshold voltage. The...
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7345922 |
Position based erase verification levels in a flash memory device
The location of a cell to be erase verified is determined. The erase verification threshold voltage is then set. The threshold voltage is changed in response to the cell's location with respect to...
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7345925 |
Soft erasing methods for nonvolatile memory cells
Erasure methods for a nonvolatile memory cell that includes a gate electrode on a substrate, source and drain regions in the substrate at respective sides of the gate electrode, and a charge...
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7345918 |
Selective threshold voltage verification and compaction
Non-volatile memory devices for providing selective compaction verification and/or selective compaction to facilitate a tightening of the distribution of threshold voltages in memory devices...
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7345923 |
Wordline voltage generation circuit and nonvolatile memory device with the same
A wordline voltage generation circuit generates an incremental step pulse voltage and includes a first circuit unit connected to a program voltage, a second circuit unit connected between the first...
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7342827 |
Charge trap-type 3-level non-volatile semiconductor memory device and method of driving the same
Disclosed herein is a charge trap-type 3-level non-volatile semiconductor memory device and method of driving the same. The charge trap-type 3-level non-volatile semiconductor memory device...
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7342821 |
Hot-carrier-based nonvolatile memory utilizing differing transistor structures
A memory circuit includes a latch having a first node and a second node, a first MIS transistor operable to couple between the first node and a predetermined node, a second MIS transistor operable...
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7342828 |
Nonvolatile semiconductor memory device
In a nonvolatile memory cell, a selection transistor is connected to a memory cell transistor in series. The selection transistor is formed into a double layer gate structure, and has a voltage of...
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7342829 |
Memory device and method for operating a memory device
A memory device ( 1 ) includes a memory array ( 2 ). The memory array ( 2 ) has at least one memory area ( 5 ) that includes a plurality of conductive lines ( 3 ) and a plurality of memory cells (...
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7343239 |
Program rewriting system and program rewriting method
Program data stored in the recording medium of a general control apparatus coupled to a network is stored in the recording medium of a control apparatus as a rewritten subject of program data in...
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7339829 |
Ultra low power non-volatile memory module
An improved ultra-low power NVM module, which exhibits low power consumption and reduced layout area. An array of compact flash memory cells are programmed and erased in response to positive and...
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7339828 |
Nonvolatile semiconductor memory device with memory cells, each having an FG cell transistor and select gate transistor, and a method of writing data into the same
A semiconductor device comprises a memory cell array and a source line driver. Each of the memory cells in the memory cell array has a floating gate cell transistor which stores data by...
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7339827 |
Non-volatile semiconductor memory device and writing method thereof
In connection with rise and fall of a word line bias, the present invention adopts a procedure such that a diffusion region voltage Vs on a memory transistor side is changed, and after the voltage...
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