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7463528 Temperature compensation of select gates in non-volatile memory  
Reading and verify operations are performed on non-volatile storage elements using temperature-compensated read voltages for unselected word lines, and/or for select gates such as drain or source...
7463531 Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages  
Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line....
7463522 Non-volatile storage with boosting using channel isolation switching  
Non-volatile storage in which program disturb is reduced by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel...
7463520 Memory device with variable trim settings  
A memory device includes a memory array including a plurality of cells. The cells are divided into a plurality of subsets. Each subset has at least one associated trim parameter. The trim parameter...
7463533 Nonvolatile semiconductor storage device  
A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and...
7463523 Semiconductor memory device and method of driving a semiconductor memory device  
A semiconductor memory device includes a semiconductor layer; a source layer provided in the semiconductor layer; a drain layer provided in the semiconductor layer; a body region provided in the...
7463518 Layout structure for use in flash memory device  
A flash memory device includes a core region, high-voltage pump regions disposed at one side of the core region, and a peripheral control region disposed at one side of the core region and between...
7460398 Programming a memory with varying bits per cell  
Memory devices adapted to receive and transmit analog data signals representative of two or more bits, such as to facilitate increases in data transfer rates relative to devices communicating data...
7460405 Method for controlling nonvolatile memory device  
Data is written to a nonvolatile memory device having a memory region of four bits or larger in one memory cell sandwiched by a source and a drain with an improved accuracy. The nonvolatile memory...
7460404 Boosting for non-volatile storage using channel isolation switching  
Program disturb is reduced in non-volatile storage by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of...
7460397 Method for reading multiple-value memory cells  
A read method for multiple-value information in a semiconductor memory such as a nonvolatile semiconductor memory is introduced. The method includes obtaining a first data from a selected...
7460408 Semiconductor memory device of single-bit-line drive type  
A semiconductor memory device includes a plurality of word lines, first and second bit lines, a plurality of memory cells which are connected to the first and second bit lines, a differential...
7457178 Trimming of analog voltages in flash memory devices  
A flash memory device of the multi-level cell (MLC) type, in which control gate voltages in read and programming operations and a bandgap reference voltage source are trimmable from external...
7457163 System for verifying non-volatile storage using different voltages  
When performing a data sensing operation, including a verify operation during programming of non-volatile storage elements (or, in some cases, during a read operation after programming), a first...
7457168 Non-volatile memory device and associated method of erasure  
Disclosed is a non-volatile memory device and a method of erasing the non-volatile memory device. An erase voltage is simultaneously applied to a plurality of sectors contained in the non-volatile...
7457156 NAND flash depletion cell structure  
NAND architecture Flash memory strings, memory arrays, and memory devices are described that utilize depletion mode floating gate memory cells. Depletion mode floating gate memory cells allow for...
7457184 Dielectric relaxation memory  
A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy...
7457161 Nonvolatile memory apparatus  
Current consumption in a nonvolatile memory apparatus operable on two or more different power voltages is to be substantially reduced in its standby mode. A stepped-down power supply unit provided...
7457166 Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage  
The erase voltage applied to a set of non-volatile storage elements being erased is structured to provide controlled shifts in the threshold voltage of the storage elements. The erase voltage is...
7454188 Version-programmable circuit module  
A circuit module contains a sub-circuit that is capable of providing a level of performance dependent on the version number that is stored in a version number memory. The version number is passed...
7453731 Method for non-volatile memory with linear estimation of initial programming voltage  
In a non-volatile memory, a selected page on a word line is successively programmed by a series of voltage pulses of a staircase waveform with verifications in between the pulses until the page is...
7453733 Nonvolatile semiconductor memory device and a method of word lines thereof  
A nonvolatile semiconductor memory device having a first circuit for selecting one from a plurality of blocks, the first circuit having a plurality of transistors connected to word lines connected...
7453735 Non-volatile memory and control with improved partial page program capability  
In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the...
7453730 Charge packet metering for coarse/fine programming of non-volatile memory  
A non-volatile memory device is programmed by first performing a coarse programming process and subsequently performing a fine programming process. The coarse/fine programming methodology is...
7453729 Bit line setup and discharge circuit for programming non-volatile memory  
A NAND EEPROM having a shielded bit line architecture reduces supply voltage and ground noise resulting from charging or discharging bit lines. The EEPROM has a PMOS pull-up transistor and an NMOS...
7450423 Methods of operating non-volatile memory cells having an oxide/nitride multilayer insulating structure  
A method of operating a memory cell by applying a positive voltage to the gate sufficient to cause hole tunneling from the gate toward the charge storage layer is disclosed. The method is applied...
7450429 Method and apparatus for a dual power supply to embedded non-volatile memory  
A charge pump is configured to receive an external voltage level and generate a high voltage level, wherein the high voltage level is higher than the external voltage level. A memory control...
7450430 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages  
Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line....
7450417 Nonvolatile semiconductor memory device  
There is provided a nonvolatile semiconductor memory device capable of accelerating writing time and avoiding readout errors of information by eliminating variation in threshold voltage of...
7450424 Method for reading a memory array with a non-volatile memory structure  
A method for reading a memory array is disclosed. The method includes turning on the column of select gates; preprogramming a first right floating gate to a high threshold and a first left floating...
RE40567 Flash memory device of capable of sensing a threshold voltage of memory cells on a page mode of operation  
A method for determining data stored by a memory cell. The memory cell has a select gate coupled to a wordline, a first electrode coupled to a bitline, and a second electrode coupled to a...
7447073 Method for handling a defective top gate of a source-side injection flash memory array  
A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high...
7447067 Method and apparatus for programming multi level cell flash memory device  
A method of programming a selected cell in a multi-level flash memory device comprises determining whether to program an upper bit or a lower bit of a selected memory cell, detecting a current...
7447076 Systems for reverse reading in non-volatile memory with compensation for coupling  
Shifts in the apparent charge stored by a charge storage region such as a floating gate in a non-volatile memory cell can occur because of electrical field coupling based on charge stored in...
7447064 System and method for providing a CMOS compatible single poly EEPROM with an NMOS program transistor  
A system and method is disclosed for providing a CMOS compatible single poly electrically erasable programmable read only memory (EEPROM) with memory cells that comprise an NMOS program transistor....
7447065 Reducing read disturb for non-volatile storage  
A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the...
7443736 Substrate electron injection techniques for programming non-volatile charge storage memory cells and for controlling program disturb  
A programming technique for a flash memory causes electrons to be injected from the substrate into charge storage elements of the memory cells. The source and drain regions of memory cells along a...
7443730 Flash memory device including blocking voltage generator  
A non-volatile memory device includes an array of flash memory cells therein and a voltage generator. The voltage generator is configured to generate a program voltage (Vpgm), a pass voltage...
7443734 Semiconductor memory device with a voltage generating circuit which generates a plurality of voltages using a small number of items of data  
In a memory cell array, a plurality of memory cells connected to word lines and bit lines are arranged in a matrix. A storage section stores an initial value of a write voltage corresponding to a...
7440320 Row decoder for preventing leakage current and semiconductor memory device including the same  
A row decoder preventing leakage current and a semiconductor memory device including the same are provided. The row decoder includes an address decoder and a selection signal generator. The address...
7440315 Method, apparatus and computer program product for stepped reset programming process on programmable resistive memory cell  
A method, system and computer program product for resetting a phase change memory cell having a memory cell threshold voltage is disclosed. The method includes reading a resistance of the memory...
7440328 Operation methods for a non-volatile memory cell in an array  
A method of reducing gate disturb in a charge-trapping layer memory cell by applying different Vpass voltages to different sides of a selected wordline. A higher Vpass voltage is used to pass...
7440322 Method and system for flash memory devices  
Method and system for memory devices is provided. The system includes a plurality of non-volatile storage elements connected in a string between a source side element and a drain side element; a...
7440324 Apparatus with alternating read mode  
Shifts in the apparent charge stored on a floating gate (or other charge storage element) of a non-volatile memory cell can occur because of the coupling of an electric field based on the charge...
7440326 Programming non-volatile memory with improved boosting  
Non-volatile storage elements are programmed in a manner that reduces program disturb, particularly at the edges storage elements strings, by using modified pass voltages. In particular, during the...
7440327 Non-volatile storage with reduced power consumption during read operations  
A non-volatile storage device in which power consumption is reduced by providing reduced read pass voltages on unselected word lines during a read operation. A programming status of one or more...
7440317 One transistor SOI non-volatile random access memory cell  
One aspect of the present subject matter relates to a memory cell, or more specifically, to a one-transistor SOI non-volatile memory cell. In various embodiments, the memory cell includes a...
7436703 Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices  
A NAND flash memory device incorporates a unique booster plate design. The booster plate is biased during read and program operations and the coupling to the floating gates in many cases reduces...
7436709 NAND flash memory with boosting  
A floating gate memory array includes row control circuits that provide a programming voltage to a selected word line and provide a stair-like pattern of boosting voltages to unselected word lines....
7436716 Nonvolatile memory  
A nonvolatile memory includes circuits each having first control transistors, memory transistors, second control transistors and memory transistors repeatedly connected in series in sequence....
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