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7038948 Read approach for multi-level virtual ground memory  
The present invention pertains to a technique for determining the level of a bit in a dual sided ONO flash memory cell where each of the bits of the dual sided ONO flash memory cell can be...
7038282 Semiconductor storage device  
A semiconductor storage device includes a voltage supply circuit generating a voltage of 5V, a voltage polarity inversion circuit generating a voltage of −5V, a select-and-connect circuit...
7038947 Two-transistor flash cell for large endurance application  
An nonvolatile memory device having improved endurance is comprised of an array of nonvolatile memory cells arranged in rows and columns. Each memory cell is composed of a program transistor and...
7035146 Programming non-volatile memory  
One or more programming operations are performed on a set of non-volatile storage elements. For example, the programming operations may include applying a set of programming pulses. A verify...
7035145 Programming methods for multi-level flash EEPROMs  
A method is provided for programming a memory cell of an electrically erasable programmable read only memory. The memory cell is fabricated on a substrate and comprises a source region, a drain...
7031192 Non-volatile semiconductor memory and driving method  
A data control unit is used to proved program, erase and verify signals to a non-volatile metal-oxide3-nitride-oxide-semiconductor (MONOS) memory. The data control unit comprises a plurality of...
7031210 Method of measuring threshold voltage for a NAND flash memory device  
Provided is a method of measuring threshold voltages in a NAND flash memory device. In the method, a test voltage is applied to a wordline of selected memory cells to measure a distribution profile...
7031197 EEPROM writing and reading method  
An electrically erasable programmable read-only memory receives a single supply voltage and a ground voltage, and generates a first voltage higher than both the supply voltage and the ground...
7031191 Stabilization method for drain voltage in non-volatile multi-level memory cells and related memory device  
A method and an electronic device for stabilizing the voltage on the drain terminals of multi-level non-volatile memory cells during programming thereof. The voltage is provided by a drain voltage...
7023740 Substrate bias for programming non-volatile memory  
A method and system for substrate bias for programming non-volatile memory. A bias voltage is applied to a deep well structure under a well comprising a channel region for a non-volatile memory...
7020025 Nonvolatile semiconductor memory  
A semiconductor memory includes a memory cell array having a memory cell units, configured from memory cell transistors connected in a column, which have a first and a second control gate disposed...
7020017 Variable programming of non-volatile memory  
Systems and methods in accordance with various embodiments can provide for reduced program disturb in non-volatile semiconductor memory. In one embodiment, select memory cells such as those...
7020026 Bitline governed approach for program control of non-volatile memory  
In a system for programming non-volatile storage, technology is disclosed for programming with greater precision and reasonable program times. In one embodiment, a first voltage is applied to a bit...
7020020 Low voltage non-volatile memory cells using twin bit line current sensing  
A non-volatile memory cell operating at low voltage by means of impact ionization for programming. Impact ionization arises from a charge injector, such as a diode, created in the substrate of a...
7020024 Methods and devices for increasing voltages on non-selected wordlines during erasure of a flash memory  
A flash memory can operate by providing a first voltage level from a row decoder to a wordline associated with a cell of a flash memory device. An address provided to the row decoder is decoded...
7016225 Four-bit non-volatile memory transistor and array  
A non-volatile memory cell capable of storing more than two bits of information. The NVM cell includes a semiconductor region having a first conductivity type, and a plurality of field isolation...
7016233 Wordline decoder and memory device  
A wordline decoder for a memory device drives a word line of a memory array and comprises a first circuit, a second circuit, and a buffer circuit. The first circuit receives voltage from a first...
7012836 Nonvolatile memory and method of restoring of failure memory cell  
An electrically writable/erasable nonvolatile semiconductor memory such as an AND-type or NOR-type flash memory having an array structure, in which numerous memory cells are connected in parallel...
7012838 Nonvolatile semiconductor memory device supplying proper program potential  
A nonvolatile semiconductor memory device includes a plurality of blocks each having a nonvolatile memory cell array, and a program potential generating circuit which supplies a program potential...
7009882 Bit switch voltage drop compensation during programming in nonvolatile memory  
A method is provided of regulating a supply voltage for providing a bit line voltage in a semiconductor memory device where the bit line voltage is provided to memory cells in a bit line from the...
7009888 Low voltage, island-layer-based nonvolatile semiconductor storage device with floating biased memory cell channel  
A method for driving a nonvolatile memory device including a semiconductor substrate, an island semiconductor layer on the substrate, a memory cell having a control gate and a charge storage layer...
7002849 Method for programming and erasing non-volatile memory with nitride tunneling layer  
A method for programming and erasing a non-volatile memory with a nitride tunneling layer is described. The non-volatile memory is programmed by applying a first voltage to the gate and grounding...
6999346 Memory device comprising single transistor having functions of RAM and ROM and methods for operating and manufacturing the same  
A memory device including a single transistor having functions of RAM and ROM and methods for operating and manufacturing the same are provided. The memory device includes a single transistor...
6999345 Method of sense and program verify without a reference cell for non-volatile semiconductor memory  
A method and circuit for verify and read of a nonvolatile memory cell without the use of a reference cell is described. The circuit comprises a sense amplifier that compares a voltage from the...
6996012 Nonvolatile memory device capable of preventing over-erasure via modified tunneling through a double oxide layer between a floating gate and a control gate  
A non-volatile memory device and a method for driving the same prevent an excessive electron erasing phenomenon without additional components. Each memory cell includes a tunnel oxide layer, a...
6992938 Methods and apparatuses for test circuitry for a dual-polarity non-volatile memory cell  
Various apparatuses and methods are shown in which an integrated circuit includes a dual-polarity non-volatile memory cell and a test circuit. The test circuit has a bias voltage generator and a...
6992930 Semiconductor memory device, method for driving the same and portable electronic apparatus  
A method for driving a semiconductor memory device includes a memory array having a plurality of memory cells arranged in rows and columns. Each memory cell includes a gate electrode formed on a...
6992925 High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline  
A programmable memory cell comprised of a transistor located at the crosspoint of a column bitline and a row wordline is disclosed. The transistor has its gate formed from the column bitline and...
6990020 Non-volatile memory cell techniques  
A non-volatile memory cell ( 10 ) includes a charge-storing node ( 16 ). An electrically insulating first layer ( 76 ) is coupled between the node and a source of a first voltage ( 22 ). An...
6990019 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell  
A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit...
6987694 Methods of programming non-volatile semiconductor memory devices including coupling voltages and related devices  
A non-volatile memory device may include a string of serially connected memory cell transistors with each memory cell transistor of the string being connected to a different word line. The...
6987696 Method of improving erase voltage distribution for a flash memory array having dummy wordlines  
Techniques for erasing memory devices of a flash memory array having a plurality of operative wordlines and at least one dummy wordline adjacent an end one of the operative wordlines are disclosed....
6987695 Writing data to nonvolatile memory  
In some embodiments, of the present invention, data are written to a plurality of nonvolatile memory cells (Q 0 , Q 15 ) as follows. A data writing signal is supplied to one of the memory cells (Q...
6985397 Semiconductor storage device and portable electronic equipment having the same  
A semiconductor storage device has a variable-stage charge pump, and a memory cell array to which an output from an output line of the variable-stage charge pump is fed. In the variable-stage...
6984862 Storage device with charge trapping structure and methods  
A storage device includes a first semiconducting layer having a p-dopant and a second semiconducting layer having an n-dopant, disposed on the first semiconducting layer forming a junction between...
6980472 Device and method to read a 2-transistor flash memory cell  
The present invention relates to electronic memories, more particularly to an improved method and apparatus to read the content of compact 2-transistor flash memory cells. A method of reading a...
6977843 Semiconductor memory device with malfunction prevention device, and portable electronic apparatus using the same  
A semiconductor memory device has a malfunction prevention device and a nonvolatile memory. The nonvolatile memory is a memory cell including: a gate electrode formed on a semiconductor layer via...
6975537 Source side self boosting technique for non-volatile memory  
A non-volatile semiconductor memory system (or other type of memory system) is programmed in a manner that avoids program disturb. In one embodiment that includes a flash memory system using a NAND...
6970385 Non-volatile semiconductor memory device suppressing write-back fault  
A resistor is connected to a source line of memory cells, a write-back operation is performed to memory cells on a single unit basis. With the resistor connected, there is suppressed, in a...
6970384 Programming method of flash memory device  
Provided is a programming method of a flash memory device. The method includes programming a memory cell for a first programming time, detecting whether or not the memory cell is programmed and...
6963504 Apparatus and method for disturb-free programming of passive element memory cells  
In a passive element memory array, such as a rail stack array having a continuous semiconductor region along one or both of the array lines, programming a memory cell may disturb nearby memory...
6963506 Circuit and technique for accurately sensing low voltage flash memory devices  
An exemplary sensing circuit for sensing the current drawn by a target memory cell comprises a first transistor connected across a first node and a second node, a load connected across the second...
6963503 EEPROM with improved circuit performance and reduced cell size  
An EEPROM cell with reduced cell size and improved circuit performance includes a high-voltage (HV) capacitor, a low-voltage (LV) read path, and an HV write path, wherein either the HV capacitor is...
6961266 Method of programming/reading multi-level flash memory using sensing circuit  
A method of programming a multi-level flash memory using a sensing circuit according to the present invention performs an automatic verification program method of performing verification while...
6958939 Flash memory cell having multi-program channels  
A flash memory cell of an EEPROM split-gate flash memory, the memory cell including a substrate having a plurality of active regions, and a floating gate structure disposed over the substrate. The...
6956774 Nonvolatile memory programmable by a heat induced chemical reaction  
A nonvolatile memory cell occupying a minimum chip area including a cell structure that includes two or more base materials being programmable by a heat induced chemical reaction to form a layer or...
6956771 Voltage control circuit for high voltage supply  
A voltage control circuit that utilizes a level-shifter circuit and a switch circuit to isolate a charge pump output terminal from a system voltage source when a charge pump is enabled, and to...
6956772 Programmable fuse and antifuse and method thereof  
P-channel MOSFET devices are used as reprogrammable fuse or antifuse elements in a memory decode circuit by utilizing anomalous hole generation. An applied negative gate bias voltage is...
6956768 Method of programming dual cell memory device to store multiple data states per cell  
A method of programming a multi-level, dual cell memory device. The method includes independently programming a first charge storing cell and a second charge storing cell to respective data states,...
6952369 Method for operating a NAND-array memory module composed of P-type memory cells  
A method for writing a memory module includes providing a plurality of memory cells, applying a first transmission line voltage to the first transmission line of the column of a memory cell,...