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7706182 Adaptive programming of analog memory cells using statistical characteristics  
A method for storing data in a memory that includes a plurality of analog memory cells includes mapping the data to programming values, which are selected from a set of nominal programming values....
7706184 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device includes a memory cell array having a plurality of word lines and a plurality of bit lines, and at least first and second page buffers to which the...
7706190 Method of program-verifying a nonvolatile memory device using subdivided verifications with increasing verify voltages  
In a method of operating a non-volatile memory device subdivided verifications are performed by increasing verify voltages. Accordingly, threshold voltage distributions of memory cells can be...
7701766 Non-volatile memory device and method of programming in the same  
A non-volatile memory device according to one example embodiment of the present invention includes a page buffer configured to have a first register for receiving data and storing temporarily the...
7701762 NAND memory device and programming methods  
A NAND Flash memory device is described that can reduce bit line coupling and floating gate coupling during program and verify operations. Consecutive bit lines of an array row are concurrently...
7701765 Non-volatile multilevel memory cell programming  
The present disclosure includes methods, devices, modules, and systems for programming multilevel non-volatile memory cells, each cell having a number of lower pages and an upper page,. One method...
RE41244 Multi-state EEPROM having write-verify control circuit  
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data...
7697341 Method of testing a non-volatile memory device  
A method of testing a non-volatile memory device on a wafer is disclosed. The method includes performing an erase operation and a first verify operation about every memory cell in the non-volatile...
7692252 EEPROM array with well contacts  
A semiconductor integrated circuit device includes a cell well, a memory cell array formed on the cell well and having a memory cell area and cell well contact area, first wiring bodies arranged...
7688632 Nonvolatile semiconductor memory capable of trimming an initial program voltage for each word line  
A nonvolatile semiconductor memory of the present invention includes a plurality of bit lines and word lines which are arranged to intersect each other; a memory cell array having a plurality of...
7684241 Flash memory devices having multi-page copyback functionality and related block replacement methods  
Methods of executing a multi-page copyback program in a non-volatile memory device are provided, where the non-volatile memory device includes a memory having a plurality of memory blocks. A page...
7684253 Flash memory device having a function for reducing data input error and method of inputting the data in the same  
A flash memory device has a precharging section for precharging adequately in advance internal data lines included in an Y-decoder section whenever a process of inputting data into page buffer is...
7679977 Semiconductor memory device and test method thereof  
A semiconductor memory device including a memory cell array with electrically rewritable and non-volatile memory cells arranged therein, wherein the device has such a test mode that includes a...
7679965 Flash memory with improved programming precision  
A memory includes a plurality of flash cells and circuitry for programming a first cell to store first data and one or more second cells to store second data. Either the circuitry itself, or a...
7675774 Page buffer and multi-state nonvolatile memory device including the same  
According to one aspect, a memory cell array includes a bit line connected to a plurality of nonvolatile memory cells, where the nonvolatile memory cells are selectively programmable in any one of...
7675777 Non-volatile semiconductor memory device using adjacent bit lines for data transmission and method of driving the same  
A non-volatile semiconductor memory device, including a memory array having a plurality of first bit line groups and a plurality of second bit line groups that are alternately arranged to be...
7673220 Flash memory device having single page buffer structure and related programming method  
A flash memory device is disclosed that comprises memory cells, a sense node connected to a selected bit line, a sense circuit configured to selectively provide a first voltage to a common node in...
7663920 Memory system and data reading and generating method  
An object of the present invention is to provide a memory system that offers enhanced security of ROM code that is data whose contents can be utilized for a given purpose in its intact form. In a...
7663921 Flash memory array with a top gate line dynamically coupled to a word line  
Systems and methods are disclosed including memory cells arranged in sectors. In one exemplary implementation, each memory cell may include a top gate, a source, a top gate line coupling memory...
7660166 Method of improving programming precision in flash memory  
Data are stored in cells of a flash memory by assigning a first portion of the data to be stored in a first cell and a second portion of the data to be stored in one or more second cells. The...
7652324 NAND type dual bit nitride read only memory and method for fabricating the same  
A NAND type dual bit nitride read only memory and a method for fabricating thereof are provided. Firstly, a plurality of isolation layers, which are spaced and parallel to each other are formed in...
7649776 Nonvolatile semiconductor memory system  
According to an embodiment, a nonvolatile semiconductor memory system includes: a nonvolatile semiconductor memory; and a memory controller having: a memory interface unit that inputs commands to...
7649772 Memory and method for programming in multiple storage region multi-level cells  
A method for programming a memory, which includes multiple multi-level cells each having a left half cell and a right half cell, includes the following steps. First, a target address corresponding...
7649786 Non-volatile memory architecture and method, in particular of the EEPROM type  
A memory architecture includes at least one matrix of memory cells of the EEPROM type organized in rows or word lines and columns or bit lines. Each memory cell includes a floating gate cell...
7646636 Non-volatile memory with dynamic multi-mode operation  
A method and system for extending the life span of a flash memory device. The flash memory device is dynamically configurable to store data in the single bit per cell (SBC) storage mode or the...
7646645 Method and apparatus for testing the functionality of a page decoder  
A method and apparatus for testing correct operation of a page decoder in a memory is provided. In one implementation, the method includes erasing the memory to reset all memory cells associated...
7639537 Method for writing data in a non volatile memory unit  
A method for writing data in a non volatile memory unit having memory pages includes a predetermined number of memory cells storing a memory word being a predetermined sequence of digital values....
7633800 Redundancy scheme in memory  
Column redundancy is provided outside of a FLASH memory chip using a separate companion controller chip. The companion chip initially receives and stores fuse address information from the FLASH...
7624238 Memory controller and data processing system  
A memory controller and data processor have their operation mode switched from the page-on mode for high-speed access to a same page to the page-off mode in response to consecutive events of...
7623383 Three-level non-volatile semiconductor memory devices with lower and upper bit lines sharing a voltage control block  
A non-volatile semiconductor memory device includes a page buffer comprising a lower latch block and an upper latch block, and a memory array that is connected to the lower latch block via a lower...
7623374 Non-volatile memory devices and methods of programming the same  
A non-volatile memory device and method thereof are provided. The example non-volatile memory device may include a plurality of main cells, each of the plurality of main cells arranged at first...
7619922 Method for non-volatile memory with background data latch caching during erase operations  
Part of the latency from memory read or write operations is for data to be input to or output from the data latches of the memory via an I/O bus. Methods and circuitry are present for improving...
7613046 Nonvolatile semiconductor memory device carrying out simultaneous programming of memory cells  
A memory cell array has a first and a second storage area. The first storage area has a memory element selected by an address signal. The second storage area has a memory element selected by a...
7609552 Non-volatile memory with background data latch caching during erase operations  
Part of the latency from memory read or write operations is for data to be input to or output from the data latches of the memory via an I/O bus. Methods and circuitry are present for improving...
7602644 Memory devices with page buffer having dual registers and method of using the same  
A nonvolatile memory device and programming method and apparatus therefore are described that include operatively coupled first and second sense amplifiers having first and second data registers...
7596021 Memory system including MLC flash memory  
A memory system includes a flash memory storing multi-bit data in one memory cell. A memory controller controls the flash memory to program the multi-bit data in the memory cell. The flash memory...
7596027 Semiconductor storage device having page copying function  
Data read from memory cells of one page in a memory cell array that corresponds to a page address of a copy source is sensed and latched by a sense/latch circuit. The sense/latch circuit has a...
7593265 Low noise sense amplifier array and method for nonvolatile memory  
In sensing a page of nonvolatile memory cells with a corresponding group of sense modules in parallel, as each high current cell is identified, it is locked out from further sensing while others...
7593260 Semiconductor memory device for storing multivalued data  
Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of first memory cells selected simultaneously...
7589998 Non-volatile memory device and method of operation therefor  
In one embodiment, the non-volatile memory device includes a plurality of normal memory cells, and at least one flag memory cell associated with one of the plurality of normal memory cells. A...
7586784 Apparatus and methods for programming multilevel-cell NAND memory devices  
Methods and apparatus are provided. A first data value is read from a first memory cell and is stored. An attempt is made to add a second data value to the first memory cell. If the attempt to add...
7577059 Decoding control with address transition detection in page erase function  
Circuits and methods are provided for controlling multi-page erase operations in flash memory. The page address of each address of a multi-page erase operation is latched in wordline decoders. A...
7573738 Mode selection in a flash memory device  
A single flash memory device has selectable read modes for either a segment mode or a page mode. The desired mode is selected by writing a control word to a mode control register. Selecting the...
7564713 Semiconductor integrated circuit device wherein during data write a potential transferred to each bit line is changed in accordance with program order of program data  
The present invention discloses a semiconductor integrated circuit device having nonvolatile semiconductor memory cells, bit lines each connected to one end of the nonvolatile semiconductor memory...
7561467 Flash memory device using program data cache and programming method thereof  
A method is for programming a flash memory device which includes a plurality of memory cells storing multi-bit data representing one of a plurality of states. The method includes programming the...
7558152 Address counter for nonvolatile memory device  
An address counter for a nonvolatile memory device includes a cascade of cells. Each cell includes an address counting flip-flop that is updated to a value of every newly counted address bit, or...
7554840 Semiconductor device and fabrication thereof  
A memory device is disclosed. A floating gate is disposed overlying a substrate. A tunneling dielectric layer is interposed between the floating gate and the substrate. An inter poly dielectric...
7551485 Semiconductor memory device  
A semiconductor memory device includes: a memory cell array having a plurality of memory cells arranged therein; and a sense amplifier circuit configured to read data of the memory cell array,...
7548463 Nonvolatile semiconductor memory device and method of operating the same which stably perform erase operation  
A nonvolatile semiconductor memory device includes a memory array and an X-decode section. The memory array includes a plurality of nonvolatile memory cells arranged in a matrix form and a...
7545692 Circuit and method of testing a fail in a memory device  
A circuit for testing a fail in a memory device is disclosed. The memory device includes a memory cell array, a page buffer section, a current controller, and a current measuring section. The...