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7848144 Reverse order page writing in flash memories  
To store, in a memory block whose word lines are written successively in a word line writing order, a plurality of data pages that are ordered by logical page address, the pages are written to the...
7848141 Multi-level cell copyback program method in a non-volatile memory device  
A multi-level cell copyback program method in a non-volatile memory device is disclosed. The method includes reading LSB data of a source page, and storing the read LSB data in a second register...
7848147 Nonvolatile semiconductor memory device and writing method of the same  
A nonvolatile semiconductor memory device and a writing method thereof are provided. The nonvolatile semiconductor memory device includes a cell array, a controller configured to receive input...
RE41969 Multi-state EEPROM having write-verify control circuit  
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data...
7843731 Memory array architecture for a memory device and method of operating the memory array architecture  
A high integration memory array architecture of the present invention includes a memory cell array including memory cells arranged in a predetermined configuration, and selection transistors...
7843725 M+L bit read column architecture for M bit memory cells  
A memory device and programming and/or reading process is described that programs a row of non-volatile multi-level memory cells (MLC) in a single program operation to minimize disturb within the...
7843728 Nonvolatile semiconductor storage device  
A nonvolatile semiconductor storage device capable of storing a plurality of bits of data in one memory cell by assigning multivalued data having a higher-order bit selected from one of a pair of...
7843734 Flash memory device and data I/O operation method thereof  
A flash memory device comprises a memory cell array, an input buffer unit, an output driver unit, first and second page buffer units, and first and second data handling units. The memory cell...
RE41950 Multi-state EEPROM having write-verify control circuit  
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data...
7835196 Nonvolatile memory device storing data based on change in transistor characteristics  
A nonvolatile memory device includes a pair of PMOS transistors, and a control circuit configured to operate in a store mode to apply to a first one of the PMOS transistors potentials that cause...
7834388 Memory array of non-volatile electrically alterable memory cells for storing multiple data  
A memory cell that includes a control gate disposed laterally between two floating gates where each floating gate is capable of holding data. Each floating gate in a memory cell may be erased and...
7830712 Non-volatile memory apparatus for controlling page buffer and controlling method thereof  
A non-volatile memory apparatus for controlling a page buffer includes a page buffer configured to include a plurality of buffer stages, each buffering input/output data of cell arrays in units of...
7826265 Memory device with variable trim setting  
A memory device includes a memory array including a plurality of cells. The cells are divided into a plurality of subsets. Each subset has at least one associated trim parameter. The trim...
7817472 Operating method of memory device  
An operating method of a memory array is provided. The operating method includes performing a programming operation. The programming operation is performed by applying a first voltage to a bit...
7813174 Semiconductor memory device for storing multivalued data  
Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of first memory cells selected simultaneously...
7813178 Semiconductor memory device and write control method therefor  
Disclosed is a semiconductor memory device which includes a read data latch that holds read data from a phase change memory and latches write data entered from outside and holds write data entered...
7808825 Non-volatile memory device and method of programming the same  
When performing a program operation, a non-volatile memory device comprising a multi-plane performs a cache write operation by employing a page buffer circuit of a plane that does not perform the...
7808835 Non-volatile semiconductor storage device  
In a memory cell array which is constituted with flash memory, a pair of a positive memory cell and a negative memory cell, to which data with mutually opposite values are written, is plurally...
7800971 Flash memory devices and methods of programming the same by overlapping programming operations for multiple mats  
A flash memory device is programmed by loading first data into a page buffer of a first mat. Second data is loaded into a page buffer of a second mat while programming the first data in a first...
7796431 Page buffer used in a NAND flash memory and programming method thereof  
A page buffer used in a NAND flash memory comprises a first latch circuit, a second latch circuit, a bit line voltage supply circuit and a verification circuit comprising a first verification...
7796440 NAND flash memory device and method of programming the same  
Provided are a NAND flash memory device and a method of programming the same. The NAND flash memory device may include a cell array including a plurality of pages; a page buffer storing program...
7796433 Apparatus for reducing the impact of program disturb  
The unintentional programming of an unselected (or inhibited) non-volatile storage element during a program operation that intends to program another non-volatile storage element is referred to as...
7791938 MSB-based error correction for flash memory system  
A flash memory system includes a multi-bit flash memory device having a memory cell array including memory cells arranged in rows and columns; a read circuit configured to read data from the...
7791940 Integrated circuit with switching unit for memory cell coupling, and method for producing an integrated circuit for memory cell coupling  
An integrated circuit has a plurality of first memory cells, which are electrically coupled along a first line, and additionally has a plurality of second memory cells which are electrically...
7790494 Method of fabricating a multi-bit electro-mechanical memory device  
A memory device may include a substrate, a bit line, at least a first lower word line, at least a first trap site, a pad electrode, at least a first cantilever electrode, and/or at least a first...
7787297 Flash memory device and flash memory system  
A flash memory device and a flash memory system are disclosed. The flash memory device includes a first non-volatile memory including a plurality of page data cells, storing page data, and reading...
7786462 Chalcogenide devices exhibiting stable operation from the as-fabricated state  
A chalcogenide material and chalcogenide memory device having less stringent requirements for formation, improved thermal stability and/or faster operation. The chalcogenide materials include...
7787300 Memory devices with page buffer having dual registers and method of using the same  
A nonvolatile memory device and programming method and apparatus therefore are described that include operatively coupled first and second sense amplifiers having first and second data registers...
7782670 Semiconductor memory device for storing multivalued data  
Data storage circuits are connected to the bit lines in a one-to-one correspondence. A write circuit writes the data on a first page into a plurality of first memory cells selected simultaneously...
RE41485 Multi-state EEPROM having write-verify control circuit  
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data...
7768827 Data verification method and semiconductor memory  
A semiconductor memory device storing multi-bit write data and a related method of verifying data programmed to a memory cell are disclosed. The method compares a write data reference bit selected...
RE41468 Multi-state EEPROM having write-verify control circuit  
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data...
7764547 Regulation of source potential to combat cell source IR drop  
Techniques are presented for dealing with possible source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits of a non-volatile memory. The...
RE41456 Multi-state EEPROM having write-verify control circuit  
An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data...
7764546 Method and architecture for fast flash memory programming  
Embodiments of the present invention disclose a method of utilizing a flash memory array to decrease programming time while maintaining sufficient read speeds. An array of cells is programmed and...
7755968 Integrated circuit memory device having dynamic memory bank count and page size  
An integrated circuit memory device has a storage array with an adjustable number of memory banks, a row of sense amplifiers to access storage cells in the storage array; and memory access control...
7755945 Page buffer and method of programming and reading a memory  
A page buffer and method of programming and reading a memory are provided. The page buffer includes a first latch, a second latch, a data change unit and a program control unit. The first latch...
7751242 NAND memory device and programming methods  
A NAND Flash memory device is described that can reduce bit line coupling and floating gate coupling during program and verify operations. Consecutive bit lines of an array row are concurrently...
7751238 Memory system protected from errors due to read disturbance and reading method thereof  
A method of reading a memory system including a flash memory includes: reading data from a page in a first block of the flash memory, incrementing a counter each time data is read from the page to...
7751243 Semiconductor memory device provided with MOS transistor having charge accumulation layer and control gate and data write method of NAND flash memory  
A semiconductor memory device includes a memory cell group, a selection transistor, a page buffer, and a row decoder. The memory cell group includes memory cell transistors connected in series....
7738291 Memory page boosting method, device and system  
A memory page boosting method, device and system for boosting unselected memory cells in a multi-level cell memory cell is described. The memory device includes a memory array of multi-level cell...
7733703 Method for non-volatile memory with background data latch caching during read operations  
Part of the latency from memory read or write operations is for data to be input to or output from the data latches of the memory via an I/O bus. Methods and circuitry are present for improving...
7733695 Non-volatile memory device and method of operation therefor  
In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit...
7729174 Nonvolatile memory device having a bit line select voltage generator adapted to a temperature change  
A bit line select voltage generator includes a first voltage generator, a second voltage generator, and a voltage transmission unit. The first voltage generator is configured to divide a reference...
7724575 Page-buffer and non-volatile semiconductor memory including page buffer  
In one aspect a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of...
7724583 Internal voltage generator and control method thereof, and semiconductor memory device and system including the same  
An internal voltage of a semiconductor memory device is controlled, where the internal voltage is set according to a reference voltage. The reference voltage is controlled according to first...
7719892 Flash memory device with data output control  
An apparatus, system, and computer-implemented method for controlling data transfer between a plurality of serial data link interfaces and a plurality of memory banks in a semiconductor memory is...
7719869 Memory cell array comprising floating body memory cells  
A memory cell array includes a plurality of floating body memory cells, which are arranged in cell rows, and world lines, wherein each word line is configured to control memory cells associated...
7719893 Nonvolatile memory and apparatus and method for deciding data validity for the same  
Provided are a nonvolatile memory and an apparatus and method for deciding data validity for the same, in which validity of data stored in the nonvolatile memory can be decided. The nonvolatile...
7706183 Read mode for flash memory  
A method for reading a nonvolatile memory array including an array of memory cells, each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain...