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8873288 Simultaneous sensing of multiple wordlines and detection of NAND failures  
Techniques for a post-write read are presented. In an exemplary embodiment, a combined simultaneous sensing of multiple word lines is used in order to identify a problem in one or more of these...
8873286 Managing non-volatile media  
Apparatuses, systems, and methods are disclosed to manage non-volatile media. A method includes determining a configuration parameter for a set of storage cells of a non-volatile recording medium....
8873290 Non-volatile memory device capable of multi-page programming by simultaneously activating a plurality of selection lines based on programmed data  
A method of programming a non-volatile memory device including a plurality of strings arranged in rows and columns comprises activating all or a part of selection lines in one column at the same...
8867273 Non-volatile semiconductor memory device and method of writing data therein  
A non-volatile semiconductor memory device includes a plurality of cell units and a data writing unit. The cell unit includes first and second select gate transistors and a memory string including...
8867274 Method of operating nonvolatile memory device controlled by controlling coupling resistance value between bit line and page buffer  
A method of operating a nonvolatile memory device includes determining whether a program operation is performed on even memory cells coupled to even bit lines of a selected page, setting a...
8861272 System and method for data recovery in a solid state storage device using optimal reference voltage values of a related storage element  
Embodiments of solid-state storage system are provided herein include data recovery mechanism to recover data upon detection of a read error (e.g., an uncorrectable ECC error) in a storage element...
8854886 Memory and program method thereof  
A method of programming a nonvolatile memory includes: applying a common program pulse to program cells within each page of a memory region including two or more pages; applying one or more...
8854884 NAND flash architecture with multi-level row decoding  
A NAND flash memory device is disclosed. The NAND flash memory device includes a NAND flash memory array defined as a plurality of sectors. Row decoding is performed in two levels. The first level...
8854898 Apparatuses and methods for comparing a current representative of a number of failing memory cells  
Apparatuses and methods for comparing a sense current representative of a number of failing memory cells of a group of memory cells and a reference current representative of a reference number of...
8854882 Configuring storage cells  
Apparatuses, systems, methods, and computer program products are disclosed for configuring storage cells. A method includes detecting a shift in a read voltage level past a read voltage threshold...
8848445 System and method for minimizing write amplification while maintaining sequential performance using logical group striping in a multi-bank system  
A system and method for reducing write amplification while maintaining a desired level of sequential read and write performance is disclosed. A controller in a multi-bank flash storage device may...
8842474 Nonvolatile memory device and nonvolatile memory system including the same  
A nonvolatile memory device includes a cell array including a plurality of pages, a selection unit configured to select one of the pages in response to a page selection address, an operation...
8837215 Operating method and data read method in nonvolatile memory device  
In a method of reading data in a nonvolatile memory device including data cells and monitoring cells. A first read operation applies a first read voltage to the data cells and monitoring cells. If...
8837193 Memory  
A memory in accordance with an embodiment of the present invention may include a first page buffer, a second page buffer arranged adjacent to the first page buffer in a first direction, a global...
8830774 Semiconductor memory device  
In a static random access memory (SRAM) device having a hierarchical bit line architecture, a local sense amplifier (SA) circuit includes P-channel transistors which precharge local bit lines...
8832527 Method of storing system data, and memory controller and memory storage apparatus using the same  
A method of storing system data, and a memory controller and a memory storage apparatus using the same are provided. The method includes determining whether the unused storage space of a system...
8830749 Semiconductor memory device and method for controlling the same  
A semiconductor memory device capable of reducing the size of a NAND flash memory device includes a latch unit configured to store a bad block address, a comparator configured to compare the bad...
8830715 Semiconductor memory device including vertical channel transistors  
A semiconductor memory device is disclosed. The semiconductor memory device includes a memory array block, a first word line and a second word line. The memory array block includes a plurality of...
8830752 Dynamically configurable MLC state assignment  
Memory devices facilitating a data conditioning scheme for multilevel memory cells. For example, one such memory device is capable of inverting the lower page bit values of a complete page of MLC...
8830750 Data reading method, and control circuit, memory module and memory storage apparatus using the same  
A data reading method for a rewritable non-volatile memory module is provided. The method includes determining a corresponding read voltage based on a critical voltage distribution of memory cells...
8824205 Non-volatile electronic memory device with NAND structure being monolithically integrated on semiconductor  
A non-volatile electronic memory device is integrated on a semiconductor and is of the Flash EEPROM type with a NAND architecture including at least one memory matrix divided into physical...
8824216 Semiconductor memory apparatus  
A semiconductor memory apparatus includes: a data output signal transmitter configured to receive a data signal and a data mask signal and transmit a data output signal through a global data line,...
8824207 Semiconductor memory device and method of operating the same  
A semiconductor memory device is operated by, inter alia, sequentially inputting program data to page buffers coupled to selected pages of at least four planes in order to program selected memory...
8817539 Semiconductor memory device, operating method thereof, and memory system including the same  
An operating method of a semiconductor memory device is provided. The method includes supplying a first voltage to a selected bit line where a selected memory cell among memory cells is connected...
8817537 Nonvolatile memory systems with embedded fast read and write memories  
A nonvolatile memory system is described with novel architecture coupling nonvolatile storage memory with random access volatile memory. New commands are included to enhance the read and write...
8811083 Semiconductor memory device and method of operating the same  
A semiconductor memory device and a method of operating the same include a circuit group configured to apply a program maintaining voltage between the program prohibition voltage and the program...
8811089 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor memory device according to the embodiment comprises a memory cell array including plural memory cells operative to store data nonvolatilely in accordance with plural...
8811081 Systems and methods of updating read voltages in a memory  
A method includes receiving hard bit data and soft bit data corresponding to a portion of a memory, where each storage element of the memory stores multiple bits per storage element. The hard bit...
8804428 Determining system lifetime characteristics  
The present disclosure includes methods and systems for determining system lifetime characteristics. A number of embodiments include a number of memory devices and a controller coupled to the...
8797809 Nonvolatile memory device  
A nonvolatile memory device includes: a driving voltage generation unit configured to generate a driving voltage of a core bias line included in a memory cell current path; a comparison unit...
8797780 Memory device having sub-bit lines and memory system  
A memory device includes; a memory cell array including a memory cell connected to a bit line, a page buffer unit receiving data from the memory cell via the bit line, and a contact unit providing...
8773908 Nonvolatile memory devices and methods of programming nonvolatile memory devices  
A nonvolatile memory device includes a memory cell array, a page buffer unit which output a verify-read result, a reference current generating unit which generates a reference current signal, a...
8773907 Reading memory cell history during program operation for adaptive programming  
Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a memory device.
8767459 Data storage in analog memory cells across word lines using a non-integer number of bits per cell  
A method for data storage includes accepting data for storage in an array of analog memory cells, which are arranged in rows associated with respective word lines. At least a first page of the...
8767461 Non-volatile memory with dynamic multi-mode operation  
A method and system for extending the life span of a flash memory device. The flash memory device is dynamically configurable to store data in the single bit per cell (SBC) storage mode or the...
8767481 Nonvolatile memory device and method of operating the same  
A nonvolatile memory device includes a page buffer unit configured to include a plurality of page buffers coupled to the respective bit lines; a pass/fail circuit coupled to the page buffer unit...
8760921 Storage device and control method of nonvolatile memory  
According to one embodiment, a storage device includes a nonvolatile memory, a controller configured to copy data stored in a first page in a first block to a second page in a second block, and an...
8755224 Non-volatile memory device and related read method  
A nonvolatile memory device comprises a memory cell array, a page buffer, and a bit line connection signal controller. The memory cell array comprises a plurality of word lines and bit lines...
8755229 Limiting flash memory over programming  
Certain aspects of this disclosure relate to programming an at least one flash memory cell using an at least one programming pulse with a new programming voltage having a level. The level is...
8755226 Storage device and control method of nonvolatile memory  
According to one embodiment, a storage device includes a nonvolatile memory including physical sectors each of which comprises memory cells commonly connected to a word line, each of the memory...
8750045 Experience count dependent program algorithm for flash memory  
In a non-volatile memory device, the parameters used in write and erase operation are varied based upon device age. For example, in a programming operation using a staircase waveform, the...
8750042 Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures  
Techniques for a post-write read are presented. In an exemplary embodiment, a combined simultaneous sensing of multiple word lines is used in order to identify a problem in one or more of these...
8750046 Storage at M bits/cell density in N bits/cell analog memory cell devices, M>N  
A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming...
8743603 Efficient data storage in multi-plane memory devices  
A method for data storage includes initially storing a sequence of data pages in a memory that includes multiple memory arrays, such that successive data pages in the sequence are stored in...
8737128 Semiconductor memory device and method of operating the same  
A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell block configured to have memory cell groups, a peripheral...
8730730 Temporary storage circuit, storage device, and signal processing circuit  
A temporary storage circuit including a reduced number of transistors is provided. The temporary storage circuit includes storage elements, each of which includes a first transistor and a second...
8730729 Systems and methods for averaging error rates in non-volatile devices and storage systems  
A system for storing a plurality of logical pages in a set of at least one flash device, each flash device including a set of at least one erase block, the system comprising apparatus for...
8730725 Method of programming/reading a non-volatile memory with a sequence  
A method of programming/reading a multi-bit per cell non-volatile memory with a sequence is disclosed. A plurality of less-significant-bit pages are programmed, and a plurality of consecutive...
8724389 Non-volatile solid state memory-based mass storage device and methods thereof  
Non-volatile solid state mass storage device and methods for improving write performance thereof. The storage device includes a NAND flash controller, an array of NAND flash memory integrated...
8724400 Memory device and system with improved erase operation  
A memory device includes a memory cell array including a plurality of memory blocks, each memory block including a plurality of memory cells, a plurality of word lines coupled to rows of the...