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7388784 |
Nonvolatile semiconductor memory device including memory cell units each having a given number of memory cell transistors
A nonvolatile semiconductor memory device includes a plurality of memory cell units and a memory cell array in which the memory cell units are arranged in matrix. Each of the memory cell units has...
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7366015 |
Semiconductor integrated circuit device, production and operation method thereof
A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an...
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7348621 |
Non-volatile memory cells
A non-volatile memory cell and method of fabrication are provided. The non-volatile memory cell includes a substrate of a first conductivity type, a first dopant region of a second conductivity...
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7301811 |
Cost efficient nonvolatile SRAM cell
A cost efficient nonvolatile memory cell may include an inverter, an access gate coupled to the inverter for controlling access to the memory cell, and a control gate. The inverter may include a...
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7269063 |
Floating gate memory with split-gate read transistor and split gate program transistor memory cells and method for making the same
Variations in memory array and cell configuration are shown, which eliminate punch-through disturb, reverse-tunnel. Several configurations are shown which range from combined and separate source...
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7262993 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device including: a first capacitor, one end of the first capacitor being connected to a floating node; a detection transistor, a gate electrode of the detection...
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7233527 |
Nonvolatile memory structure
The invention is directed to a layout of nonvolatile memory device. The memory cell has a gate electrode, a first doped electrode, and a second doped electrode. The first doped electrode is coupled...
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7233521 |
Apparatus and method for storing analog information in EEPROM memory
A storage device that is capable of receiving an analog signal and storing it as a digital signal. The storage device includes an input node configured to receive an analog input voltage and two...
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7199424 |
Scalable flash EEPROM memory cell with notched floating gate and graded source region
An memory device, and method of making same, that includes source and drain regions defining a channel region therebetween. A select gate is formed over and insulated from a first portion of the...
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7180774 |
Semiconductor integrated circuit device including first, second and third gates
A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an...
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7180126 |
Multi-level memory cell array with lateral floating spacers
An array of multi-level non-volatile memory transistors features a transistor construction with a conductive polysilicon control gate having opposed sidewalls insulatively spaced just above the...
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7164606 |
Reverse fowler-nordheim tunneling programming for non-volatile memory cell
In accordance with a method of programming an NVM array that includes 4-transistor PMOS non-volatile memory (NVM) cells having commonly connected floating gates, for all the cell's in the array...
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7154779 |
Non-volatile memory cell using high-k material inter-gate programming
A non-volatile memory device has a channel region between source/drain regions, a floating gate, a control gate, a first dielectric region between the channel region and the floating gate, and a...
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7145802 |
Programming and manufacturing method for split gate memory cell
A method for programming a split gate memory cell comprises the following steps. First, a split gate memory cell formed on a semiconductor substrate of a first conductive type, e.g., p-type, is...
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7139195 |
EEPROM memory comprising a non-volatile register integrated into the memory array thereof
An electrically erasable and programmable memory includes a memory array and a non-volatile register integrated with the memory array. The memory array includes normal memory cells arranged in rows...
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7130216 |
One-device non-volatile random access memory cell
One aspect of the present subject matter relates to a one-device non-volatile memory cell. The memory cell includes a body region, a first diffusion region and a second diffusion region formed in...
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7120059 |
Memory array including multiple-gate charge trapping non-volatile cells
An array of multiple-gate memory cells includes sectors. The sectors include at least one row of multiple-gate memory cells. The multiple-gate memory cells comprise a semiconductor body and a...
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7106629 |
Split-gate P-channel flash memory cell with programming by band-to-band hot electron method
A split-gate, P-channel flash memory cell having a band-to-band hot electron (BBHE) programming method is defined to improve the endurance characteristics of performance of the cell. The...
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7099192 |
Nonvolatile flash memory and method of operating the same
A nonvolatile memory and a method of operating the same are proposed. The nonvolatile memory has single-gate memory cells, wherein a structure of a transistor and a capacitor is embedded in a...
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7042763 |
Programming method for nonvolatile memory cell
A method of selectively programming nonvolatile memory cells in which multiple programming voltages are used to obtain the desired voltage on the storage nodes of the cells selected for...
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6992927 |
Nonvolatile memory cell
An integrated nonvolatile memory circuit having a plurality of control devices. Separate devices execute distinct control, erase, write and read operations, thereby allowing each device to be...
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6940755 |
Semiconductor with an improved read device and operational mode associated therewith
A selection transistor for a group of memory cells, preferably composed of 16-32 memory cells, is respectively introduced into the feed lines to the memory cells The selection transistor is opened...
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6925336 |
Control unit for electronic microcontrollers or microprocessors and method of making
A method of designing and fabricating a control unit for electronic microcontrollers or microprocessors that includes fabricating a finite state machine having at least one combinatorial network,...
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6885587 |
Single poly embedded EPROM
A novel structure of nonvolatile memory is disclosed. The non-volatile memory includes two serially connected PMOS transistors. The characteristic of the devices is that bias is not necessary to...
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6804768 |
Programmable microprocessor cache index hashing function
An embodiment of the invention provides a circuit and method for optimizing an index hashing function in a cache memory on a microprocessor. A programmable index hashing function is designed that...
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6798682 |
Reduced integrated circuit chip leakage and method of reducing leakage
An integrated circuit that may include an array such as a static random access memory (SRAM) with high threshold device array devices and in selected other devices to reduce leakage. Devices with...
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6788576 |
Complementary non-volatile memory cell
A complimentary non-volatile memory (CNVM) cell includes an n-channel transistor and a p-channel transistor that have drains connected like a CMOS inverter, and that are controlled by a shared...
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6760252 |
Floating gate memory cell, method for fabricating it, and semiconductor memory device
For particularly flexible and space-saving information storage, in the case of a floating gate memory cell and a corresponding semiconductor memory device, the invention includes providing a...
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6747896 |
Bi-directional floating gate nonvolatile memory
A memory transistor has a pair of separate floating gates overlying end regions of a channel and a control gate that overlies the floating gates and a central region of the channel. The memory...
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6716700 |
Method of forming memory arrays based on a triple-polysilicon source-side injection non-volatile memory cell
A method of forming a semiconductor memory having rows and columns of memory cells is as follows; forming a plurality of rows of program gate lines from a second layer polysilicon; forming a...
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6710465 |
Scalable two transistor memory device
A Scalable Two-Transistor Memory (STTM) cell array having a 4F 2 unit cell area, where F is the minimum feature size. The data lines and the bit lines alternate and are adjacent to each other...
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6703661 |
Contactless NOR-type memory array and its fabrication methods
A contactless NOR-type memory array of the present invention comprises a plurality of integrated floating-gate layers formed on a shallow-trench isolation structure, a plurality of word lines...
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6693830 |
Single-poly two-transistor EEPROM cell with differentially doped floating gate
An EEPROM cell includes a sense transistor and a select transistor, each having a first active region ( 110, 114 ) formed in a substrate, and sharing a second active region ( 112 ). The EEPROM cell...
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6563733 |
Memory array architectures based on a triple-polysilicon source-side injection non-volatile memory cell
A semiconductor memory includes a plurality of memory cells arranged along rows and columns, each cell having a floating gate, a drain region, a source region, a program gate terminal, and a select...
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6534816 |
Method and apparatus for injecting charge onto the floating gate of a nonvolatile memory cell
A tunneling charge injector includes a conducting injector electrode, a grid insulator disposed adjacent the conducting injector electrode, a grid electrode disposed adjacent said grid insulator, a...
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6532170 |
Nonvolatile configuration cells and cell arrays
A memory cell ( 400 ) used to store data in an integrated circuit. The memory cell ( 400 ) is static, nonvolatile, and programmable. The layout of the memory cell is compact. A logic high output...
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6522587 |
Non-volatile semiconductor memory devices
Embodiments relate to a non-volatile semiconductor memory device in which the interface state between the tunnel insulation layer and the floating gate and the interface state between the tunnel...
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6512700 |
Non-volatile memory cell having channel initiated secondary electron injection programming mechanism
A non-volatile memory cell and associated cell array and memory device having reduced program disturb, improved retention of programmed information, and reduced power consumption are disclosed. The...
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6493263 |
Semiconductor computing circuit and computing apparatus
Disclosed is a semiconductor computing circuit achievable with simple circuitry and capable of performing analog computations at high speed to compute an absolute-value voltage representing the...
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6459615 |
Non-volatile memory cell array with shared erase device
A non-volatile memory device is disclosed which includes an erase device that is shared among an array of memory cells. Each of the memory cells in the array includes a control device coupled to a...
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6456529 |
Programmable impedance device
A programmable impedance element ( 204 ) is implemented using integrated circuit techniques and devices. An impedance of the programmable impedance element is adjusted by appropriately configuring...
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6411547 |
Nonvolatile memory cell and method for programming and/or verifying the same
Nonvolatile memory device and a method of programming the same, is disclosed, wherein, for single level or multi-level programming of a cell, predetermined voltages are applied to a control gate,...
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6356478 |
Flash based control for field programmable gate array
A circuit for controlling a switching transistor in a reprogrammable FPGA device comprises first and second floating gate flash memory transistors. A first floating gate flash memory transistor has...
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6324097 |
Single poly non-volatile memory structure and its fabricating method
The present invention discloses a single poly non-volatile memory structure including a semiconductor substrate with two active areas divided by isolation regions. A control gate doped with N-type...
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6317349 |
Non-volatile content addressable memory
A content addressable memory (CAM) includes non-volatile CAM cells that are in an array similar to a conventional Flash memory array. In the CAM, each word line connects to control gates of Flash...
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6282123 |
Method of fabricating, programming, and erasing a dual pocket two sided program/erase non-volatile memory cell
A non-volatile memory cell is formed in a semiconductor substrate and includes a control gate and a floating gate formed over said semiconductor substrate. A first active region and a second active...
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6229755 |
Wordline driving apparatus in semiconductor memory devices
The present invention is directed to a wordline driving apparatus in semiconductor memory devices. The wordline driving apparatus comprises a CMOS distributed type sub-wordline driver for receiving...
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6226201 |
Techniques to configure nonvolatile cells and cell arrays
A memory cell (400) used to store data in an integrated circuit. The memory cell (400) is static, nonvolatile, and programmable. The layout of the memory cell is compact. A logic high output from...
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6222766 |
EEPROM memory cell and method of fabricating the same
An object of the present invention is to realize a memory cell including a single polysilicon layer so as to simplify the fabrication process, improve the productivity and lower the fabrication...
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6222765 |
Non-volatile flip-flop circuit
A combination non-volatile latch circuit has a volatile latch circuit having a bit signal and an inverse bit signal. A first and a second non-volatile cell of the split gate floating gate type...
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