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8185802 Data memory system  
A data memory system includes a nonvolatile memory cell array which includes a plurality of memory cells, a page adjacently formed by the plurality of memory cells being collectively erased in the...
8179718 Memory device and memory programming method  
Provided are memory devices and memory programming methods. A memory device may include: a multi-level cell array that includes a plurality of multi-level cells; a programming unit that programs a...
8179719 Systems and methods for improving error distributions in multi-level cell memory systems  
A memory system includes a state set module that provides a first state set having a plurality of states, each being assigned to represent a particular data sequence, and a second state set having...
8179717 Maintaining integrity of preloaded content in non-volatile memory during surface mounting  
A non-volatile memory chip package is prepared for surface mounting to a substrate in a solder reflow process by programming erased blocks to higher threshold voltage levels, to improve data...
8174285 Component provided with an integrated circuit comprising a cryptorocessor and method of installation thereof  
In order to protect an integrated circuit provided with a cryptoprocessor from attacks aiming to reveal secrets, it is anticipated to use a component sensitive to the activation of a parasitic...
8174887 Adjusting for charge loss in a memory  
Memory and methods of operating a memory adjusting an output voltage of an analog storage device, such as a data cache capacitor holding a voltage level representative of data, in response to an...
8174913 Semiconductor memory device and driving method of the same  
A memory includes a cell region; a spare region including a spare block; a fuse region storing remedy information necessary for an access to the spare block instead of a remedy target block, the...
8169825 Reliable data storage in analog memory cells subjected to long retention periods  
A method for data storage in a non-volatile memory includes storing data in the non-volatile memory using a first storage configuration while the non-volatile memory is supplied with electrical...
8164953 Memory and boundary searching method thereof  
A memory and an operating method thereof are provided therein. When searching a boundary of a threshold voltage distribution of the memory, data errors resulted from tail bits of the memory would...
8159890 Redundant memory array for replacing memory sections of main memory  
Memories and methods for replacing memory sections of a main memory array by mapping memory addresses for an entire main memory section to at least one memory section of a redundant memory array....
8159882 Nonvolatile semiconductor memory device and memory system  
A semiconductor memory device executes a writing operation based on a first bit assignment pattern at the time of writing. The first bit assignment pattern is created such that pieces of x-bit data...
8154925 Semiconductor memory device and system capable of executing an interleave programming for a plurality of memory chips and a 2-plane programming at the respective memory chips  
A semiconductor memory device includes first and second memory chips and a control logic configured to execute an interleave program between the first and second memory chips. The control logic...
8154929 Flash memory device controlling common source line voltage, program-verify method, and memory system  
Disclosed is a flash memory device and a program-verify method. The flash memory device includes; a plurality of memory cells connected between a bit line and a common source line, and a data...
8156392 Apparatus, system, and method for bad block remapping  
An apparatus, system, and method are disclosed for bad block remapping. A bad block identifier module identifies one or more data blocks on a solid-state storage element as bad blocks. A log update...
8156393 Memory system  
To provide a memory system which determines a memory state such as an exhaustion level and allows a memory to be efficiently used. The memory system includes a NAND type flash memory 1 in which...
8151173 Semiconductor storage device comprising memory array including normal array and parity array  
Data latches, multiplexers, an ECC circuit section, and an input/output circuit section are arranged in columns and adjacent to each other, in an extending direction of data lines that are formed...
8149621 Flash memory device and method of testing the flash memory device  
A flash memory device and a method of testing the flash memory device are provided. The flash memory device may include a memory cell array including a plurality of bit lines, a control unit...
8140938 Semiconductor memory device and error correction method thereof  
A semiconductor memory device having an error correcting function, includes a memory array having a data area and a check code area, an operation circuit including an encode circuit coupled to the...
8139428 Method for reading and writing a block interleaver and the reading circuit thereof  
A method for writing a memory of a block interleaver determines in a bit-wise manner whether to write data into the memory. A method for reading a memory of a block interleaver combines two...
8139412 Systematic error correction for multi-level flash memory  
In accordance with exemplary embodiments, a multi-level flash memory employs error correction of systematic errors when reading multi-level flash memory. Error correction includes i) detection of...
8134873 Flash memory device and programming/erasing method of the same  
A flash memory device includes a bulk region, first through nth memory cell transistors arranged in a row on the bulk region, first through nth word lines respectively connected to gates of the...
8136014 Non-volatile semiconductor memory device  
A non-volatile semiconductor memory device comprises a memory cell array including a plurality of memory cells arrayed capable of storing information of N bits (N≧2) in accordance with variations i...
8130553 Systems and methods for low wear operation of solid state memory  
This disclosure is related to systems and methods for low wear operation of solid state memory, such as a flash memory. In one example, a controller is coupled to a memory and adapted to...
8130549 Apparatus and method for detecting over-programming condition in multistate memory device  
A system embodiment comprises a nonvolatile memory device, a memory, and a controller. The nonvolatile memory device includes a plurality of nonvolatile memory cells. Each nonvolatile memory cell...
8130544 Method of reducing bit error rate for a flash memory  
A method of reducing coupling effect in a flash memory is disclosed. A neighboring page is read, and a flag is set active if the neighboring page is an interfering page. Data are read from the...
8127202 Use of alternative value in cell detection  
A system and method, including computer software, allows reading data from a flash memory cell. Voltages from a group of memory cells are detected. The group of memory cells have associated...
8125827 Flash memory systems and operating methods using adaptive read voltage levels  
Some embodiments of the present invention provide methods of operating nonvolatile memory devices. Reference data is stored in a plurality of memory cells. The reference data is read, and a...
8120969 Semi-volatile NAND flash memory  
Semi-volatile NAND flash memory systems, apparatuses, and methods for use are described herein. According to various embodiments, a semi-volatile NAND flash memory may be partitioned into various...
8122320 Integrated circuit including an ECC error counter  
An integrated circuit includes a memory array and an error correction code (ECC) circuit configured to provide a first signal indicating whether data read from the memory array has been corrected...
8120957 Nonvolatile semiconductor storage device, nonvolatile semiconductor storage system and method of managing of defective column in nonvolatile semiconductor storage system  
A nonvolatile semiconductor storage device is disclosed, which includes a memory cell array in which nonvolatile memory cells are arranged, a first data holding circuit which temporarily holds a...
8116134 Semiconductor memory device with improved ECC efficiency  
Memory cells store k bits of data (k is a natural number not less than 2) into a single cell. A number n of data storage circuits store externally supplied k bits of data to write data into the...
8116133 Maintenance operations for multi-level data storage cells  
Systems and methods, including computer software, for reading data from a flash memory cell involve detecting voltages from a group of memory cells. The group of memory cells have associated...
8116457 Methods, apparatuses, and products for a secure circuit  
Methods, systems, apparatuses and products are disclosed for providing security circuits. Exemplary embodiments including semiconductor chips on circuit boards are shown, together with application...
8117519 Memory apparatus and method using erasure error correction to reduce power consumption  
An error correction circuit coupled to a plurality of memory cells in a memory device includes an error correcting code (“ECC”) generator and an ECC controller. The ECC generator is coupled to the...
8112692 Flash memory device error correction code controllers and related methods and memory systems  
An ECC controller for a flash memory device storing M-bit data (M: a positive integer equal to or greater than 2) includes an encoder and a decoder. The encoder generates first ECC data for input...
8111547 Multi-bit flash memory and reading method thereof  
A multi-bit flash memory and a reading method thereof. Multiple reference memory cells for saving reserved data are provided to operate together with multiple data memory cells. Before the data...
8107301 Memory controller  
A memory controller for writing data in a first semiconductor memory including a plurality of memory cells having series-connected current paths and charge storage layers includes a host interface...
8102717 Method of testing for a leakage current between bit lines of nonvolatile memory device  
A method of testing for a leakage current between bit lines of a nonvolatile memory device includes providing the nonvolatile memory device with a page buffer having first and second bit lines...
8103940 Programming error correction code into a solid state memory device with varying bits per cell  
Memory devices that, in a particular embodiment, receive and transmit analog data signals representative of bit patterns of two or more bits such as to facilitate increases in data transfer rates...
8094502 Write-precompensation and variable write backoff  
A technique for writing data is disclosed. The technique includes estimating an amount of additional voltage on a victim cell of a solid-state storage device caused by writing to one or more other...
8089812 Semiconductor memory device  
A semiconductor memory device can reduce a circuit area necessary for row repair. The semiconductor memory device includes a plurality of memory banks, a plurality of cell arrays arranged in each...
8085592 Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof  
Operation methods of charge-trap flash memory devices having an unused memory cell for data storage and a normal memory cell used for data storage are discussed. The operation method may include...
8085591 Charge loss compensation during programming of a memory device  
In programming a selected word line of memory cells, a first program verify or read operation is performed, after one page of a selected word line is programmed, in order to determine a first...
8085590 Multi-bit-per-cell flash memory device with non-bijective mapping  
To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state. The...
8085595 Nonvolatile memory devices and methods of controlling the wordline voltage of the same  
A nonvolatile memory device includes an array of memory cells arranged in rows and columns, the array of memory cells having wordlines associated therewith. A wordline voltage controller determines...
8086914 Storing data to multi-chip low-latency random read memory device using non-aligned striping  
Described herein are method and apparatus for storing data to a low-latency random read memory (LLRRM) device using non-aligned data striping, the LLRRM device being implemented on a storage...
8081511 Flash memory device with redundant columns  
Apparatus and methods are disclosed, such as those involving a flash memory device. One such apparatus includes a memory block including a plurality of columns. Each of the columns includes a bit...
8077642 Methods and apparatus for signal echo cancellation and transmitter calibration in full duplex systems  
A method includes transmitting a first signal over a network from a first communication link to a second communication link. The method further includes receiving a second signal with the first...
8077515 Methods, devices, and systems for dealing with threshold voltage change in memory devices  
The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control...
8077516 Method and apparatus for accessing memory with read error by changing comparison  
In response to a disagreement between a previously generated check code associated with previously programmed data bits and a more recently generated check code generated in response to a read...
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