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7391663 |
Structure and method for measuring the channel boosting voltage of NAND flash memory at a node between drain/source select transistor and adjacent flash memory cell
Provided is a structure for testing a NAND flash memory including a string select transistor, a source select transistor, flash memory cells connected in series between the string select transistor...
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7385867 |
Memory device and operating method thereof
A method of operating a memory device adapted for determining a program/erase state of a memory cell in the memory device. The method includes applying a drain operation voltage to a drain of the...
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7382646 |
Memory architecture containing a high density memory array of semi-volatile or non-volatile memory elements
An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable...
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7376013 |
Compact virtual ground diffusion programmable ROM array architecture, system and method
A compact, shared source line and bit line architecture for a diffusion programmable ROM. In one embodiment, a ROM circuit or instance includes a plurality of storage cells organized as an array...
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7372736 |
Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
A nonvolatile memory array has a single transistor flash memory cell and a two transistor EEPROM memory cell which maybe integrated on the same substrate. The nonvolatile memory cell has a floating...
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7366033 |
3-level non-volatile semiconductor memory device and method of driving the same
A page buffer for a non-volatile semiconductor memory device includes a switch configured to couple a first bitline coupled to a first memory cell to a second bitline coupled to a second memory...
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7366015 |
Semiconductor integrated circuit device, production and operation method thereof
A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an...
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7359239 |
Non-volatile memory device having uniform programming speed
Flash memory devices having a cell string structure. According to the present invention, the size of a first group of memory cells connected to a first word line and a second group of memory cells...
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7359228 |
Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
A semiconductor memory device capable of preventing a defect caused by lowering the etching precision in an end area of the memory cell array is provided. A first block is constructed by first...
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7355914 |
Methods and apparatuses for a sense amplifier
Various apparatuses and methods in which a sense amplifier circuit couples to a current source to provide current for the sense amplifier circuit and also couples to one or more memory cells to...
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7352618 |
Multi-level cell memory device and associated read method
A NOR flash memory device comprises a memory cell adapted to store at least two bits of data. A read operation is performed on the memory cell by generating a reference current with a first...
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7352601 |
USB flash memory device
A memory device for interconnection with a Universal Serial Bus (USB) Series A type receptacle of an electronic device includes a housing wherein the housing is largely rectangular, with the width...
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7349251 |
Integrated memory circuit arrangement
A memory circuit arrangement includes a switching element per column that can be used to connect or disconnect two bit lines for memory cells of a column. The switching element leads to a reduction...
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7342829 |
Memory device and method for operating a memory device
A memory device ( 1 ) includes a memory array ( 2 ). The memory array ( 2 ) has at least one memory area ( 5 ) that includes a plurality of conductive lines ( 3 ) and a plurality of memory cells (...
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7342828 |
Nonvolatile semiconductor memory device
In a nonvolatile memory cell, a selection transistor is connected to a memory cell transistor in series. The selection transistor is formed into a double layer gate structure, and has a voltage of...
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7342826 |
Semiconductor device
The read speed of an on-chip nonvolatile memory enabling electric rewrite is increased. The nonvolatile memory has a hierarchal bit line structure having first bit lines specific to each of a...
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7339827 |
Non-volatile semiconductor memory device and writing method thereof
In connection with rise and fall of a word line bias, the present invention adopts a procedure such that a diffusion region voltage Vs on a memory transistor side is changed, and after the voltage...
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7339826 |
Threshold voltage shift in NROM cells
An NROM (nitride read only memory) cell, which is programmed by channel hot electron injection and erased by hot hole injection, includes a charge trapping structure formed of: a bottom oxide...
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7339825 |
Nonvolatile semiconductor memory with write global bit lines and read global bit lines
A nonvolatile semiconductor memory is capable of dual and triple operation with a small chip size. A plurality of sectors is formed. Each sector has nonvolatile memory cells, local bit lines...
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7339820 |
Nonvolatile memory and semiconductor device
A nonvolatile memory capable of acting at each 1 bit and having a high integration density. A small-sized semiconductor device of multiple high functions having such nonvolatile memory. The...
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7339231 |
Semiconductor device and an integrated circuit card
There is provided a technology capable of enhancing reliability in rewrite of storage information in a nonvolatile memory while checking an increase in area of a memory array thereof. With a memory...
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7336098 |
High speed memory modules utilizing on-pin capacitors
Apparatus and method for producing memory modules having a plurality of branches connected to a memory bus, each branch containing at least one dynamic random access memory (DRAM) device or SDRAM...
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7327607 |
Method and apparatus for operating nonvolatile memory cells in a series arrangement
A memory cell with a charge storage structure is read by measuring current between the substrate region of the memory cell and one of the current carrying nodes of the memory cell. The read...
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7324378 |
Method of driving a program operation in a nonvolatile semiconductor memory device
In an embodiment, a method of driving a program operation in a nonvolatile semiconductor memory device is operable without discharging a bitline connected to a memory cell to be programmed between...
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7319618 |
Low-k spacer structure for flash memory
A flash memory cell includes a silicon substrate having a main surface, a source region in a portion of the silicon substrate proximate the main surface and a drain region in a portion of the...
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7319611 |
Bitline transistor architecture for flash memory
A memory array includes a buried diffusion region, a first source line that supplies electrical power to the buried diffusion region, a second source line that supplies electrical power to the...
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7317631 |
Method for reading Uniform Channel Program (UCP) flash memory cells
A flash memory cell can be read by selecting a local bit line. A read potential is applied to a memory cell transistor associated with the local bit line thereby generating a capacitive loading of...
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7315482 |
Memory device with a plurality of reference cells on a bit line
In accordance with one embodiment of the invention, a memory device comprises an array of memory cells arranged into word lines and bit lines, with a sense amplifier and a plurality of reference...
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7315474 |
Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays
Memory cells comprising: a semiconductor substrate having a source region and a drain region disposed below a surface of the substrate and separated by a channel region; a tunnel dielectric...
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7315472 |
Non-volatile memory device
A non-volatile memory device may include a plurality of memory blocks including memory cells connected in series to bit lines, respectively. Each of the plurality of memory blocks may include a...
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7313025 |
Flash memory erase verification systems and methods
Systems and methods are disclosed herein to provide improved verification of flash memory erasure. For example, in accordance with an embodiment of the present invention, an integrated circuit...
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7313021 |
Nonvolatile memory circuit
A nonvolatile memory circuit includes a flip-flop to degrade an internal circuit irreversibly based on a voltage applied to a first or second bit line so as to latch data in a nonvolatile manner, a...
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7312503 |
Semiconductor memory device including MOS transistors each having a floating gate and a control gate
A semiconductor memory device includes a plurality of memory cells, a plurality of local bit lines, a global bit line, a first switch element, and a holding circuit. The memory cell includes first...
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7310267 |
NAND flash memory device and method of manufacturing and operating the same
A NAND flash memory device, and more particularly, to NAND flash memory device and method of manufacturing operating the same as described. A dielectric film and a conduction layer are formed...
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7307880 |
One time programming memory cell using MOS device
An electroless plating apparatus is provided. The electroless plating apparatus includes a wafer holder; a chemical dispensing nozzle over the wafer holder; a conduit connected to the chemical...
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7307879 |
Nonvolatile memory device, and its manufacturing method
On a channel region enclosed by a pair of diffusion layers 13 A, 13 B, a first insulating layer 15 , a charge accumulative layer 17 , and a second insulating layer 19 are stacked up in this...
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7301811 |
Cost efficient nonvolatile SRAM cell
A cost efficient nonvolatile memory cell may include an inverter, an access gate coupled to the inverter for controlling access to the memory cell, and a control gate. The inverter may include a...
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7289362 |
Erasable and programmable non-volatile cell
An erasable and programmable non-volatile cell, comprising a first transistor having a source, a drain and a gate; a floating capacitor having a floating gate and a control gate, said floating gate...
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7286398 |
Semiconductor device and method of controlling said semiconductor device
A semiconductor device includes: groups of memory cells that are connected to word lines; and select gates that are controlled by control word lines and are connected to the groups of memory cells,...
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7286381 |
Non-volatile and-type content addressable memory
In order to speed up the search for a data item in a content addressable memory and to simplify the circuit structure of the memory having associated with each row of cells a ground control line, a...
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7283391 |
Semiconductor memory device
A semiconductor memory device comprises: a plurality of memory elements; at least one bit line, wherein a memory operation is performed via at least a portion of the bit line with respect to at...
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7274593 |
Nonvolatile ferroelectric memory device
A nonvolatile ferroelectric memory device is provided so as to control read/write operations of a nonvolatile memory cell using a channel resistance of the memory cell which is differentiated by...
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7274592 |
Non-volatile memory and method of controlling the same
A single cell that has a gate insulating film formed with an ONO film is provided in a region in which two bit lines cross one word line. The single cell is a four-bit multi-value cell, and has...
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7272042 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device includes a global-bit line, first and second section bit lines, a first transistor which connects the global bit line with the first section bit line, a...
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7272038 |
Method for operating gated diode nonvolatile memory cell
A gated diode nonvolatile memory cell with a charge storage structure includes a diode structure with an additional gate terminal. Example embodiments include the individual memory cell, an array...
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7269063 |
Floating gate memory with split-gate read transistor and split gate program transistor memory cells and method for making the same
Variations in memory array and cell configuration are shown, which eliminate punch-through disturb, reverse-tunnel. Several configurations are shown which range from combined and separate source...
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7269046 |
Systems and methods for programming floating-gate transistors
A floating-gate transistor array and method for programming the same. The floating-gate transistor array includes a plurality of transistors having a source, drain, and floating-gate, whereby the...
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7262992 |
Hearing aid
A hearing aid comprising a data memory includes a plurality of semiconductor memory cells. The semiconductor memory cell has a gate insulating film formed on a semiconductor substrate, on a well...
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7257033 |
Inverter non-volatile memory cell and array system
NVM arrays include rows and columns of NVM cells comprising a floating gate, dual transistor, inverter storage element. Supply voltage for selected storage elements is turned off during a...
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7248500 |
Nonvolatile semiconductor memory device having reduced dependency of a source resistance on a position in an array
A dummy cell having a low threshold voltage is disposed in a memory cell array in alignment with a memory cell. A dummy cell with a low threshold voltage adjacent to a selected memory cell column...
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