|
Match
|
Document |
Document Title |
|
|
7388784 |
Nonvolatile semiconductor memory device including memory cell units each having a given number of memory cell transistors
A nonvolatile semiconductor memory device includes a plurality of memory cell units and a memory cell array in which the memory cell units are arranged in matrix. Each of the memory cell units has...
|
|
|
7372729 |
High speed low voltage driver
A high speed high and low voltage driver provides an output voltage without taxing a pumped voltage. The pumped voltage is used only when the output node has risen substantially to a supply voltage...
|
|
|
7369432 |
Method for implementing a counter in a memory with increased memory efficiency
A method for implementing a counter in memory, e.g., non-volatile memory such as flash memory. A first number of first binary values indicating a first portion of a current number of the counter in...
|
|
|
7366015 |
Semiconductor integrated circuit device, production and operation method thereof
A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an...
|
|
|
7366012 |
Synchronous memory device with reduced power consumption
A synchronous non-volatile memory device that includes a circuit for performing operations on the memory device, a circuit for receiving a request of operation and operative information required...
|
|
|
7363556 |
Testing apparatus and testing method
A testing apparatus for testing a memory-under-test includes a writing section for writing preset test data into each page of said memory-under-test to test said memory-under-test and a fail memory...
|
|
|
7355238 |
Nonvolatile semiconductor memory device having nanoparticles for charge retention
A nonvolatile semiconductor memory device including a source region and a drain region formed on a surface of a semiconductor substrate, a channel-forming region formed so as to connect the source...
|
|
|
7352035 |
Flash memory devices and methods for fabricating flash memory devices
A flash memory device includes a cell string having a plurality of cell transistors connected in series, and a string selection transistor and a ground selection transistor connected to both ends...
|
|
|
7345928 |
Data recovery methods in multi-state memory after program fail
A non-volatile memory device includes the ability to recover data in event of a program failure without having to maintain a copy of the data until the write is completed. As the integrity of the...
|
|
|
7339820 |
Nonvolatile memory and semiconductor device
A nonvolatile memory capable of acting at each 1 bit and having a high integration density. A small-sized semiconductor device of multiple high functions having such nonvolatile memory. The...
|
|
|
7339231 |
Semiconductor device and an integrated circuit card
There is provided a technology capable of enhancing reliability in rewrite of storage information in a nonvolatile memory while checking an increase in area of a memory array thereof. With a memory...
|
|
|
7333362 |
Electrically erasable and programmable, non-volatile semiconductor memory device having a single layer of gate material, and corresponding memory plane
The semiconductor memory device includes an electrically erasable programmable non-volatile memory cell having a single layer of gate material and including a floating-gate transistor and a control...
|
|
|
7333098 |
Active matrix display apparatus and method for improved uniformity
An active matrix display apparatus is disclosed which can achieve significant improvement in uniformity. The display apparatus uses a horizontal driving circuit to which a precharge function is...
|
|
|
7307534 |
RFID tag using hybrid non-volatile memory
An RFID tag includes a non-volatile memory (NVM) circuit with at least two distinct types of NVM sub-circuits that share common support circuitry. Different types of NVM sub-circuits include...
|
|
|
7301794 |
Non-volatile memory array with simultaneous write and erase feature
A non-volatile transistor memory array has individual cells with a current injector and a non-volatile memory transistor. Injector current gives rise to charged particles that can be stored in the...
|
|
|
7299314 |
Flash storage system with write/erase abort detection mechanism
The present invention presents a non-volatile memory and method for its operation that ensures reliable mechanism for write and erase abort detection in the event of lost of power during...
|
|
|
7298646 |
Apparatus for configuring programmable logic devices and associated methods
A programmable logic device (PLD) includes a non-volatile configuration memory. The non-volatile configuration memory is adapted to configure programmable resources (such as programmable logic and...
|
|
|
7286439 |
Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
A memory array comprising array lines of first and second types coupled to memory cells includes a first hierarchical decoder circuit for decoding address information and selecting one or more...
|
|
|
7283395 |
Memory device and method for operating the memory device
A memory device comprises a memory cell array ( 1 ) with a multitude of memory cells ( 111 ). Each of the memory cells ( 111 ) is assigned to one of a multitude of blocks ( 15 ). Each memory cell (...
|
|
|
7283390 |
Hybrid non-volatile memory
A non-volatile memory (NVM) circuit includes at least two types of NVM sub-circuits that share common support circuitry. Different types of NVM sub-circuits include ordinary NVM circuits that...
|
|
|
7266014 |
Method of operating non-volatile memory device
A method of operating a non-volatile memory is provided, wherein the non-volatile memory at least includes: a gate structure formed by stacking a tunneling dielectric layer, charge trapping layer,...
|
|
|
7262991 |
Nanotube- and nanocrystal-based non-volatile memory
An embodiment is a transistor for non-volatile memory that combines nanocrystal and nanotube paradigm shifts. In particular an embodiment is a transistor-based non-volatile memory element that...
|
|
|
7259984 |
Multibit metal nanocrystal memories and fabrication
Metal nanocrystal memories are fabricated to include higher density states, stronger coupling with the channel, and better size scalability, than has been available with semiconductor nanocrystal...
|
|
|
7257023 |
Hybrid non-volatile memory device
The present invention discloses a memory device that includes a first memory cell array for storing one or more codes; a second memory cell array for storing one or more data, which are updated...
|
|
|
7254086 |
Method for accessing memory
The present invention provides a method for accessing a memory. The memory contains M one-time programmable memory blocks, and each has a first memory sector and a second memory sector. The method...
|
|
|
7251705 |
Embeddable flash memory system for non-volatile storage of code, data and bit-streams for embedded FPGA configurations
An application-specific embeddable flash memory having three content-specific I/O ports and delivering a peak read throughput of 1.2 GB/s. The memory is combined with a special automatic...
|
|
|
7251168 |
Interface for access to non-volatile memory on an integrated circuit
An integrated circuit (IC) includes volatile memories, at least one non-volatile memory, at least one control circuit, and a configurable logic array. Each volatile memory has an associated...
|
|
|
7245527 |
Nonvolatile memory system using magneto-resistive random access memory (MRAM)
A non-volatile memory system ( 230 ) includes a magnetoresistive random access memory (MRAM) ( 232 ) including a plurality of magnetoresistive memory cells, a floating-gate nonvolatile memory ( 234...
|
|
|
7244976 |
EEPROM device with substrate hot-electron injector for low-power programming
A low programming power, high speed EEPROM device is disclosed which is adapted for large scale integration. The device comprises a body, a source, a drain, and it has means for injecting a...
|
|
|
7242612 |
Non-volatile memory devices and methods for driving the same
Non-volatile memory devices and methods for driving the same are disclosed. An example non-volatile memory device includes a semiconductor substrate; source/drain junctions in a predetermined...
|
|
|
7242610 |
Ultraviolet erasable semiconductor memory device
Each memory cell of an EPROM contains two MOSFETs and a data of each memory cell is read out by detecting a current difference between the two MOSFETs by using a differential amplifier. In such...
|
|
|
7236395 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST*** Multi-purpose non-volatile memory card
A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two...
|
|
|
7236394 |
Transistor-free random access memory
A memory core includes a bit line and a word line. The memory core also includes a core cell in electrical communication with the word line and the bit line. The core cell includes a threshold...
|
|
|
7233521 |
Apparatus and method for storing analog information in EEPROM memory
A storage device that is capable of receiving an analog signal and storing it as a digital signal. The storage device includes an input node configured to receive an analog input voltage and two...
|
|
|
7221008 |
Bitline direction shielding to avoid cross coupling between adjacent cells for NAND flash memory
A NAND flash memory structure and method of making a flash memory structure with shielding in the bitline direction as well as in wordline and diagonal directions from Yupin effect errors and from...
|
|
|
7215571 |
Method for reducing drain disturb in programming
For a multi-sectored flash memory array with bitlines spanning multiple erase blocks, a bias scheme for programming an address in any erase sector while minimizing drain voltage induced disturb to...
|
|
|
7213091 |
SRAM bus architecture and interconnect to an FPGA
An SRAM bus architecture includes pass-through interconnect conductors. Each of the pass-through interconnect conductors is connected to routing channels of the general interconnect architecture of...
|
|
|
7209389 |
Trap read only non-volatile memory (TROM)
A Trap Read Only Memory (TROM) architecture employs a NAND-type array structure configured as a read-only memory that is programmed only one time. The memory cells in the array comprise a gate...
|
|
|
7209385 |
Array structure for assisted-charge memory devices
An Assisted Charge (AC) Memory cell comprises a transistor that includes, for example, a p-type substrate with an n+ source region and an n+ drain region implanted on the p-type substrate. A gate...
|
|
|
7208796 |
Split gate flash memory
A split gate flash memory is provided. Trenches are formed in the substrate to define active layers. The device isolation layers are formed in the trenches. The surface of the device isolation...
|
|
|
7196929 |
Method for operating a memory device having an amorphous silicon carbide gate insulator
A floating gate transistor has a reduced barrier energy at an interface with an adjacent amorphous silicon carbide (a-SiC) gate insulator, allowing faster charge transfer across the gate insulator...
|
|
|
7184291 |
Semiconductor memory having charge trapping memory cells and fabrication method
In the case of this semiconductor memory having NROM cells, the channel regions of the memory transistors in each case run transversely with respect to the relevant word line, the bit lines are...
|
|
|
7180813 |
Programmable system device having a shared power supply voltage generator for FLASH and PLD modules
A programmable system device includes an embedded FLASH memory module and an embedded programmable logic device (PLD) module. A sole embedded power supply voltage generator generates a plurality of...
|
|
|
7177177 |
Back-gate controlled read SRAM cell
An eight transistor static random access memory (SRAM)device includes first and second inverters, a first bit line, a first complement bit line, a pair of write access transistors, and a pair of...
|
|
|
7164602 |
Nonvolatile semiconductor memory device including high efficiency and low cost redundant structure
The PROM area is adjacent to the normal memory cell area. The data writing (normal writing) and the data reading (normal reading) for normal memory cell areas and the data writing (redundant...
|
|
|
7161831 |
Leaf plot analysis technique for multiple-side operated devices
A method for analyzing the interaction between threshold states of a multiple-bit memory cell on a coordinate system is provided. The coordinate system is formed using a plurality of axes with one...
|
|
|
7159069 |
Simultaneous external read operation during internal programming in a flash memory device
A system and method for performing a simultaneous external read operation during internal programming of a memory device is described. The memory device is configured to store data randomly and...
|
|
|
7154779 |
Non-volatile memory cell using high-k material inter-gate programming
A non-volatile memory device has a channel region between source/drain regions, a floating gate, a control gate, a first dielectric region between the channel region and the floating gate, and a...
|
|
|
7136302 |
Integrated circuit memory device and method
Structures and methods for DEAPROM memory with low tunnel barrier intergate insulators are provided. The DEAPROM memory includes a first source/drain region and a second source/drain region...
|
|
|
7130215 |
Method and apparatus for operating a non-volatile memory device
A nonvolatile memory cell with a charge trapping structure coupled in series is read, by measuring current that flows between the body region of the nonvolatile memory cell and the contact region...
|