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7598537 Semiconductor device  
A semiconductor device comprises one or two semiconductor chips, each including an input circuit having a wiring ( 3 ) for connecting an input pad ( 2 ) to an inner circuit, a first electrostatic...
7592666 Semiconductor memory  
A semiconductor memory having an electrically writable/erasable memory cell includes a first gate insulating layer made from a compound containing silicon and oxygen; a first charge-storage layer...
7577025 Semiconductor memory device comprising floating body memory cells and related methods of operation  
A semiconductor device comprising floating body memory cells performs read and write operations by selectively connecting bit lines and inverted bit lines to sense bit lines and inverted sense bit...
7577013 Storage units and register file using the same  
A storage unit capable of retaining data during sleep mode. The storage unit includes a first latch composed of first and second inverters and a second latch composed of the first inverter and a...
7477541 Memory elements and methods of using the same  
In a first aspect, a first apparatus is provided. The first apparatus is a memory element that includes (1) one or more MOSFETs each including a dielectric material having a dielectric constant of...
7450416 Utilization of memory-diode which may have each of a plurality of different memory states  
The present invention is a method of undertaking a procedure on a memory-diode, wherein a memory-diode is provided which is programmable so as to have each of a plurality of different threshold...
7432157 Method of fabricating flash memory  
Flash memory and methods of fabricating flash memory are disclosed. A disclosed method comprises: forming a first floating gate; and extending the first floating gate by forming a second floating...
7402862 Multi-bit non-volatile memory device having a dual-gate and method of manufacturing the same, and method of multi-bit cell operation  
The present invention relates to a multi-bit non-volatile memory device having a dual gate employing local charge trap and method of manufacturing the same, and an operating method for a multi-bit...
7391640 2-transistor floating-body dram  
A dynamic random access memory includes a cell having a circuit between a floating-body transistor and a bit line. Activation of the circuit is controlled to provide isolation between the floating...
7348621 Non-volatile memory cells  
A non-volatile memory cell and method of fabrication are provided. The non-volatile memory cell includes a substrate of a first conductivity type, a first dopant region of a second conductivity...
7342842 Data storage device and refreshing method for use with such device  
A data storage device such as a DRAM memory having a plurality of data storage cells 10 is disclosed. Each data storage cell 10 has a physical parameter which varies with time and represents...
7274587 Semiconductor memory element and semiconductor memory device  
A semiconductor memory element that stores data as a resistance difference. The memory element comprises a MIS transistor, a two-terminal variable resistor element, and a fixed resistor element....
7271010 Nonvolatile magnetic memory device and manufacturing method thereof  
An TMR-type MRAM comprising a transistor for selection; a first connecting hole; a first wiring (write-in word line); a second insulating interlayer covering a first insulating interlayer and the...
7242610 Ultraviolet erasable semiconductor memory device  
Each memory cell of an EPROM contains two MOSFETs and a data of each memory cell is read out by detecting a current difference between the two MOSFETs by using a differential amplifier. In such...
7236394 Transistor-free random access memory  
A memory core includes a bit line and a word line. The memory core also includes a core cell in electrical communication with the word line and the bit line. The core cell includes a threshold...
7136301 Semiconductor memory device and driving method thereof  
First active regions and second active regions intersecting the first active regions at a right angle are defined on the surface of a semiconductor substrate, and diffusion regions are formed in...
7123509 Floating body cell memory and reading and writing circuit thereof  
A semiconductor integrated circuit device is provided, which includes a semiconductor layer formed via an embedded insulation film on a substrate and an FBC (Floating Body Cell) which stores data...
7092273 Low voltage non-volatile memory transistor  
A p-channel non-volatile memory (NVM) transistor is programmed by shifting the threshold voltage of the transistor. The threshold voltage is shifted by introducing a programming current to the gate...
7072205 Floating-body DRAM with two-phase write  
A row of floating-body single transistor memory cells is written to in two phases.
7027327 Non-volatile memory  
A nonvolatile memory includes at least a first electrode ( 71 ) and a second electrode ( 72 ) provided on a substrate, the first and second electrodes being separated from each other, and a...
6909632 Multiple modes of operation in a cross point array  
Multiple modes of operation in a cross point array. The invention is a cross point array that uses a read voltage across a conductive array line pair during a read mode. The read voltage produces a...
6834008 Cross point memory array using multiple modes of operation  
Cross point memory array using multiple modes of operation. The invention is a cross point memory array that uses a read mode to determine the resistive state of a memory plug, a first write mode...
6781883 Apparatus and method for margin testing single polysilicon EEPROM cells  
Disclosed is a method and apparatus for evaluating margin voltages in single poly EEPROM cells. Briefly, the invention involves shifting the cell's threshold voltage higher, resulting in a...
6664588 NROM cell with self-aligned programming and erasure areas  
A memory cell has two diffusion areas in a substrate with a channel therebetween. The memory cell also includes a trapping dielectric layer at least over the channel, a gate at least above the...
6614070 Semiconductor non-volatile memory device having a NAND cell structure  
A NAND stack array ( 95′ ) is placed within a well formed on a semiconductor substrate and includes a series array of memory cell transistors ( 10 ) whose threshold voltages can be electrically...
6552887 Voltage dependent capacitor configuration for higher soft error rate tolerance  
A voltage dependent capacitor to provide soft error rate tolerance in an integrated circuit is disclosed. In one embodiment, a parallel n-p voltage dependent capacitor is used to protect a node...
6552357 Semiconductor memory device having plate lines and precharge circuits  
A dynamic semiconductor memory device includes memory cells each having a one-transistor/one-capacitor. The memory cells are arranged at their respective intersections of bit lines and word lines....
6490218 Digital memory method and system for storing multiple bit digital data  
A digital memory array includes memory cells having respective anti-fuse layers. Write signals that vary in at least one of current, voltage, and pulse length are applied to selected ones of the...
6480426 Semiconductor integrated circuit device  
A semiconductor integrated circuit device includes an integrated circuit provided in a semiconductor chip and setting information memory. The setting information memory stores operation/function...
6459110 Semiconductor storage element  
A memory cell array, in which a voltage that can reverse polarization is applied only to a memory cell that is an object of data writing. A semiconductor storage element is formed by a...
6331724 Single transistor E2prom memory device with controlled erasing  
A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding...
6181608 Dual Vt SRAM cell with bitline leakage control  
In some embodiments, the invention includes an integrated circuit including a bitline and a bitline#, wordlines, and memory cells. The memory cells each corresponding to one of the wordlines and...
6178114 Sensing apparatus and method for fetching multi-level cell data  
A reading circuit for a multibit memory cell in a memory array, the memory cell having a threshold gate voltage within a range of one of a first, second, third and fourth predetermined threshold...
6108234 Semiconductor memory device capable of carrying out a read-out operation at a high speed  
A semicomductive memory device has a memory cell connected to a word line and a digit line. The memory cell is for memorizing data of two bits in correspondence to first through fourth threshold...
6061280 Data protection system for nonvolatile semiconductor memory device  
An EEPROM chip includes a unit cell array. A plurality of word lines and bit lines are formed on the unit cell array. Unit cells are arranged at the intersections of these lines. Each unit cell is...
5982673 Secondary sense amplifier with window discriminator for self-timed operation  
A sensing system for sensing data from a data source and driving a pair of output lines in response thereto comprises: a primary sensing device operatively coupled to the data source for sensing...
5973958 Interlaced storage and sense technique for flash multi-level devices  
An interlaced storage method for storing data in multi-level flash memory cells so that data bits from multiple addresses are encoded and stored in a single flash memory cell, and a method for...
5943272 Circuit for sensing memory having a plurality of threshold voltages  
The circuit for sensing a memory having a plurality of threshold voltages is directed to using a technique for maintaining a characteristic curve of a voltages-matched circuit and combining a...
5914895 Non-volatile random access memory and methods for making and configuring same  
A memory cell includes non-volatile and volatile storage elements and is configured to dynamically alter threshold voltages of the non-volatile storage elements to store states of the volatile...
5852575 Apparatus and method for reading multi-level data stored in a semiconductor memory  
A semiconductor memory including memory cells, word lines, bit lines, a row decoder, column decoder, a voltage-changing circuit, a sense amplifier, and an output circuit. Each memory cell stores...
5828616 Sensing scheme for flash memory with multilevel cells  
Methods and apparatus for determining the state of a memory cell having more than two possible states are disclosed. For a first embodiment, the state of a flash cell having n states, where n is a...
5815436 Multi-level nonvolatile semiconductor memory device having improved programming level and read/write multi-level data circuits  
A nonvolatile semiconductor memory device includes a memory cell including a charge storage section for storing n-value data (n≥3). In this device, the charge storage section has discrete first...
5814853 Sourceless floating gate memory device and method of storing data  
A floating gate diode which can be used as a sourceless memory cell, and which may be arranged into an array of memory cells is disclosed. The floating gate diode comprises: a drain region formed...
5773861 Single transistor E.sup.2 PROM memory device  
A semiconductor memory cell device exhibiting superior cell reliability comprising a dual layer floating gate wherein the thin upper layer of the floating gate overlaps the edges of surrounding...
5751646 Redundancy elements using thin film transistors (TFTS)  
An embodiment of the present invention describes a redundancy repair circuit fabricated in a Static Random Access Memory (SRAM) semiconductor device, with the redundancy repair circuit comprising:...
5723885 Semiconductor device including a ferroelectric film and control method thereof  
A non-volatile semiconductor device can be obtained which is capable of enhancing integration level and performing accurate control of operations. A memory cell transistor of the semiconductor...
5691934 Memory cell and method of operation thereof  
An extremely compact dynamic memory cell (200) includes a capacitor (204) or any other suitable stored charge device, and a diode (208) such as a Zener diode, a pair of parallel, reverse-connected...
5663922 Method for the anticipated reading of serial access memory, and memory pertaining thereto  
A method and apparatus for reading a memory, such that the address decoding is started when the address bits have not yet all been received. All the information elements corresponding to the...
5663903 Flat-cell read-only memory  
The memory cells of a read-only memory are connected in parallel between adjacent bus-bit lines. The selection of tile sub-bit lines is through a selector logic decoder. The decoder has many rows...
5652450 Nonvolatile semiconductor storage device  
According to the present invention, a nonvolatile semiconductor storage device for applying to each word line either one of a selected voltage and a non-selected voltage, corresponding to a...
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