|
Match
|
Document |
Document Title |
|
|
8159020 |
Non-volatile two transistor semiconductor memory cell and method for producing the same
The invention relates to a nonvolatile two-transistor semiconductor memory cell and an associated fabrication method, source and drain regions (2 ) for a selection transistor (AT) and a memory...
|
|
|
8130549 |
Apparatus and method for detecting over-programming condition in multistate memory device
A system embodiment comprises a nonvolatile memory device, a memory, and a controller. The nonvolatile memory device includes a plurality of nonvolatile memory cells. Each nonvolatile memory cell...
|
|
|
8111547 |
Multi-bit flash memory and reading method thereof
A multi-bit flash memory and a reading method thereof. Multiple reference memory cells for saving reserved data are provided to operate together with multiple data memory cells. Before the data...
|
|
|
8098521 |
Method of providing an erase activation energy of a memory device
A write-once read-many times memory device is made up of first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second...
|
|
|
8085594 |
Reading technique for memory cell with electrically floating body transistor
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell consisting essentially of one transistor. The...
|
|
|
8077510 |
SRAM device
An SRAM device including a memory cell, the memory cell having two access transistors connected to a word line, and a flip-flop circuit having complementary transistors, the transistor being a...
|
|
|
8053822 |
Capacitorless DRAM and methods of manufacturing and operating the same
Example embodiments provide a capacitorless dynamic random access memory (DRAM), and methods of manufacturing and operating the same. The capacitorless DRAM according to example embodiments may...
|
|
|
8054680 |
Semiconductor device
Memory cells in which an erase and write operation is performed by injecting electrons from a substrate and extracting the electrons into a gate electrode constitute a semiconductor nonvolatile...
|
|
|
8050085 |
Semiconductor processing device and IC card
A semiconductor processing device according to the invention includes a first non-volatile memory (21) for erasing stored information on a first data length unit, a second non-volatile memory (22)...
|
|
|
8044448 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes: a memory cell array region having memory cells connected in series; a control circuit region disposed below the memory cell array region; and an...
|
|
|
8040728 |
Semiconductor integrated circuit
A semiconductor integrated circuit includes a non-volatile memory built into the semiconductor integrated circuit, the non-volatile memory electrically writing and erasing data and including a...
|
|
|
7982262 |
NAND memory device with inversion bit lines
A NAND based memory device uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities in smaller...
|
|
|
7983092 |
Nonvolatile memory apparatus and method of using thin film transistor as nonvolatile memory
The present invention relates to a nonvolatile memory apparatus and a method of using a thin film transistor (TFT) as a nonvolatile memory by storing carriers in a body of the TFT, which operates a...
|
|
|
7956397 |
Semiconductor device, charge pumping circuit, and semiconductor memory circuit
A semiconductor device comprising: a first well region which is formed at a surface portion of a semiconductor substrate and to which a first voltage is applied;a gate insulating film which is...
|
|
|
7952921 |
1-transistor type DRAM cell, DRAM device and DRAM comprising thereof and driving method thereof and manufacturing method thereof
The present invention relates to a semiconductor device, and more precisely to an 1-transistor type DRAM cell implemented using bulk silicon, a DRAM device and a DRAM comprising thereof and a...
|
|
|
7936004 |
Nonvolatile semiconductor memory device and manufacturing method thereof
A nonvolatile semiconductor memory device includes a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings...
|
|
|
7933153 |
Method for extracting the distribution of charge stored in a semiconductor device
The invention relates to a method for determining a set of programming conditions for a given type of charge-trapping non-volatile memory device, comprising the steps of: (a) selecting different...
|
|
|
7916531 |
Memory elements and methods of using the same
In a first aspect, a first apparatus is provided. The first apparatus is a memory element that includes (1) one or more MOSFETs each including a dielectric material having a dielectric constant of...
|
|
|
7911835 |
Programming and reading five bits of data in two non-volatile memory cells
Non-volatile memory devices and methods of programming the non-volatile memory devices use six threshold voltage levels. Data also may be read from the non-volatile memory devices. The non-volatile...
|
|
|
7903472 |
Operating method of non-volatile memory
An operating method of a non-volatile memory adapted for a non-volatile memory disposed on an SOI substrate including a first conductive type silicon body layer is provided. The non-volatile memory...
|
|
|
7889549 |
Nonvolatile semiconductor memory and data programming/erasing method
A nonvolatile semiconductor memory comprises: a semiconductor substrate; a first gate electrode formed on a surface of the semiconductor substrate through a first gate insulating film; a second...
|
|
|
7888771 |
E-fuse with scalable filament link
An electronic fuse (“E-fuse”) has a silicide filament link extending along a gap between polysilicon structures formed on a silicon substrate. The silicide filament link extends across dif...
|
|
|
7885106 |
Nonvolatile semiconductor memory device and method for driving same
A nonvolatile semiconductor memory device includes: a semiconductor substrate including a first channel, and a source region and a drain region provided on both sides of the first channel; a first...
|
|
|
7876641 |
Semiconductor integrated circuit
A clock signal generation circuit into which a first clock signal and a control signal based on an address are inputted, and a second clock signal based on said first clock signal is generated...
|
|
|
7835195 |
Storage data unit using hot carrier stressing
The memory comprises at least two data storage units using hot carrier stressing damage to store data. Each data storage unit comprises the first terminal, the second terminal and a third terminal....
|
|
|
7807518 |
Semiconductor memory device and manufacturing method thereof
The present invention provides a semiconductor memory device having a capacitor electrode of a MOS capacitor formed in polygon and slanting faces enlarged toward an insulating film are provided...
|
|
|
7791968 |
Determining history state of data in data retaining device based on state of partially depleted silicon-on-insulator
An integrated circuit and a design structure are disclosed. An integrated circuit may comprise: a data retaining device; a partially depleted silicon-on-insulator (PD SOI) device electrically...
|
|
|
7764541 |
Method and apparatus for hot carrier programmed one time programmable (OTP) memory
One time programmable memory devices are disclosed that are programmed using hot carrier induced degradation to alter one or more transistors characteristics. A one time programmable memory device...
|
|
|
7737487 |
Nonvolatile memories with tunnel dielectric with chlorine
In a nonvolatile memory cell with charge trapping dielectric (150), the tunnel dielectric (140) includes chlorine adjacent to the charge trapping dielectric but no chlorine (or less chlorine)...
|
|
|
7723789 |
Nonvolatile memory device with nanowire channel and method for fabricating the same
A nonvolatile memory device with nanowire channel and a method for fabricating the same are proposed, in which side etching is used to shrink side walls of a side-gate to form a nanowire pattern,...
|
|
|
7724587 |
Apparatuses, computer program products and methods for reading data from memory cells
In reading data from a memory cell, a determining circuit determines whether a received voltage value is within at least one first voltage range through a one-time read operation using a...
|
|
|
7718491 |
Method for making a NAND Memory device with inversion bit lines
A NAND based memory device uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities in smaller...
|
|
|
7715228 |
Cross-point magnetoresistive memory
A ferromagnetic thin-film based digital memory system having memory cells interconnected in a grid that are selected through voltage values supplied coincidently on interconnections made thereto...
|
|
|
7709884 |
Non-volatile two transistor semiconductor memory cell and method for producing the same
The invention relates to a nonvolatile two-transistor semiconductor memory cell and an associated fabrication method, source and drain regions (2) for a selection transistor (AT) and a memory...
|
|
|
7710771 |
Method and apparatus for capacitorless double-gate storage
A method and/or system and/or apparatus for a dual gate, capacitor less circuit that can act as a state storage device. Further embodiments describe fabrication methods and methods of operation of...
|
|
|
7668008 |
1-transistor type DRAM cell, a DRAM device and manufacturing method therefore, driving circuit for DRAM, and driving method therefor
The present invention relates to an 1-transistor DRAM cell, a DRAM device and a manufacturing method therefor, a driving circuit for a DRAM, a driving method therefore, and a driving method for an...
|
|
|
7643337 |
Multi-bit flash memory and reading method thereof
A multi-bit flash memory and a reading method thereof. Multiple reference memory cells for saving reserved data are provided to operate together with multiple data memory cells. Before the data...
|
|
|
7633819 |
Determining history state of data in data retaining device based on state of partially depleted silicon-on-insulator
A system, method and program product for determining a history state of data in a data retaining device are disclosed. A state of a partially-depleted silicon-on-insulator (PD SOI) device coupled...
|
|
|
7629640 |
Two bit/four bit SONOS flash memory cell
Charge migration in a SONOS memory cell is eliminated by physically separating nitride layer storage sites with dielectric material. Increased storage in a cell is realized with a double gate...
|
|
|
7592666 |
Semiconductor memory
A semiconductor memory having an electrically writable/erasable memory cell includes a first gate insulating layer made from a compound containing silicon and oxygen; a first charge-storage layer...
|
|
|
7577025 |
Semiconductor memory device comprising floating body memory cells and related methods of operation
A semiconductor device comprising floating body memory cells performs read and write operations by selectively connecting bit lines and inverted bit lines to sense bit lines and inverted sense bit...
|
|
|
7577013 |
Storage units and register file using the same
A storage unit capable of retaining data during sleep mode. The storage unit includes a first latch composed of first and second inverters and a second latch composed of the first inverter and a...
|
|
|
7477541 |
Memory elements and methods of using the same
In a first aspect, a first apparatus is provided. The first apparatus is a memory element that includes (1) one or more MOSFETs each including a dielectric material having a dielectric constant of...
|
|
|
7450416 |
Utilization of memory-diode which may have each of a plurality of different memory states
The present invention is a method of undertaking a procedure on a memory-diode, wherein a memory-diode is provided which is programmable so as to have each of a plurality of different threshold...
|
|
|
7432157 |
Method of fabricating flash memory
Flash memory and methods of fabricating flash memory are disclosed. A disclosed method comprises: forming a first floating gate; and extending the first floating gate by forming a second floating...
|
|
|
7402862 |
Multi-bit non-volatile memory device having a dual-gate and method of manufacturing the same, and method of multi-bit cell operation
The present invention relates to a multi-bit non-volatile memory device having a dual gate employing local charge trap and method of manufacturing the same, and an operating method for a multi-bit...
|
|
|
7391640 |
2-transistor floating-body dram
A dynamic random access memory includes a cell having a circuit between a floating-body transistor and a bit line. Activation of the circuit is controlled to provide isolation between the floating...
|
|
|
7348621 |
Non-volatile memory cells
A non-volatile memory cell and method of fabrication are provided. The non-volatile memory cell includes a substrate of a first conductivity type, a first dopant region of a second conductivity...
|
|
|
7342842 |
Data storage device and refreshing method for use with such device
A data storage device such as a DRAM memory having a plurality of data storage cells 10 is disclosed. Each data storage cell 10 has a physical parameter which varies with time and represents one of...
|
|
|
7274587 |
Semiconductor memory element and semiconductor memory device
A semiconductor memory element that stores data as a resistance difference. The memory element comprises a MIS transistor, a two-terminal variable resistor element, and a fixed resistor element....
|