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7414883 Programming a normally single phase chalcogenide material for use as a memory or FPLA  
A memory may be implemented with a stable chalcogenide glass which is defined as a generally amorphous chalcogenide material that does not change to a generally crystalline phase when exposed to...
7405967 Microelectronic programmable device and methods of forming and programming the same  
A microelectronic programmable structure and methods of forming and programming the structure are disclosed. The programmable structure generally include an ion conductor and a plurality of...
7405963 Dynamic data restore in thyristor-based memory device  
A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal...
7382650 Method and apparatus for sector erase operation in a flash memory array  
A memory device is provided which includes a substrate, a common P-well isolated from the substrate, a plurality of sectors, and a common sector selection transistor configured to select one of the...
7379315 Apparatus and methods for optically-coupled memory systems  
Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and...
7359238 Semiconductor nonvolatile storage circuit  
A semiconductor nonvolatile storage circuit capable of stably storing and holding information by preventing pseudo-writing in storing/holding FETs is realized. The semiconductor nonvolatile circuit...
7352603 Apparatus and methods for optically-coupled memory systems  
Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and...
7336524 Atomic probes and media for high density data storage  
A device in accordance with embodiments of the present invention comprises a contact probe for high density data storage reading, writing, erasing, or rewriting. In one embodiment, the contact...
7324373 Semiconductor device and short circuit detecting method  
A short circuit detection region includes an insulating film, plural first conductor traces and plural second conductor traces which are embedded in the insulating film with only their surfaces...
7324367 Memory cell and method for forming the same  
A semiconductor memory cell structure having 4 F 2 dimensions and method for forming the same. The memory cell is formed on a surface of a substrate and includes an active region formed in the...
7310266 Semiconductor device having memory cells implemented with bipolar-transistor-antifuses operating in a first and second mode  
A DAC having a memory mat including a plurality of first memory cells, and a plurality of output lines connected to the plurality of first memory cells. Each of the plurality of memory cells has a...
7304364 Embossed mask lithography  
Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on...
7301796 Memory cells utilizing metal-to-metal capacitors to reduce susceptibility to single event upsets  
Structures and methods of adding metal-to-metal capacitors to static memory cells to reduce susceptibility to SEUs. The addition of metal-to-metal capacitors is particularly suited to programmable...
7288782 Use of Ta-capped metal line to improve formation of memory element films  
Disclosed are methods for deposition of improved memory element films for semiconductor devices. The methods involve providing a hard mask over an upper surface of a metal line of a semiconductor...
7280381 Apparatus and methods for optically-coupled memory systems  
Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and...
7274618 Word line driver for DRAM embedded in a logic process  
A word line driver is provided for accessing a DRAM cell embedded in a conventional logic process. The DRAM cell includes a p-channel access transistor coupled to a cell capacitor. The word line...
7242060 Semiconductor memory device including an SOI substrate  
A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor...
7233517 Atomic probes and media for high density data storage  
A device in accordance with embodiments of the present invention comprises an atomic probe for high density data storage reading, writing, erasing, or rewriting. In one embodiment, the atomic probe...
7233512 Content addressable memory circuit with improved memory cell stability  
A Content Addressable Memory (CAM) circuit includes memory cells preferably formed as two memory cells each having internal nodes. A compare circuit is operative with the memory cells. A common...
7203084 Three-dimensional memory device with ECC circuitry  
The preferred embodiments described herein provide a memory device and methods for use therewith. In one preferred embodiment, a method is presented for using a file system to dynamically respond...
7199444 Memory device, programmable resistance memory cell and memory array  
A method of metal doping a chalcogenide material includes forming a metal over a substrate. A chalcogenide material is formed on the metal. Irradiating is conducted through the chalcogenide...
7177181 Current sensing method and apparatus particularly useful for a memory array of cells having diode-like characteristics  
A memory array includes a sensing circuit for sensing bit line current while keeping the voltage of the selected bit line substantially unchanged. The word lines and bit lines are biased so that...
7170779 Non-volatile memory using organic bistable device  
The present invention provides an organic bistable device for use in non-volatile memories. The organic bistable device comprises a first and a second metal electrode sandwiching a first and a...
7164597 Computer systems  
A two-transistor SRAM cell includes a first FET. The first FET is an ultrathin FET of a first polarity type and includes a control electrode, a first load electrode and a second electrode. The...
7149109 Single transistor vertical memory gain cell  
A high density vertical single transistor gain cell is realized for DRAM operation. The gain cell includes a vertical transistor having a source region, a drain region, and a floating body region...
7145811 Semiconductor storage device  
A semiconductor storage device according to one embodiment of the present invention, comprising: FBCs (Floating Body Cells) which store data by accumulating a majority carrier in a floating channel...
7142450 Programmable sub-surface aggregating metallization structure and method of making same  
A programmable sub-surface aggregating metallization structure (“PSAM”) includes an ion conductor such as a chalcogenide-glass which includes metal ions and at least two electrodes disposed at...
7138684 Semiconductor memory device including an SOI substrate  
A semiconductor memory device includes a plurality of N and P channel MOS transistors. The plurality of MOS transistors are formed on an SOI (Silicon On Insulator) substrate. Each MOS transistor...
7131033 Substrate configurable JTAG ID scheme  
A circuit generally comprising a core circuit and a test access port circuit. The core circuit may be configurable among a plurality of functions in response to a signal. The test access port...
7126200 Integrated circuits with contemporaneously formed array electrodes and logic interconnects  
The invention relates to interconnects for an integrated circuit memory device. Embodiments of the invention include processes to fabricate interconnects for memory devices in relatively few steps....
7113423 Method of forming a negative differential resistance device  
A negative differential resistance (NDR) field-effect transistor element is disclosed, formed on a silicon-based substrate using conventional MOS manufacturing operations. Methods for improving a...
7110281 Memory cells utilizing metal-to-metal capacitors to reduce susceptibility to single event upsets  
Structures and methods of adding metal-to-metal capacitors to static memory cells to reduce susceptibility to SEUs. The addition of metal-to-metal capacitors is particularly suited to programmable...
7085156 Semiconductor memory device and method of operating same  
There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to a memory device and technique of reading data from and writing data into memory...
7075821 Apparatus and method for a one-phase write to a one-transistor memory cell array  
A method and apparatus for a one-phase write to a one-transistor memory cell array. In one embodiment, the method includes a one-phase write to a selected wordline of a memory cell array. Once the...
7075820 Semiconductor memory device for dynamically storing data with channel body of transistor used as storage node  
A semiconductor memory device includes a plurality of MIS transistors arranged at intersections of first word lines and bit lines formed on an SOI substrate and each configuring a memory cell. Each...
7072205 Floating-body DRAM with two-phase write  
A row of floating-body single transistor memory cells is written to in two phases.
7061042 Double-cell memory device  
A memory array device has a plurality of gate structure lines, adjacently disposed over a substrate along a direction, wherein at least a portion of the gate structure lines have memory function. A...
7050323 Ferroelectric memory  
A nonvolatile memory cell in the form of an SRAM is composed of ferroelectric capacitors and transistors for amplification. The memory cell comprises a first capacitor (FC 1 ) connected between a...
7050320 MEMS probe based memory  
Briefly, in accordance with one embodiment of the invention, a memory device may include a memory layer and a MEMS layer. The memory layer may include an integrated circuit with a multiplexer and...
7042759 Dynamic data restore in thyristor-based memory device  
A dynamically-operating restoration circuit is used to apply a voltage or current restore pulse signal to thyristor-based memory cells and therein restore data in the cell using the internal...
7038943 Memory array having 2T memory cells  
The present invention relates to a memory array having a plurality of memory cells. In order to combine the compactness of DRAM with the speed and uncomplicated processing profits of SRAM the...
7035140 Organic-polymer memory element  
Embodiments of organic-polymer-based memory elements that are stable to repeated READ access operations are disclosed. Organic-polymer-based memory elements can suffer cumulative degradation that...
7020014 Circuit and method for temperature tracing of devices including an element of chalcogenic material, in particular phase change memory devices  
A phase change memory includes a temperature sensor having a resistance variable with temperature with the same law as a phase-change storage element. The temperature sensor is formed by a resistor...
7009868 Memory device having a transistor and one resistant element as a storing means and method for driving the memory device  
A memory device having one transistor and one resistant element as a storing means and a method for driving the memory device, includes an NPN-type transistor formed on a semiconductor substrate,...
6999351 Computer systems, processes for turning a SRAM cell off, and processes for writing a SRAM cell and processes for reading data from a SRAM cell  
A two-transistor SRAM cell includes a first FET. The first FET is an ultrathin FET of a first polarity type and includes a control electrode, a first load electrode and a second electrode. The...
6985384 Spacer integration scheme in MRAM technology  
A magneto resistive memory device is fabricated by etching a blanket metal stack comprised of a buffer layer, pinned magnetic layer, a tunnel barrier layer and a free magnetic layer. The problem of...
6985377 Phase change media for high density data storage  
A media device includes a phase change media having altered resistivity where data is written to the media. The media includes an overcoat to reduce physical damage inflicted on the media from a...
6980467 Method of forming a negative differential resistance device  
A negative differential resistance (NDR) field-effect transistor element is disclosed, formed on a silicon-based substrate using conventional MOS manufacturing operations. Methods for improving a...
6967866 Semiconductor memory and semiconductor integrated circuit  
A dummy MOSFET including a dummy gate separates nMOSFETs included in adjacent memory cells arranged in the direction in which bit lines extend. This configuration reduces a stress applied from an...
6961259 Apparatus and methods for optically-coupled memory systems  
Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and...
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