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8184471 DRAM having stacked capacitors of different capacitances  
A DRAM device having a plurality of memory blocks, including edge-located memory blocks and adjacent central memory blocks. An edge-located memory block shares a sense amplifier with an adjacent...
8184472 Split-gate DRAM with lateral control-gate MuGFET  
A semiconductor structure of an array of dynamic random access memory cells. The structure includes: a first fin of a first split-gate fin-type field effect transistor (FinFET) device on a...
8174920 Semiconductor memory device and driving method of the same  
A memory includes a first and a second bit lines (BL); a first and a second sense nodes (SN); a first transfer gate between the 1st-BL and the 1st-SN; a second transfer gate (TG) between the 2nd-BL...
8174866 Semiconductor storage device  
A semiconductor storage device includes: a memory cell array that includes a plurality of memory cells having a cell transistor formed on a well subjected to application of a predetermined...
8174913 Semiconductor memory device and driving method of the same  
A memory includes a cell region; a spare region including a spare block; a fuse region storing remedy information necessary for an access to the spare block instead of a remedy target block, the...
8174923 Voltage-stepped low-power memory device  
This disclosure has described a system for charging a capacitive energy storage device of at least one memory cell within an integrated circuit device from an initial voltage to a final voltage,...
8169812 Memory architecture with a current controller and reduced power requirements  
Disclosed is a memory architecture comprising at least one memory bit cell and at least one read bit line whose voltage is controlled and changed by a current from a current controller. Each memory...
8164942 High performance eDRAM sense amplifier  
Embedded dynamic random access memory (eDRAM) sense amplifier circuitry in which a bit line connected to each of a first plurality of eDRAM cells is controlled by cell control lines tied to each of...
8159861 Compact and highly efficient DRAM cell  
A compact dynamic random access memory (DRAM) cell and highly efficient methods for using the DRAM cell are disclosed. The DRAM cell provides reading, writing, and storage of a data bit on an ASIC...
8159860 Semiconductor memory device having a discharge path generator for global I/O lines  
A data path circuit includes a bit line sense amplifier, a local input/output line precharger connected to a local input/output line pair, a global input/output line precharger connected to a...
8149605 Compact and accurate analog memory for CMOS imaging pixel detectors  
An analog memory circuit, i.e. a sample and hold circuit, wherein the source and the gate of the switching transistor is maintained at a same potential prior and after the sampling process using a...
8144514 One-transistor floating-body DRAM cell device with non-volatile function  
The 1T floating-body DRAM cell device includes a floating body for storing information of the DRAM cell device, a source and a drain formed on respective sides of the floating body, a gate...
8139399 Multiple cycle memory write completion  
A memory system that reduces the memory cycle time of a memory cell by performing an incomplete write operation. The voltage on a storage node of the memory cell does not reach a full supply...
8139435 Data storage apparatus and control method of data storage apparatus  
In a data storage apparatus having data storage means, if it is judged that a condition of transitioning the data storage apparatus into a power saving state is established, it is controlled so...
8134867 Memory array having a programmable word length, and method of operating same  
A memory cell array and device having a memory cell array (i.e., an integrated circuit device, for example, a logic device (such as, a microcontroller or microprocessor) or a memory device (such...
8130576 Memory throughput increase via fine granularity of precharge management  
Methods and apparatus to improve throughput in memory devices are described. In one embodiment, memory throughput is increased via fine granularity of precharge management. In an embodiment, three...
8111564 Setting controller termination in a memory controller and memory device interface in a communication bus  
A DRAM and memory controller are coupled during driver training to reduce mismatches. The impedances of the system are controlled through a termination at the controller to yield improvements in...
8111537 Semiconductor memory  
A semiconductor memory that includes a memory cell array by which power consumption can be reduced and that enables a reduction in circuit area. In the memory cell array, each of capacitor plate...
8094498 Nonvolatile semiconductor memory device  
In a nonvolatile semiconductor memory device storing data by accumulating charges in a floating gate, memory units, each of which includes a first MOS transistor as a read device, a bit cell...
8094479 Semiconductor memory device  
A memory includes ferroelectric capacitors; sense amplifiers configured to detect the data stored in ferroelectric capacitors; and a plate control circuit configured to receive a plate driving...
8089801 Semiconductor memory device and method of forming the same  
The present invention discloses a semiconductor memory device comprising a source, a drain, a floating gate, a control gate, a recess channel and a gated p-n diode. The said p-n diode connects said...
8085594 Reading technique for memory cell with electrically floating body transistor  
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell consisting essentially of one transistor. The...
8085572 Semiconductor memory apparatus  
A semiconductor memory apparatus includes a unit cell with a transistor having a floated body and a capacitor for storing charges; a word line for activating the unit cell; and a bit line for...
8081500 Method for mitigating imprint in a ferroelectric memory  
An array of ferroelectric memory cells that allows imprint mitigation includes ferroelectric memory cells respectively coupled to word lines, plate lines, and bit lines; a word line driver for...
8081533 Semiconductor memory device  
A semiconductor memory device is provided between a refresh request circuit and a command decoder, and includes a refresh synchronous circuit for deactivating a refresh request if an external...
8081499 Semiconductor integrated circuit  
A field-effect transistor for nonvolatile memory holding use and a field-effect transistor for logical operation use are manufactured in the same structure on the same semiconductor substrate...
8081535 Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module  
A circuit is configured to be mounted on a memory module connectable to a computer system so as to be electrically coupled to a plurality of memory devices on the memory module. The memory module...
8081536 Circuit for memory module  
A circuit is configured to be mounted on a memory module configured to be operationally coupled to a computer system. The memory module has a first number of ranks of double-data-rate (DDR) memory...
8081537 Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module  
A circuit is configured to be mounted on a memory module connectable to a computer system so as to be electrically coupled to a plurality of memory devices on the memory module. The memory module...
8077535 Memory refresh apparatus and method  
A system and method are provided. The system and method simulate a DRAM memory circuit using an interface circuit connected to a plurality of other DRAM memory circuits. In response to the receipt...
8077528 Low couple effect bit-line voltage generator  
A bit-line voltage generator is provided. The bit-line voltage generator includes a discharge enhanced bias source and a switch unit. The switch unit includes a clamp transistor having a source, a...
8072837 Circuit providing load isolation and memory domain translation for memory module  
A circuit is configured to be mounted on a memory module configured to be operationally coupled to a computer system. The memory module has a first number of ranks of double-data-rate (DDR) memory...
8064240 Semiconductor memory device  
A memory includes word lines; plate lines; first to eighth bit lines; cell transistors; ferroelectric capacitor connected in parallel with cell transistors; sense amplifiers, wherein cell...
8064255 Architecture of a nvDRAM array and its sense regime  
A process of operating a memory array includes performing all volatile and nonvolatile operations on an nvDRAM cell array via a single data interface and using only DRAM-level signals on the data...
8059459 Semiconductor memory having both volatile and non-volatile functionality and method of operating  
Semiconductor memory having both volatile and non-volatile modes and methods of operation. A semiconductor storage device includes a plurality of memory cells each having a floating body for...
8059451 Multiple valued dynamic random access memory cell and thereof array using single electron transistor  
Provided is a multi-valued dynamic random access memory (DRAM) cell using a single electron transistor (SET). The multi-valued DRAM cell using the SET applies different refresh signals to a load...
8054676 Memory system such as a dual-inline memory module (DIMM) and computer system using the memory system  
A memory system (250) includes a plurality of memory devices (260) adapted to be coupled to an interface (140), an indicator (272) for indicating a type of the plurality of memory devices (260),...
8053832 Capacitor-less DRAM device  
Provided is a capacitor-less DRAM device including: an insulating layer formed on a semiconductor substrate; a silicon layer formed on the insulating layer, wherein a trench is formed inside the...
8050080 Random access memory with CMOS-compatible nonvolatile storage element in series with storage capacitor  
Random access memory with CMOS-compatible nonvolatile storage element in series with storage capacitor is described herein. Embodiments may include memory devices and systems that have plurality of...
8050126 Non-volatile memory with improved sensing by reducing source line current  
One or more sense amplifiers for sensing the conduction current of non-volatile memory is controlled by signals that are timed by a reference sense amplifier having similar characteristics and...
8049219 Integrated circuit, semiconductor device comprising the same, electronic device having the same, and driving method of the same  
An integrated circuit mounting a DRAM which can realize high integration without complicated manufacturing steps. The integrated circuit according to the invention comprises a DRAM in which a...
8050092 NAND flash memory with integrated bit line capacitance  
Method and apparatus for outputting data from a memory array having a plurality of non-volatile memory cells arranged into rows and columns. In accordance with various embodiments, charge is stored...
8045365 Apparatus and method for self-refreshing dynamic random access memory cells  
A dynamic random access memory (DRAM) having DRAM cells coupled to wordlines and bitlines. In a self-refresh mode, the cells coupled with the even numbered rows retain main data previously stored...
8044911 Source driving circuit and liquid crystal display apparatus including the same  
A source driving circuit includes a source driver circuit, an intermediate voltage generator, and a switching control unit. The source driver circuit receives display data and generates a source...
8040728 Semiconductor integrated circuit  
A semiconductor integrated circuit includes a non-volatile memory built into the semiconductor integrated circuit, the non-volatile memory electrically writing and erasing data and including a...
8040722 Charge mapping memory array formed of materials with mutable electrical characteristics  
A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a...
8036017 Semiconductor memory device  
An inexpensive nonvolatile memory having high performance which makes random write and readout possible an unlimited number of times is provided. A unit memory cell is formed of a MISFET having a...
8036048 Semiconductor integrated circuit having DRAM word line drivers  
A semiconductor integrated circuit according to one aspect of the present invention may includes a plurality of driving circuits to drive a respective plurality of word lines with either a first...
8036021 Semiconductor memory device  
A memory cell array includes a plurality of memory cells arranged at intersections of bit line pairs and word lines. Each memory cell includes a first transistor having one main electrode connected...
8036020 Circuit for reading a charge retention element for a time measurement  
A method and a circuit for reading an electronic charge retention element for a temporal measurement, of the type including at least one capacitive element whose dielectric exhibits a leakage and a...
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