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7016219 Single transistor non-volatile memory system, design, and operation  
Described are area-efficient non-volatile memory systems. Non-volatile memory cells in these systems include only one transistor, two fewer than conventional non-volatile memory cells, and reduced...
7012843 Device for driving a memory cell of a memory module by means of a charge store  
A device for driving a memory cell ( 601 ) of a memory module which can be operated with an external voltage (V EXT ) and an operating frequency (f CLK ), whereas the memory cell ( 601 ) has a...
7009864 Zero cancellation scheme to reduce plateline voltage in ferroelectric memory  
Ferroelectric memory devices and methods are provided, wherein a cell plateline signal is applied to a ferroelectric target cell capacitor and a zero cancellation capacitor is coupled with a...
7009870 Semiconductor integrated circuit apparatus  
A semiconductor integrated circuit apparatus that is capable of reducing crosstalk without increasing the number of low impedance external terminals is realized by implementing first external...
7009276 Thin film capacitor, thin film capacitor array and electronic component  
A thin film capacitor with small electrode resistance and great Q-value which comprises a small number of thin films that are deposited successively is disclosed. It is effective for...
7009869 Dynamic memory cell  
A dynamic memory cell which can be selected by means of a selection signal and the content of which can be read out by means of a bit line pair with a first and a second bit line, having a storage...
7006397 Data write circuit in memory system and data write method  
There is disclosed a memory system including a memory cell array, a sense amplifier circuit, a write circuit, a level setting circuit, a column decoder, a data line, and a sense amplifier control...
7006398 Single data line sensing scheme for TCCT-based memory cells  
A sensing circuit including a sense amplifier to resolve a data signal generated by a memory cell is disclosed herein. The sensing circuit includes a bit line to receive the data signal, a first...
7002868 High-speed, two-port dynamic random access memory (DRAM) with a late-write configuration  
A semiconductor device has a memory cell array including a plurality of memory cells, each of which includes first and second transistors and connected in series between a bit line for normal...
7002859 On-die switchable test circuit  
An information handling system includes a computer system having at least one integrated circuit formed on a die. The integrated circuit includes an output circuit and a device pin operably...
6999335 Semiconductor memory device with improved memory retention  
A semiconductor memory device permitting the data “0” and the data “1” to be arbitrarily written to a reference cell capacitor for generating a reference potential, having a non-volatile...
6999369 Circuit and method for refreshing memory cells of a dynamic memory  
A circuit for refreshing memory cells of a dynamic memory contains a refresh control circuit ( 3, 4, 7 ) and a memory circuit ( 2 ) for storing a plurality of register bits ( 2 - 1 to 2 -n), a...
6996685 Device for accessing registered circuit units  
A device is provided for accessing circuit units via access registers. The circuit units have a plurality of inputs for access to said circuit units. A first access register having register outputs...
6996021 ROM embedded DRAM with bias sensing  
A ROM embedded DRAM that provides ROM cells that can be programmed to a single state. Bias techniques are used to read un-programmed ROM cells accurately. Sense amplifier circuitry can be offset in...
6992928 Semiconductor memory device with an improved memory cell structure and method of operating the same  
A semiconductor memory device includes a plurality of memory cells, each of which comprises a single pair of a volatile memory element and a non-volatile memory element, wherein the volatile memory...
6992913 Ferroelectric storage device  
In the present invention, a polarization having a lower polarization level than a saturation polarization is caused in a ferroelectric capacitor by applying a voltage that is lower than a...
6989560 Semiconductor device and method of fabricating the same  
Since at least a portion of a trench capacitor electrode is formed by a metal, the electrical sheet resistance of the electrode can be lowered, and the signal propagation time prolonged by CR delay...
6990008 Switchable capacitance and nonvolatile memory device using the same  
A device ( 2 ) with a switchable capacitance comprises a first and a second electrode ( 12, 20 ) facing each other, a dielectric layer ( 14 ) between a first and a second capacitor electrode ( 12,...
6982897 Nondestructive read, two-switch, single-charge-storage device RAM devices  
A random access memory (RAM) circuit is coupled to a write control line, a read control line, and one or more bitlines, and includes a write switch having a control terminal and first and second...
6982466 Semiconductor devices including a silicide layer  
Embodiments of the present invention include a method for manufacturing a semiconductor device and a semiconductor device, in which, when a DRAM and a MOS field effect transistor that becomes a...
6980459 Non-volatile SRAM  
A SRAM cell wherein the pull up load of the cell is inherent ferroelectric leakage. The power down writeback may include boosting the word line. The power down writeback may also include...
6980461 Reference current generator, and method of programming, adjusting and/or operating same  
There are many inventions described and illustrated herein. In a first aspect, the present invention is a technique and circuitry for reading data that is stored in memory cells. In one embodiment...
6977410 Test mode decoder in a flash memory  
Embodiments of the present invention include an interface circuit to put an integrated circuit into a test mode and a decoder to decode one or more commands provided to the integrated circuit. The...
6977836 Memory device that can be irreversibly programmed electrically  
A non-volatile memory device includes a memory plane formed from a matrix of memory cells, each including an access transistor and a capacitor. The matrix includes first and second groups of cells...
6974996 Semiconductor device and method of manufacturing the same  
In a semiconductor device having a trench-gate structure in which polysilicon doped with boron is embedded in a trench, insulating film formed on the inner wall of the trench comprises ONO film,...
6975550 Array transistor amplification method and apparatus for dynamic random access memory  
As disclosed herein, a method and apparatus are provided for amplifying a signal by a transistor of an array of transistors that includes a storage cell transistor array of a dynamic random access...
6975530 Memory device comprising hysteretic capacitance means  
A memory device capable of suppressing reduction of a read margin resulting from fluctuation of a reference potential while reducing the area of a memory cell array is obtained. This memory device...
6975531 6F2 3-transistor DRAM gain cell  
A high density vertical three transistor memory cell is provided. The high density vertical three transistor memory cell is formed in a vertical pillar. The vertical pillar includes a first...
6972990 Ferro-electric memory device and method of manufacturing the same  
A ferro-electric memory device includes a gate electrode which is formed on a semiconductor substrate, first and second diffusion layers which are formed in the semiconductor substrate, a first...
6972983 Increasing the read signal in ferroelectric memories  
Improved sensing of ferroelectric memory cells is disclosed. When a memory access is initiated, the bitlines are precharged to a negative voltage, for example, −0.5 to −1.0V. This increases the...
6970794 Semiconductor having reduced configuration pins and method thereof  
A configurable semiconductor device having a plurality of predetermined configurations comprises a measurement circuit to measure an electrical characteristic of at least one external impedance and...
6970374 Low leakage current static random access memory  
A static random access memory (SRAM) has a plurality of SRAM cells, a first switch unit, a second switch unit, and a capacitor. During read/write operations of the SRAM cells, the first switch unit...
6970370 Ferroelectric write once read only memory for archival storage  
Structures and methods for ferroelectric write once read only memory adapted to be programmed for long retention archival storage are provided. The write once read only memory cell includes a...
6970372 Dual gated finfet gain cell  
A memory gain cell for a memory circuit, a memory circuit formed from multiple memory gain cells, and methods of fabricating such memory gain cells and memory circuits. The memory gain cell...
6967887 Semiconductor memory device including a double-gate dynamic random access memory cell having reduced current leakage  
A dynamic random access memory (DRAM) cell and associated array are disclosed. The DRAM cell ( 300 ) includes a storage capacitor ( 304 ) and a pass transistor ( 302 ). The pass transistor ( 302 )...
6965531 Semiconductor memory device having a reference cell  
An open-bit semiconductor memory device includes a plurality of memory cell arrays, wherein half of the memory cells in the memory cell array and half of the memory cells in the adjacent memory...
6956759 Ferrodielectric non-volatile semiconductor memory  
A ferroelectric-type nonvolatile semiconductor memory comprising a bit line BL, a transistor for selection TR, a memory unit MU composed of memory cells MC M that are M in number (M≧2), and...
6954377 Non-volatile differential dynamic random access memory  
In accordance with the present invention, a memory cell includes a pair of non-volatile devices and a pair of DRAM cells each associated with a different one of the non-volatile devices. Each DRAM...
6954371 Semiconductor integrated circuit device  
The present invention provides a dynamic RAM which can be operated at a low voltage and realizes the enhancement of a read margin and an area-saving layout. In a memory array including a plurality...
6954386 Boosted potential generation circuit and control method  
A boosted potential generation circuit enables a high-speed operation and even miniaturization in a semiconductor memory even if external power supply voltage is reduced in the semiconductor...
6952377 Memory device and method for writing data in memory cell with boosted bitline voltage  
Provided are a method of writing data into a memory cell with a boosted write voltage and a memory device that performs the method. The method involves (a) transmitting data input in response to a...
6952756 Method and apparatus for speculative loading of a memory  
The present invention provides a speculatively loaded memory for use in a data processing system. The present invention may include a memory block including rows each identified by an address. A...
6950327 Semiconductor memory device and electronic apparatus mounting the same  
In a ferroelectric capacitor, two displacements (points b and c) of a remanent polarization correspond to data “1” and one displacement (point a) of the remanent polarization corresponds to...
6950353 Cell data margin test with dummy cell  
A memory array includes a true bitline and a complementary bitline and a sense amplifier connected thereto; a row of normal cells with capacitors for data storage and bitline storage capacitors. A...
6950367 Memory embedded logic integrated circuit mounting memory circuits having different performances on the same chip  
A semiconductor integrated circuit includes a first DRAM circuit having a first memory cell array having a plurality of memory cells each including a first MOS transistor, and a first potential...
6944046 Ferroelectric memory and method of testing the same  
A ferroelectric memory comprising a plurality of memory cells each including a ferroelectric capacitor and a switch transistor, and operating in a test mode in which, after polarized data is...
6940743 Semiconductor memory devices for outputting bit cell data without separate reference voltage generator and related methods of outputting bit cell data  
Semiconductor memory devices are provided which include an array of memory cells, an array of reference cells, and a plurality of sense amplifiers that are associated with respective of the memory...
6940741 Semiconductor memory device and methods of operation thereof  
A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element...
6940742 Method of storing data in ferroelectric memory device  
A method of storing data in a ferroelectric memory device is capable of dealing with a program request during a read cycle or a change in program data during a program cycle. In this data storage...
6940740 Multilevel semiconductor memory device and method for driving the same as a neuron element in a neural network computer  
A semiconductor device includes: a control-voltage supply unit 110 ; an MOS transistor including a gate electrode 109 and drain and source regions 103 a and 103 b ; a dielectric capacitor ...