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7106630 |
Semiconductor storage device, mobile electronic apparatus, method for controlling erase operation, and method for controlling program operation
A semiconductor storage device is provided, which comprises a memory array comprising a plurality of memory elements, a section for performing an erase or program operation with respect to the...
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7106621 |
Random access memory array with parity bit structure
A random access memory array includes first random access memory elements arranged in a plurality of rows and columns for storing data words at a multiple memory locations. The memory array further...
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7106619 |
Graphics controller integrated circuit without memory interface
A graphics controller system which has a graphics engine and video memory together with some interface blocks, a PCMCIA host adapter, an infrared interface for generating video images on a LCD or...
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7106615 |
FeRAM capable of restoring “0” data and “1” data at a time
A semiconductor memory device includes a first memory cell block that has one end connected to the first bit line and the other end connected to a common node, the first memory cell block including...
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7102909 |
Storage circuit, semiconductor device, and electronic apparatus
A storage circuit equipped with a first ferroelectric capacitor and a second ferroelectric capacitor each having one end and another end, a first connecting section that is electrically connected...
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7102914 |
Gate controlled floating well vertical MOSFET
A novel transistor structure for a DRAM cell includes two deep trenches, one trench including a vertical storage cell for storing the data and the second trench including a vertical control cell...
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7102949 |
Semiconductor memory device and memory system
A command register holding a decoded result of information relating to an access request supplied from an outside and an address register are provided, and decode of the information relating to an...
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7099181 |
Non-volatile dynamic random access memory
A method for operating a non-volatile dynamic random access memory (NVDRAM) device having a plurality of memory cells, each cell having a capacitor and a transistor having a floating gate includes...
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7099172 |
Static content addressable memory cell
A static content addressable memory (CAM) cell. The CAM cell includes a latch having complementary data nodes capacitively coupled to ground, first and second access transistors, each coupled...
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7099216 |
Single cycle read/write/writeback pipeline, full-wordline I/O DRAM architecture with enhanced write and single ended sensing
A DRAM is disclosed which includes a single ended bitline structure, a single ended global bitline structure, primary sense amplifiers with data storage and data write-back capability and with...
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7099197 |
Semiconductor memory device
A semiconductor memory device may include: (1) a word line drive circuit, having a drive transistor disposed between a positive power supply and a word line, (2) a circuit for turning the drive...
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7092274 |
Ferroelectric memory device
A ferroelectric memory device includes a memory cell array having memory cells arranged in a matrix form. Each of the memory cells includes a cell transistor and a ferroelectric capacitor. It...
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7092308 |
Portable data storage apparatus
A memory card including a non-volatile memory and a power management unit for receiving an external supply voltage to supply an operating voltage to the non-volatile memory, wherein when the...
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7093208 |
Method for tuning a digital design for synthesized random logic circuit macros in a continuous design space with optional insertion of multiple threshold voltage devices
A Digital Design Method which may be automated is for obtaining timing closure in the design of large, complex, high-performance digital integrated circuits. The methodincludes the use of a tuner...
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7088605 |
FeRAM memory design using ROM array architecture
A FeRAM array configured in a ROM format is provided. The FeRAM array includes a memory array that has a plurality of segmented BL/PL arrays, and each segmented BL/PL array defines an I/O. A...
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7085153 |
Semiconductor memory cell, array, architecture and device, and method of operating same
There are many inventions described and illustrated herein. In a first aspect, the present invention is directed to a memory cell and technique of reading data from and writing data into that...
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7085152 |
Memory system segmented power supply and control
A memory device having memory cells supplied with a separate higher voltage power than the separate power supplied to memory logic, and a lower power state that entails removing power from at least...
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7082047 |
Ferroelectric memory input/output apparatus
A memory system. The system includes at least two ferroelectric memory devices arranged sequentially. Each memory device has a data in signal and a data out signal, and the data out signal each...
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7082049 |
Random access memory having fast column access
A memory comprises a column decoder and a circuit. The circuit is configured to receive a column address strobe signal, a column active signal, and a column addresses signal. The circuit is...
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7075810 |
Nonvolatile ferroelectric memory device
A nonvolatile ferroelectric memory device transmits/receives data of a cell by using a main bitline of a cell array block as a data bus in a system on chip (SOC) having a hierarchical bitline...
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7072204 |
Semiconductor memory device having dummy word line
Each cell unit has a cell plate electrically isolated from the cell plates in the other cell units.
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7072205 |
Floating-body DRAM with two-phase write
A row of floating-body single transistor memory cells is written to in two phases.
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7068529 |
Nonvolatile ferroelectric memory device
The disclosed nonvolatile ferroelectric memory device comprises: a memory cell array including a plurality of memory cells connected to a plurality of wordlines and a plurality of platelines,...
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7064973 |
Combination field programmable gate array allowing dynamic reprogrammability
A cell that can be used as a dynamic memory cell for storing data used in programming a field programmable gate array (FPGA) is disclosed. The cell comprises a select transistor having a gate, a...
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7064366 |
Ferroelectric memory devices having an expanded plate electrode
Ferroelectric memory devices are formed on an integrated circuit substrate. A bottom interlayer dielectric layer is positioned on the integrated circuit substrate and a plurality of ferroelectric...
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7064996 |
Refreshing dynamic memory cells in a memory circuit and a memory circuit
Methods and apparatus for refreshing a dynamic memory cell in a memory circuit are provided, wherein the required time between refresh operations may be increased by increasing the potential...
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7061814 |
Semiconductor device realized by using partial SOI technology
A semiconductor substrate has a bulk region and a semiconductor region formed either on a buried insulating film or on a cavity region. The bulk region contains a plurality of memory cells, sense...
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7061788 |
Semiconductor storage device
A semiconductor storage device comprises first and second memory cells, each connected to the first pair of word line and bit line and a second pair of word line and bit line, a sense amplifier...
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7057961 |
Circuit and method for evaluating and controlling a refresh rate of memory cells of a dynamic memory
A circuit for controlling a refresh rate of memory cells of a dynamic memory includes a control circuit for controlling an access to memory cells of the dynamic memory. A memory circuit can be...
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7053019 |
Dielectric material compositions with high dielectric constant and low dielectric loss
A new dielectric material composition with high dielectric constant and low dielectric loss, which includes a quaternary metallic oxide having a pervoskite structure and represented by a general...
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7050323 |
Ferroelectric memory
A nonvolatile memory cell in the form of an SRAM is composed of ferroelectric capacitors and transistors for amplification. The memory cell comprises a first capacitor (FC 1 ) connected between a...
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7050338 |
Semiconductor integrated circuit device having memory cells divided into groups
A semiconductor integrated circuit device includes a plurality of memory cells divided into a plurality of groups, and a reference voltage selecting circuit which sets different reference voltages...
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7046549 |
Nonvolatile memory structure
The invention is directed to a layout of nonvolatile memory device. The memory cell has a gate electrode, a first doped electrode, and a second doped electrode. The first doped electrode is coupled...
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7046543 |
Semiconductor memory device with improved data retention characteristics
Conductive lines constituting word lines of memory cells and conductive lines constituting memory cell plate electrodes are formed in the same interconnecting layer in a memory device including a...
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7046568 |
Memory sensing circuit and method for low voltage operation
A sensing module operates with a sense amplifier sensing a conduction current of a memory cell via a coupled bit line under constant voltage condition in order to minimize bit-line to bit-line...
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7046540 |
Semiconductor integrated circuit device and information storage method therefor
A semiconductor integrated circuit device includes a cell array having a plurality of memory cells, a peripheral circuit which controls the cell array, and an operation information determination...
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7042783 |
Magnetic memory
One embodiment of a magnetic memory includes a memory cell configured to provide a first state, and a sensing circuit. The sensing circuit is configured to charge a capacitor through the memory...
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7042754 |
Ferroelectric memory device and electronic apparatus
A ferroelectric memory device equipped with a plate line control section that selects a specified plate line that is connected to a specified memory cell, thereby discharging a data accumulation...
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7038930 |
Memory device with function to perform operation, and method of performing operation and storage
To provide a memory device with a function to perform an operation and a method of performing an operation and storage which can save space and cost and which can start, immediately after the power...
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7034408 |
Memory device and method of manufacturing a memory device
A memory device includes a DRAM memory cell array, which is implemented as a 6 F×F array, and peripheral circuitry. The word lines of the memory cell array are implemented as buried word lines,...
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7035133 |
SRAM-compatible memory device performing refresh operation having separate fetching and writing operation periods and method of driving the same
An SRAM-compatible memory device performs a refresh operation with separate fetching and rewriting operation periods.The SRAM-conpatible memory device can be activated by a method of driving the...
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7035131 |
Dynamic random access memory cell leakage current detector
A circuit operable to measure leakage current in a Dynamic Random Access Memory (DRAM) is provided comprising a plurality of DRAM bit cell access transistors coupled to a common bit line, a common...
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7035128 |
Semiconductor memory device and semiconductor integrated circuit device
In a DRAM memory cell including an access Tr and a cell capacitor, a depletion type MOSFET is used for each of the access Tr and the cell capacitor. Thus, an operation margin can be increased and...
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7031180 |
Method of reading data in ferroelectric memory device and ferroelectric memory device
A method of reading data in a ferroelectric memory device includes applying a read voltage to a ferroelectric capacitor, and detecting a voltage that reflects an amount of a dynamic change in...
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7027317 |
Semiconductor memory with embedded DRAM
A semiconductor memory comprises a plurality of memory cells, for example Flash memory cells, arranged in a plurality of lines, and a plurality of memory cell access signal lines, each one...
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7027326 |
3T1D memory cells using gated diodes and methods of use thereof
A memory cell comprises: (1) a write switch, the first terminal of the write switch coupled to an at least one bitline, the control terminal of the write switch coupled to the first control line;...
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7023721 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device including a plurality of memory cells, each having a storage MOSFET holding information in a gate of the storage MOSFET, a write transistor supplying a...
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7020039 |
Isolation device over field in a memory device
A memory device includes isolation devices located between memory cells. A plurality of isolation lines connects the isolation devices to a positive voltage during normal operations but still keeps...
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7016211 |
DRAM-based CAM cell with shared bitlines
A CAM cell is disclosed that includes a comparator and two three-transistor (3T) DRAM cells connected to a pair of associated bit lines. Data is stored using intrinsic capacitance of each 3T DRAM...
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7016227 |
Nonvolatile random access memory and method of fabricating the same
The unit cell is constructed to have a volatile memory element provided with a capacitor element adapted to store and sustain an electric charge only in a state in which electric power is supplied,...
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