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7623132 |
Programmable shader having register forwarding for reduced register-file bandwidth consumption
A method and apparatus of operating a shader having multiple texture or shader processing stations. That method includes feeding the output of a texture or shader processing station directly into...
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7576747 |
Display controller, electronic equipment and method for supplying image data
The display controller includes a first memory storing image data and being accessed with a sequential access operation having a shorter access time than that of a random access operation, a second...
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7576744 |
Automatic image correction circuit
An automatic image correction circuit automatically performs image correction on obtained image data. The automatic image correction circuit includes the following elements. A storage unit stores...
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7565490 |
Out of order graphics L2 cache
Circuits, methods, and apparatus that provide an L2 cache that services requests out of order. This L2 cache processes requests that are hits without waiting for data corresponding to requests that...
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7546480 |
High speed bus with alignment, re-timing and buffer underflow/overflow detection enhancements
In a networked system in which high speed busses interconnect sources and destinations of data, systems for and methods of data alignment, data re-timing, and circular buffer underflow/overflow...
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7538771 |
Mail data processing method, mail server, program for mail server, terminal device and program for terminal device
A mail server extracts a character unregistered in a portable terminal from received mail data and affixes the font data of the character concerned to the mail data or inserts a reading tag...
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7515766 |
Apparatus and method for edge handling in image processing
A method and apparatus for hardware-base edge handling in video post-processing. In one embodiment, the method includes the identification of at least one unstored input pixel required to compute...
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7512021 |
Register configuration control device, register configuration control method, and program for implementing the method
A resister configuration control device which is capable of updating resister configuration values during a non-display period without increasing a circuit scale. A FIFO selector 103 receives...
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7508396 |
Register-collecting mechanism, method for performing the same and pixel processing system employing the same
A pixel processing system includes a register-collecting mechanism and a pixel shader. The register-collecting mechanism corrects a first program to a second program. The first program requires a...
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7492371 |
Hardware animation of a bouncing image
A graphics controller for animating an overlay is described. The graphics controller includes a host interface for communicating with an external processor and a plurality of registers in...
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7490208 |
Architecture for compact multi-ported register file
Architecture for compact multi-ported register file is disclosed. In an embodiment, a register file comprises a single-port random access memory (RAM). The single-port RAM comprises a single port...
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7483033 |
Storage device
A storage device comprises a plurality of memory blocks each including a plurality of cells in correspondence with a data length of image data consisting of a plurality of pixel data, wherein a...
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7477261 |
Method and mechanism for programmable filtering of texture map data in 3D graphics subsystems
A system, method and apparatus to provide flexible texture filtering. A programmable texture filtering module is introduced into the graphics processing pipeline of a graphic coprocessor and...
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7466316 |
Apparatus, system, and method for distributing work to integrated heterogeneous processors
An integrated circuit includes at least two different types of processors, such as a graphics processor and a video processor. At least one operation is commonly by supported by two different types...
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7456835 |
Register based queuing for texture requests
A graphics processing unit can queue a large number of texture requests to balance out the variability of texture requests without the need for a large texture request buffer. A dedicated texture...
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7446773 |
Apparatus, system, and method for integrated heterogeneous processors with integrated scheduler
An integrated circuit includes at least two different types of processors. The integrated circuit includes an integrated host and associated scheduler. At least one operation is supported by two or...
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7436410 |
System and method for programming a controller
A system for configuring a chip to perform certain operations is provided. The system includes a CPU. The CPU is in communication with a graphics controller. The graphics controller includes a...
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7426722 |
Program code conversion for program code referring to variable size registers
A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine...
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7409680 |
Program code conversion for a register-based program code
A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine...
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7400328 |
Complex-shaped video overlay using multi-bit row and column index registers
A graphics system reduces fetching from memory of color-key pixels when video pixels from a video-overlay window are displayed. A frame buffer is divided into multi-line, multi-pixel blocks that...
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7355602 |
Surrogate stencil buffer clearing
Methods and apparatuses for effectively clearing stencil buffers at high speed using surrogate stencil buffer clearing. A hardware register tracks the number of surrogate clears of the stencil...
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7346900 |
Register-based program code conversion
A method of dynamic real time translation of first program code written for a first programmable machine into second program code (target code) for running on a second programmable machine...
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7339592 |
Simulating multiported memories using lower port count memories
An apparatus and method for simulating a multiported memory using lower port count memories as banks. A portion of memory is allocated for storing data associated with a thread. The portion of...
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7333106 |
Method and apparatus for Z-buffer operations
In one embodiment, the invention is an apparatus. The apparatus includes a Z-buffer memory. The apparatus also includes a set of bits, each of which corresponds to a block of the Z-buffer memory....
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7324106 |
Translation of register-combiner state into shader microcode
An apparatus and method for translating fixed function state into a shader program. Fixed function state is received and stored and when a new shader program is detected the fixed function state is...
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7280112 |
Arithmetic logic unit temporary registers
An arithmetic logic unit (ALU) in a graphics processor is described. The ALU includes circuitry for performing an operation using a first set of pixel data. The first set of pixel data is resident...
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7280111 |
API communications for vertex and pixel shaders
A three-dimensional API for communicating with hardware implementations of vertex shaders and pixel shaders having local registers. With respect to vertex shaders, API communications are provided...
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7196708 |
Parallel vector processing
A video platform architecture provides video processing using parallel vector processing. The video platform architecture includes a plurality of video processing modules, each module including a...
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7154490 |
Display driver, electro-optical device, and electronic appliance
A display driver, electro-optical device and electronic appliance are provided that make unnecessary processing that calculates positions in a RAM where display data is to be written according to a...
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7142221 |
Display drive control device and electric device including display device
In a system including a color liquid crystal panel, a drive control device for driving the panel, and a microprocessor, the drive control device reduces the burden on the microprocessor as well as...
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7136068 |
Texture cache for a computer graphics accelerator
A method and apparatus which includes a graphics accelerator, circuitry responsive to pixel texture coordinates to select texels and generate therefrom a texture value for any pixel the color of...
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7133047 |
Method and mechanism for programmable filtering of texture map data in 3D graphics subsystems
A system, method and apparatus to provide flexible texture filtering. A programmable texture filtering module is introduced into the graphics processing pipeline of a graphic coprocessor and...
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7088371 |
Memory command handler for use in an image signal processor having a data driven architecture
Disclosed is an image signal processor for use in an image processing system. The image signal processor includes a local memory to store data and a memory command handler having a plurality of...
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7061494 |
Method and apparatus for hardware optimization of graphics pipeline functions
A method and apparatus for optimizing processing of graphics data. An equation for use in processing graphics data is simplified by identifying variables in the equation that remain constant over a...
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7038684 |
Rendering process apparatus capable of improving processing speed of overall graphic system
An input section inputs vertex data from a host CPU or a geometry process section to a rendering main process section. The rendering main process section performs a rendering process in accordance...
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7038653 |
Shift resister and liquid crystal display having the same
In a shift register and an LCD having the same, the shift register includes stages having odd stages for receiving a first clock signal and even stages for receiving a second clock signal and all...
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7038643 |
Bi-directional driving circuit for liquid crystal display device
A driving device includes a plurality of blocks arranged in sequence, each of the blocks includes ninth switching elements connected to received a start pulse, four clock signals, and two source...
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7002588 |
System, method and computer program product for branching during programmable vertex processing
A system, method and computer program product are provided for branching during graphics processing. Initially, a first operation is performed on data. In response to the first operation, a...
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6995773 |
Automatic memory management
The present invention optimizes graphics performance during zone rendering by providing an automatic management of bin memory between the binning and rendering phases. Embodiments of the present...
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6992677 |
System and method for accelerating two-dimensional graphics in a computer system
A system and method for accelerating 2D graphics in a computer system is disclosed, which has an graphic chip to perform graphic commands, each graphic command having an operation of a source...
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6989837 |
System and method for processing memory with YCbCr 4:2:0 planar video data format
A system and method for processing YCbCr video data stored in a paged memory with reduced page breaks. A method is disclosed for retrieving YCbCr planar video data in 4:2:0 format from paged...
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6989813 |
Active matrix display device
A low power-consumption active matrix display device including gate lines, drain lines, and pixel electrodes, which are arranged at intersections between the gate lines and the drain lines. A drain...
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6975325 |
Method and apparatus for graphics processing using state and shader management
A method and apparatus for graphics processing using state and shader management includes at least one state and shader cache coupled to a compiler for compiling a hardware state and shader vector...
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6952217 |
Graphics processing unit self-programming
A method of self-programming a graphics processing unit (GPU) includes receiving a blit instruction defining a blit operation and storing a first control value in a control register, which...
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6952213 |
Data communication system and method, computer program, and recording medium
An apparatus comprises two or more image processing units and a main merger unit. Each image processing unit comprises four information processing units and a sub merger unit for merging data...
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6940514 |
Parallel initialization path for rasterization engine
A system and method are disclosed for a rasterization pipeline with a parallel initialization path that may provide an increased rate of triangle processing. The edge walker, span walker, and...
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6919901 |
Graphics system register data generation
A method, graphics system API and digital video system that provide more efficient processor usage and easier application programming. Register data for the hardware can be generated and written to...
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6917366 |
System and method for aligning multi-channel coded data over multiple clock periods
A system and method is provided for aligning multi-channel coded data over multiple clock periods. Data is received through a plurality of data channels and stored in a plurality of latches or...
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6903750 |
Controlling an output device
A method for generating a series of digitized control values for an output device to represent a continuous series of source data, comprising the steps of: storing in a single register a first...
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6864900 |
Panning while displaying a portion of the frame buffer image
A graphics system and method for panning from one portion of a stored image to another portion of the image includes a frame buffer, one or more display devices, one or more raster parameter...
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