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7557809 Memory access methods in a unified memory system  
The basic section of the multimedia data-processing system includes a CPU 1100 , an image display unit 2100 , a unified memory 1200 , a system bus 1920 , and devices 1300, 1400 , and 1500 ...
7542045 Electronic system and method for display using a decoder and arbiter to selectively allow access to a shared memory  
An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such...
7400327 Apparatus, system, and method for a partitioned memory  
A memory system having a number of partitions each operative to independently service memory requests from a plurality of memory clients while maintaining the appearance to the memory client of a...
7333116 Data processor having unified memory architecture using register to optimize memory access  
In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is...
7333106 Method and apparatus for Z-buffer operations  
In one embodiment, the invention is an apparatus. The apparatus includes a Z-buffer memory. The apparatus also includes a set of bits, each of which corresponds to a block of the Z-buffer memory....
7307667 Method and apparatus for an integrated high definition television controller  
A method and an apparatus for an integrated high definition television controller are described. The integrated high definition digital television controller includes two or more the following...
7295249 Digital television display control apparatus and method  
Apparatus for controlling a digital television display, the apparatus comprising a main processor 4 , a main memory 5 coupled to said main processor 4 via address and data busses, the main...
7248267 Method and apparatus for simulated direct frame buffer access for graphics adapters  
A method, data processing system, and computer instructions for simulating direct frame buffer access. A request for access to a frame buffer memory is received from an application. A portion of...
7158141 Programmable 3D graphics pipeline for multimedia applications  
A programmable graphics pipeline and method for processing multiple partitioned multimedia data, such as graphics data, image data, video data, or audio data. A preferred embodiment of the...
7145568 Shared translation address caching  
A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data and a cache adapted to store of locations in physical memory available to the graphics subsystem...
7123267 Core logic chip conducting multi-channel data transmission  
An additional data transmission channel is provided between the north bridge chip and the system memory when the graphic accelerator is integrated into the north bridge chip. The additional data...
7116304 Liquid crystal display apparatus  
Display data read out from a picture display memory region within a UMA memory is written in a FIFO, and display data is transferred from the FIFO at a timing required by a liquid crystal panel,...
7106339 System with local unified memory architecture and method  
Local memory associated with one or more companion devices within a system is mapped into a system memory for use by an application processor.
7106338 Method and system for optimal usage of memory for storing scheduling and guiding data in 3D-enabled EPG  
A system that can store electronic program guide information using 3D graphics is disclosed. In a particular embodiment, a data filter and a text-to-image converter are used for converting filtered...
7073033 Memory model for a run-time environment  
A memory model for a run-time environment is disclosed that includes a process-specific area of memory where objects in call-specific area of memory and session-specific area of memory can be...
7035976 Content recording apparatus  
A content recording apparatus that writes, when a recording instruction is issued, into a first area of a recording medium predetermined information indicating a predetermined value, records into a...
6999086 Video communication terminal and method of controlling memory access in the same  
A communication method apparatus are disclosed, including a common bus; a plurality of multiplexers that communicate with the common bus; a plurality of memories, each in communication with a...
6900815 Image data storage method  
If a user wants to store an image acquired from a site and it is determined that the data size of the image acquired from the site is larger than a designated storage frame in a memory region, then...
6885378 Method and apparatus for the implementation of full-scene anti-aliasing supersampling  
According to one embodiment, a computer system is disclosed. The computer system includes a graphics accelerator and a graphics cache coupled to the graphics accelerator. The graphics cache stores...
6864896 Scalable unified memory architecture  
A memory architecture includes a memory controller coupled to multiple modules. Each module includes a computing engine coupled to a shared memory. Each computing engine is capable of receiving...
6859208 Shared translation address caching  
A memory controller hub includes a graphics subsystem adapted to perform graphics operations on data and a cache adapted to store of locations in physical memory available to the graphics subsystem...
6753873 Shared memory control between detector framing node and processor  
An imaging system shares control of host memory between a detector framing node and a host processor. The detector framing node is programmable to control generation and reception of image data....
6704019 Graphic processing apparatus and method  
A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and...
6690379 Computer system controller having internal memory and external memory control  
The present invention relates generally to an optimized memory architecture for computer systems and, more particularly, to integrated circuits that implement a memory subsystem that is comprised...
6658531 Method and apparatus for accessing graphics cache memory  
A method and apparatus for utilizing a data cache in a system with both 2D and 3D graphics applications. In a specific embodiment of the present invention, a mode signal is received by the video...
6600493 Allocating memory based on memory device organization  
Memory is allocated for use by a graphics processor. Available portions of system memory are identified by requesting an amount of system memory from an operating system and receiving locations of...
6567094 System for controlling read and write streams in a circular FIFO buffer  
A distributed digital imaging processing system having a number of processing units and circular FIFO buffers connected together using data transforming streams. Processing units read data from...
6532019 Input/output integrated circuit hub incorporating a RAMDAC  
A computer system includes a first integrated circuit that has a central processing unit (CPU) and a graphics controller. An I/O hub, which is coupled to a plurality of input/output buses, includes...
6480198 Multi-function controller and method for a computer graphics display system  
A multi-function controller in a computer graphics system performs the functions of a graphics processor, a video processor, a system memory controller, a cache controller, and a PCI bridge. The...
6414688 Programmable graphics memory method  
A method to programmably establish a plurality of graphic buffers in a computer system having a banked system memory architecture includes obtaining a first indication representing a performance...
6377268 Programmable graphics memory apparatus  
A technique to programmably establish a plurality of graphic buffers in a computer system having a banked system memory architecture includes obtaining a first indication representing a performance...
6373493 Hardware graphics accelerator having access to multiple types of memory including cached memory  
The present invention, generally speaking, provides a hardware graphics accelerator for use in a computer system having a data processor, a system bus, and a memory subsystem including both main...
6342892 Video game system and coprocessor for video game system  
A low cost high performance three dimensional (3D) graphics system can model a world in three dimensions and project the model onto a two dimensional viewing plane selected based on a changeable...
6323866 Integrated circuit device having a core controller, a bus bridge, a graphical controller and a unified memory control unit built therein for use in a computer system  
An integrated circuit device is adapted for use in a computer system that includes a processing unit, a host bus connected to the processing unit, an input/output bus, a peripheral device connected...
6317134 System software for use in a graphics computer system having a shared system memory and supporting DM Pbuffers and other constructs aliased as DM buffers  
A computer system having a shared system memory, and system software in the computer system, are described herein. The computer system has a general purpose, shared system memory that is used for...
6222564 Method and apparatus for managing access to a computer system memory shared by a graphics controller and a memory controller  
The shared computer system memory is partitioned between system memory and frame buffer memory. The frame buffer is configured as the top-most portion of the shared memory. A virtual memory manager...
6104417 Unified memory computer architecture with dynamic graphics memory allocation  
A computer system provides dynamic memory allocation for graphics. The computer system includes a memory controller, a unified system memory, and memory clients each having access to the system...
6075523 Reducing power consumption and bus bandwidth requirements in cellular phones and PDAS by using a compressed display cache  
A method and apparatus for reducing power consumption and system bus load caused by a display controller in a unified memory system. A compression engine monitors a bus over which display data from...
6002411 Integrated video and memory controller with data processing and graphical processing capabilities  
An integrated memory controller (IMC) which incorporates novel memory, graphics, and audio processing capabilities in a single logical unit. The IMC includes numerous significant advances which...
5995120 Graphics system including a virtual frame buffer which stores video/pixel data in a plurality of memory areas  
A graphics controller (IMC) which performs pointer-based and/or display list-based video refresh operations that enable screen refresh data to be assembled on a per window basis, thereby greatly...
5959639 Computer graphics apparatus utilizing cache memory  
In a computer graphics apparatus, a main memory stores image data representing pixels on a raster scan display. A cache memory is provided for retaining a partial copy of the image data in the main...
5867180 Intelligent media memory statically mapped in unified memory architecture  
A Unified Memory Architecture (UMA) using intelligent media memory provides an improved way of solving the granularity and memory bandwidth problems in the electronic computer memory system. A...
5854638 Unified memory architecture with parallel access by host and video controller  
In a unified memory computer system architecture, the unified memory is divided into at least two banks of memory. All but one of the memory banks is reserved for access exclusively by the host...
5793385 Address translator for a shared memory computing system  
An address translator for use in a system having a central processing unit, a graphics controller for generating graphics addresses which index a graphics memory address map and for feeding data to...
5790138 Method and structure for improving display data bandwidth in a unified memory architecture system  
A computer unified memory architecture (UMA) system and method which includes a unified memory which is partitioned into a main memory and a main frame buffer memory, as well as a separate...
5748203 Computer system architecture that incorporates display memory into system memory  
A computer architecture that incorporates display memory into system memory is disclosed, which comprises a memory, a memory controller and a display controller. Both of the memory controller and...
5731809 Adaptive display memory management system  
An adaptive display memory management system for using idled display memory in a video graphics adapter card as extra system memory of a personal computer is presented. By means of hardware...
5682522 Shared memory architecture of graphics frame buffer and hard disk cache  
A shared memory architecture of graphics frame buffer and hard disk cache is presented. The architecture includes a system bus interface, a hard disk controller, a graphics controller, an arbiter,...
5657055 Method and apparatus for reading ahead display data into a display FIFO of a graphics controller  
A graphics controller that uses two MREQ priority levels (low and high) to retrieve display data from a frame buffer into a CRT FIFO. The graphics controller sends the high priority MREQ signal to...
5543822 Method for increasing the video throughput in computer systems  
A method and system for increasing the throughput of video input and output operations in a computer system is provided. In a memory mapped video environment the preferred embodiment increases the...
Matches 1 - 50 out of 57 1 2 >