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6995770 |
Command list controller for controlling hardware based on an instruction received from a central processing unit
A command list controller for controlling hardware based on an instruction received from a central processing unit (CPU) is provided. Specifically, the controller of the present invention retrieves...
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6992677 |
System and method for accelerating two-dimensional graphics in a computer system
A system and method for accelerating 2D graphics in a computer system is disclosed, which has an graphic chip to perform graphic commands, each graphic command having an operation of a source...
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6980205 |
Method and apparatus for fixing display information
A page template, which serves as the prototype of a web page, contains formatter specifying information and display attribute information. The formatter specifying information is information for...
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6963340 |
Graphics processor and system with microcontroller for programmable sequencing of power up or power down operations
A graphics processor or display device including a microcontroller that functions as a sequencer, a computer system including at least one such graphics processor or display device, and a...
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6954209 |
Computer CPU and memory to accelerated graphics port bridge having a plurality of physical buses with a single logical bus number
A core logic chip set in a computer system provides a bridge between processor host and memory buses and a plurality of Accelerated Graphics Port (AGP) buses. Each of the plurality of AGP buses...
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6952213 |
Data communication system and method, computer program, and recording medium
An apparatus comprises two or more image processing units and a main merger unit. Each image processing unit comprises four information processing units and a sub merger unit for merging data...
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6940513 |
Data aware clustered architecture for an image generator
A data aware clustered system architecture is described for an image generation system. The architecture leverages commodity personal computers to provide the processing capability of the image...
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6937243 |
Transmission circuit and manufacture method for the same
A transmission circuit has a dispatching circuit and a calculating circuit. The transmission circuit is between a processing circuit and a memory controller. The processor is connected to the...
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6933943 |
Distributed resource architecture and system
A distributed resource system comprises a plurality of compute resource units operable to execute graphics applications and generate graphics data, and a plurality of visualization resource units...
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6930689 |
Hardware extensions for image and video processing
A processing device ( 200 ) includes three hardware extensions: a motion estimation extension 202 , a pixel interpolation extension 204 and a DCT/iDCT extension 206 . The hardware extensions...
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6922194 |
Method and apparatus for maintaining load balance on a graphics bus when an upgrade device is installed
An embodiment of a graphics device that maintains load balance on a graphics bus when an upgrade graphics device is installed is disclosed. The embodiment includes load balancing buffers for the...
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6914607 |
Apparatus and method for buffering data
A data buffering apparatus comprises a plurality of sessions and buffer logic. The plurality of session are respectively associated with session identifiers. Each of the sessions is configured to...
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6914604 |
Method and system for high resolution display connect through extended bridge
A method of (and system for) of displaying information, includes an extended bus bridge, a graphics adaptor coupled to the extended bridge, and a monitor coupled to the graphics adaptor to display...
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6914605 |
Graphic processor and graphic processing system
The rendering performance of a graphic processor is improved by effectively using a data bus. An externally-input graphics command is stored in a work memory via the data bus. A display data...
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6911984 |
Desktop compositor using copy-on-write semantics
Tile data for drawing and desktop buffers in a desktop compositor system is managed using “copy-on-write” semantics, in which tile data stored in a memory location is not transferred to another...
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6911983 |
Double-buffering of pixel data using copy-on-write semantics
Tile buffers in a graphics processing system are managed use “copy-on-write” semantics, in which tile data stored in a memory location is not transferred to another location until the tile data...
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6907521 |
Enabling video BIOS and display drivers to leverage system BIOS platform abstract
A method for enabling communication between system BIOS and a graphics device is described herein. In one embodiment, a graphic device sets a system management interrupt (SMI) bit in an interface...
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6898763 |
Information processing apparatus capable of switching signal processing operation between direct and processor-based modes
An information processing apparatus includes a tuner receiving a signal according to a received broadcast, a first processing part performing a desired processing on the signal supplied from the...
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6897872 |
Controller of multi function device
An image process unit includes an image input interface that receives inputs of image data from a scanner and generates data packets, an image ring interface 4 that transfer the data packets to...
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6886070 |
Multiple user interfaces for an integrated flash device
A memory device having multiple interfaces is described. The memory device may be configured to operate with different interfaces using configuration circuitry in the device that enables switching...
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6885375 |
Stalling pipelines in large designs
A method and a system for stalling large pipelined designs. A computational pipeline may comprise a first module and a second module coupled together. The first module may propagate one or more...
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6873331 |
System and method for passing messages among processing nodes in a distributed system
The present invention is broadly directed to a system of components defining a plurality of nodes and a random access memory (RAM) connected to each node. The system comprises at least one producer...
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6873332 |
Microcomputer having OSD circuit, and bus control device and method
The microcomputer includes a CPU, a ROM, an OSD circuit, a wait signal generation circuit and a bus switch circuit. The ROM stores a program to be executed by the CPU and display data to be...
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6864892 |
Graphics data synchronization with multiple data paths in a graphics accelerator
A system and method for preserving the order of data items through a divergence-and-reconvergence of two or more paths in a hardware device. A host processor may write a first token to a first path...
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6850240 |
Method and apparatus for scalable image processing
An apparatus for scalable image processing includes a display, multiple graphics functional units and a mode selector. Each of the graphics functional units has a configuration of a predetermined...
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6847369 |
Optimized packing of loose data in a graphics queue
A data queue optimized for receiving loosely packed graphics data and suitable for use in a computer graphics system is described. The data queue operates on first-in-first-out principals, and has...
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6847335 |
Serial communication circuit with display detector interface bypass circuit
A circuit and method serves as a slave interface to support both register read/write and monitor detection operations by a graphics controller chip, or other display data source, with a plurality...
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6839071 |
Data communication apparatus and method for receiving and displaying information from first and second devices
A receiving apparatus and method receives first display information from a first device and receives second display information and control information from a second device. A display unit displays...
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6839061 |
Image display system and information storage medium
An image display system transmits and receives supplied data which can be converted by a virtual machine among plural processing devices which are connected via a transmission line, and creates and...
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6833831 |
Synchronizing data streams in a graphics processor
A method and system for synchronizing data streams and transferring control of resources between two processes in a graphics processor is described. The method allows for completion of pending...
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6822654 |
Memory controller chipset
At least one chip of a chipset in a computer system having at least one host processor and a host memory are described herein. In one aspect of the invention, an exemplary chip includes an...
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6819326 |
Memory address translation for image processing
A memory device ( 118 ) may use a burst access mode to access a number of consecutive data words by giving one read or write command. These data bursts represent non-overlapping data-units in the...
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6819322 |
Method and apparatus for detecting potential lock-up conditions in a video graphics controller
Certain accesses by a processor to a video graphics controller may cause concurrent accesses by a remote management controller to cause the video graphics controller to lock up. To detect potential...
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6820209 |
Power managed graphics controller
A controller (or controller chip) providing reduced power consumption without impacting performance is disclosed. The controller monitors activity of components within the controller which require...
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6816129 |
Multiple display device for use with existing personal computer systems
A method and apparatus for adapting a single computer to drive at least two displays is disclosed. In one embodiment, an apparatus for adapting a single computer to drive at least two displays is...
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6809732 |
Method and apparatus for generation of programmable shader configuration information from state-based control information and program instructions
A graphics subsystem having a programmable shader controllable by both state-based control information, such as DirectX 8 control information, and program instructions, such as DirectX 9 shader...
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6806883 |
System and method for handling display device requests for display data from a frame buffer
A graphics system may include a frame buffer, a processing device coupled to access data in the frame buffer, a frame buffer interface coupled to the frame buffer, and an output controller...
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6798419 |
Method for displaying data on a video display
In a method and apparatus for displaying data on a video display that is controlled by a video controller, the video controller is coupled to a high-speed memory and a low-speed memory. The...
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6795076 |
Graphics system with real-time convolved pixel readback
A graphics system comprising a control unit and a series of calculation units coupled together in a closed chain by a segmented communication bus. The calculation unit collaboratively generate one...
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6791554 |
I/O node for a computer system including an integrated graphics engine
An I/O node for a computer system including an integrated graphics engine. An input/output node is implemented upon an integrated circuit chip. The I/O node includes a first transceiver unit, a...
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6791560 |
Apparatus and method for accessing vertex data
A vertex data access apparatus and method. The apparatus receives a vertex index, compares the vertex index with any vertices' indices used before, issues a request if necessary for fetching vertex...
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6784890 |
Accelerated graphics port expedite cycle throttling control mechanism
A method for controlling expedite cycles having the steps of determining the number of clock cycles devoted to expedite data transfer requests made to a component during a predetermined monitoring...
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6765599 |
Image signal transmission apparatus
An image-transmitting-side device comprises: a one-phase to two-phase converter circuit for separating parallel image data, which are to be transmitted, into even and odd data; a first...
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6760031 |
Upgrading an integrated graphics subsystem
Apparatus and methods are provided for allowing two graphics controllers to cooperate on a single screen and for modifying the AGP protocol to provide symmetric capabilities for both AGP targets...
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6750870 |
Multi-mode graphics address remapping table for an accelerated graphics port device
A computer system having a core logic chipset that functions as a bridge between an Accelerated Graphics Port (“AGP”) bus device such as a graphics controller, and a host processor and computer...
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6750868 |
Universal accelerated graphic port system and method for operating the same
An accelerated graphic port (AGP) system uses several control signals to allow an AGP graphic card to enter into negotiation with a motherboard. These control signals can drive the motherboard to...
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6741258 |
Distributed translation look-aside buffers for graphics address remapping table
A system includes a main memory device which stores information for translating a virtual address into a physical address in response to one of a plurality of processing devices. A memory...
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6734986 |
Print control apparatus, print data generating apparatus, print control method, print data generating method, and storage medium
A print control apparatus for processing print information, which is connected to a printer, selects the optimal print mode for a set condition. The apparatus controls a printer driver to generate...
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6734862 |
Memory controller hub
A memory controller hub has a data stream controller adapted to use a system memory to store graphics data and to control functions of the system memory, a processor interface, a system memory...
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6731289 |
Extended range pixel display system and method
One aspect of the invention is a method for displaying extended range pixel values. The method includes the step of receiving a plurality of image pixel values each with at least one associated...
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