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7388470 |
Comparator having small size and improved operating speed
A comparator having a small number of logic circuits and an improved operating speed is provided, where the comparator includes m number of bit comparators, each connected between a first node and...
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7379041 |
Interface and method for error detection in image data transmission
An interface and a method for image data transmission that is used for data transmission through a plurality of data lines is described, the correctness of the transmitted data being checked by...
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7374006 |
Method and device for determining the roadway condition
A method and a device for determining the condition of roadway surfaces includes transmitting electromagnetic radiation at at least two different frequencies in the GHz range, reflecting and/or...
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7352275 |
Device for comparing two words of n bits each
The disclosure relates to a device for comparing two words, N and P, of n bits each. The device includes at least one comparator block comprising n basic comparator blocks which can each be used to...
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7284028 |
Comparator eliminating need for one's complement logic for signed numbers
An apparatus and method for providing high speed computing power with efficient power consumption in a computing environment comprising a comparator with at least one input feed; a sign selector in...
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7271703 |
2-bit binary comparator and binary comparing device using the same
A 2-bit binary comparator, including: a comparison unit for receiving a first bit and a second bit to thereby compare the first bit with the second bit; and an enable unit for outputting a...
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7233964 |
Method and system for compositing three-dimensional graphics images using associative decision mechanism
A method and system for compositing a plurality of three-dimensional Sub-Images by examining the Depth values of the Pixels corresponding to same spatial location in each Sub-Image and compositing...
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7228248 |
Test apparatus, timing generator and program therefor
There is provided a test apparatus including a PLL circuit for generating a strobe signal of which the timing is shifted according to a given delay control voltage, a variable delay circuit being...
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7193505 |
Channel-to-channel compare
A word recognizer for providing a channel-to-channel compare for an input digital signal divides channels of the input digital signal into equal-width input signal channel paths. One input signal...
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7117398 |
Program counter range comparator with equality, greater than, less than and non-equal detection modes
An program counter address comparator includes two comparators comparing an input program counter address with respective reference addresses. The comparators produce a match indication on...
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7103624 |
Comparator circuit and method
A binary comparator circuit and a binary data comparison method for reducing a layout area and power consumption and/or increasing comparison speed. The binary data comparison circuit and method...
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7084687 |
Phase swallow device and signal generator using the same
A signal generator for generating a clock with lower jitter. The signal generator includes a multi-phase clock generator for generating a plurality of multi-phase reference clocks with same...
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7016931 |
Binary-number comparator
A comparator for comparing binary numbers with N bits, where N>1, in which a plurality ( 200 ) of bit-to-bit comparators supplies a plurality of equality-difference signals, arranged in order of...
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6970071 |
Method and device for acquiring data
A device for acquiring the maximum value (or the minimum value) of a multiplicity of measured values, having a multiplicity of measuring points for acquiring the measured values, an a data line for...
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6958679 |
Binary hysteresis equal comparator circuits and methods
Binary hysteresis equal comparator circuits and methods. An equal comparator does not indicate an equal condition until the two binary input values are exactly the same. However, after the two...
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6930516 |
Comparator circuits having non-complementary input structures
A non-complementary comparator includes an evaluation element such as a memory cell, a differential amplifier, or another type of circuit capable adapted to perform an evaluation function, and at...
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6919794 |
Circuit for controlling the random character of a random number generator
A circuit for controlling the random character of a bit flow, including an input shift register receiving the bit flow and having its outputs exploited in parallel, at least one element for...
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6909358 |
Hamming distance comparison
A method and system for performing hamming distance comparison. A hamming distance comparator may comprise a plurality of evaluation circuits where each evaluation circuit may be configured to...
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6907443 |
Magnitude comparator
A magnitude comparator circuit may include a first circuit coupled to receive the operands to be compared, a second circuit coupled to the first circuit, and a third circuit coupled to the second...
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6819224 |
Apparatus and method for detecting a predetermined pattern of bits in a bitstream
An apparatus for detecting a predetermined pattern of bits in a data bitstream includes a series of detecting elements ( 2-6 ), each detecting element in the series corresponding to a predetermined...
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6795842 |
Method and apparatus for comparing two binary numbers with a power-of-two threshold
Methods and apparatus for comparing two binary numbers with a power-of-two threshold are provided in accordance with the present invention. In one embodiment, a method for comparing two binary...
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6683530 |
Method and apparatus for performing a floating point compare operation
A system, method and apparatus for comparing two floating point numbers is includes choosing a first floating point number and a second floating point number to be compared. The first number is...
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6646544 |
Self timed pre-charged address compare logic circuit
An Address Compare Circuit ( 1 ) allows for a large compare function at high speed due to its unique self-timed evaluation clock and bit compare circuits. The address compare circuit can reliably...
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6640193 |
Method and system for measuring jitter
According to one embodiment of the present invention, a system ( 100 ) for measuring overall jitter is disclosed that includes a data converter ( 102 ) that measures a signal to generate a first...
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6629118 |
Zero result prediction
A zero result detector for detecting a zero result in the sum of a first operand A, a second operand B and a carry bit Cin operates by calculating {overscore (A)} and {overscore (A)}+1 and then...
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6600613 |
Demodulation of magnetically recorded data
There is disclosed a pattern matching technique for comparing (a) signals representing detected magnetically recorded characters against (b) a set of predetermined idealized reference signals...
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6598003 |
Power and environmental condition monitoring system and method
The power and environmental condition monitoring system monitors the quality of power provided to a site as well as other environmental conditions that might affect the operation of electronic...
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6578058 |
System and method for comparing values from target systems
A system and method are provided to evaluate logical values from target systems. The system includes a configuration in a field programmable gate array for performing a doubly bounded comparison....
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6513893 |
Head drive unit and driving method
In a head drive unit of ink-jet recorder and the like, for the purpose of reducing amount of data for head driving waveform and data processing time, a time data at a point where an electric...
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6470373 |
Sum interval detector
The sum interval detector has two n-bit inputs, a 1-bit carry input, and a 1-bit output, which is activated when the sum of the input values lies within the interval −2 p . . . 2 p −1 or the...
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6466960 |
Method and apparatus for performing a sum-and-compare operation
A method and apparatus are provided for performing a fast sum-and-compare operation. The apparatus of the present invention utilizes a single carry save adder in conjunction with a zero detect...
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6446101 |
Apparatus for fast determination of a prescribable number of highest value signals
An apparatus for a fast determination of a prescribable number of highest value input signals from a number of input signals each comprising an input word having a number of recoders, each one of...
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6420962 |
AUTOMATIC IDENTIFICATION LEVEL CONTROL CIRCUIT, IDENTIFICATION LEVEL CONTROL METHOD, AUTOMATIC IDENTIFICATION PHASE CONTROL CIRCUIT, IDENTIFICATION PHASE CONTROL METHOD, OPTICAL RECEIVER, AND OPTICAL COMMUNICATION SYSTEM
The present invention provides an automatic identification level control circuit, an identification level control method, an automatic identification phase control circuit, an identification phase...
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6400257 |
High performance CMOS pseudo dynamic bit comparator with bypass function
A high performance CMOS comparator circuit is integrated with a bypass function allowing comparing first and second data sets (A & B) with a high data width (more than 30 and illustrated as 48...
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6384713 |
Serial comparator
In this invention compare circuitry is integrated into a serial shift register which can detect a bit pattern of any length with only the delay of three circuits being added to the shift of the...
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6353646 |
Digital comparator
The present invention relates to a digital comparator including a first block receiving on first inputs the bits of a first operand A of n bits and on second inputs the logic complements of the...
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6341296 |
Method and apparatus for efficient selection of a boundary value
In accordance with the present invention, a logic circuit identifies the maximum or minimum boundary values from a group of values and also designates the input value(s) which match the boundary...
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6335677 |
Comparator of a digital value having CMOS voltage levels with a digital value having ECL voltage levels
A comparator of a first digital value of n bits having CMOS voltage levels with a second digital value of n bits having ECL, or CML voltage levels, including a decoder in CMOS technology provided...
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6330702 |
Hamming value determination and comparison
The comparators described herein comprise bit manipulation cells of a number of logic cells each built up of AND, OR etc. logic gates interconnected in parallel to make up one or more layers and do...
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6330559 |
Merge sorting apparatus with comparison nodes connected in tournament tree shape
A merge sorting apparatus includes a comparison tournament circuit including comparison nodes, and a comparison control circuit for supplying to the corresponding comparison nodes validity flag...
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6298365 |
Method and system for bounds comparator
The invention relates to a method of using a "bounds" comparator scheme and to a "bounds" comparator circuit. The method of using this scheme or comparator circuit allows a quick and easy test to...
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6292093 |
Multi-bit comparator
A circuit for signalling if any like ordered bits A k and B k in first and second binary words differ comprises a comparator for each pair of like ordered bits and a common terminal. Each...
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6255856 |
Comparator
A comparator which improves a comparing speed and has a simple logic circuit compared to the conventional adder or subtracter includes: a plurality of pre-comparing units for comparing two inputs...
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6232872 |
Comparator
A 64-bit comparator includes a first stage for receiving a 64-bit number A and a 64-bit number B, and generating first output values. A second stage then receives the first output values from the...
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6216147 |
Method and apparatus for an N-nary magnitude comparator
The present invention is a magnitude comparator that receives as inputs two 32-bit 1-of-4 operands. The magnitude comparator generates a carry indicator if the value of the first operand is less...
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6205460 |
System and method for floating-computation for numbers in delimited floating point representation
Floating point numbers and other values are represented in a "delimited" representation in which all numbers, including those which would in the IEEE Std. 754 representation, be in the...
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6198668 |
Memory cell array for performing a comparison
A memory cell having a memory cell state is disclosed. The memory cell state includes a memory unit configured to store a bit of data wherein the bit of data determines whether the memory cell...
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6191683 |
System and method for comparing values during logic analysis
Disclosed is a system and method to compare logical values. The system employs a field programmable gate array (FPGA) configured for comparing logical values. The FPGA includes a number of inputs...
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6177862 |
High speed comparator
A comparator compares a first data word with a second data word. The comparator includes a first stage of two input XOR gates, each of which receive one bit of the first word and a corresponding...
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6154120 |
Method and apparatus for an N-nary equality comparator
The present invention is an N-nary equality comparator that receives as inputs two 32-bit 1-of-4 operands. The equality comparator generates an "equal" indicator if the values of the two operands...
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