|
Match
|
Document |
Document Title |
|
|
7616064 |
Digital synthesizer for low power location receivers
A high-frequency phase locked loop synthesizer having a selectable fractional-N divider and integer divider along with a phase frequency detector implemented as a CMOS logic block.
|
|
|
7616063 |
Frequency synthesizer using a phase-locked loop and single side band mixer
A frequency synthesizer is built using a phase locked loop incorporating a single side band mixer either in the feedback loop or in the input. The single side band mixer is preferably realized with...
|
|
|
7605667 |
Frequency synthesizer with a harmonic locked phase/frequency detector
A frequency synthesizer. The frequency synthesizer comprises a harmonic locked phase/frequency detector, a low pass filter, a voltage controlled oscillator, and a frequency divider. The harmonic...
|
|
|
7605665 |
Fractional-N phase locked loop
An apparatus and method is disclosed to substantially reduce phase noise introduced in fractional-N phase-locked loop (PLL) through feedback modulation. A fractional frequency divider is introduced...
|
|
|
7605661 |
Phase locked loop circuit including digital voltage-controlled oscillator, ring oscillator and selector
A PLL circuit includes a polyphase reference clock output circuit, which outputs multiple reference clocks, each clock being of different phase. The PLL circuit further includes a digital voltage...
|
|
|
7602252 |
Sigma delta modulator, fractional frequency synthesizer and sigma delta modulating method
There is provided a sigma delta modulator that outputs an output signal obtained by performing sigma delta modulation on an input signal, including: a plurality of accumulators that are serially...
|
|
|
7592874 |
Phase/frequency detector, phase locked loop, method for phase/frequency detection and method for generating an oscillator signal
A phase/frequency detector has a modulo counter for outputting a counter word with a predetermined word length depending on an oscillator signal. In addition, a modulo integrator for outputting an...
|
|
|
7589594 |
Variable loop bandwidth phase locked loop
An apparatus comprising a voltage controlled oscillator, a first charge pump, a second charge pump, a switch circuit and a comparator circuit. The voltage controlled oscillator may be configured to...
|
|
|
7583152 |
Phase-locked loop with self-correcting phase-to-digital transfer function
A phase-locked loop includes a phase-to-digital converter portion as well as a novel correction portion. The phase-to-digital converter (PDC) portion outputs a stream of first phase error words....
|
|
|
7573348 |
Arrangement and method for determining a gradient factor for a digitally controlled oscillator, and phase locked loop
An arrangement for determining a gradient factor for a digitally controlled oscillator has a data alignment device and an identification device. The data alignment device can be supplied a...
|
|
|
7573337 |
Code NCO and GPS receiver
A code is provided which outputs a predetermined code enable signal by executing a simple control, depending on a clock signal frequency, with an optimal circuit scale. A multiplexer receives...
|
|
|
7570120 |
Multichannel memory-based numerically controlled oscillators
A multichannel numerically controlled oscillator is provided. The multichannel numerically controlled oscillator has a dual port memory. An output function generation lookup table in the dual port...
|
|
|
7567134 |
System and method for synchronizing multiple oscillators
A system and method for synchronizing an oscillator with multiple phases at a desired phase angle difference. A relative measure of a phase angle difference between two phases permits each phase to...
|
|
|
7567132 |
Synthesizer
A synthesizer comprises a detector for detecting a parameter difference, a voltage controlled oscillator, at least one capacitor having one end connected to a node between the detector and the...
|
|
|
7564315 |
System and method for pre-charged linear phase-frequency detector
A method for comparing phases of two signals including placing a first output node in a floating state, detecting a first edge of a first signal on a first input node after placing the first output...
|
|
|
7564314 |
Systems and arrangements for operating a phase locked loop
Systems, methods and media for a fast locking phase locked loop (FLPLL) are disclosed. A FLPLL apparatus can include a voltage controlled oscillator (VCO) coupled to a phase frequency detector and...
|
|
|
7560996 |
Frequency-multiplied clock signal output circuit
In a DPLL circuit, when the size of a data value which is output from a data latch circuit and should be naturally set in a 11-bit down-counter becomes equal to or more than 12 bits, an overflow...
|
|
|
7557663 |
Digital PLL for a system-on-chip for digital control of electronic power devices
A digital phase locked loop (DPLL) comprising a digitally implemented voltage controlled oscillator (VCO) for producing a VCO feedback signal, a phase error counter which includes a digital...
|
|
|
7557661 |
Direct digital synthesis (DDS) hybrid phase-lock loop for low-jitter synchronization
A direct digital synthesis (DDS) hybrid phase-lock loop for low-jitter synchronization provides a mechanism for generating a low-jitter clock from a timing reference that has a high jitter level. A...
|
|
|
7554414 |
Fast starting circuit for crystal oscillators
A method for assisting the oscillating starting process of an electromechanical oscillator ( 10 ) has the following steps: detection of oscillator oscillations ( 1 b , 1 c ) which occur in the...
|
|
|
7551039 |
Phase adjustment in phase-locked loops using multiple oscillator signals
Phase-locked loop (PLL) logic comprises an oscillator that produces a first oscillator signal and phase detect logic that determines a phase difference between the first oscillator signal and a...
|
|
|
7548130 |
Characteristic automatic compensating apparatus, characteristic automatic compensating method, characteristic automatic compensating program of oscillator and positioning signal receiver
A characteristic automatic compensating apparatus of an oscillator includes oscillating means, temperature detecting means, characteristic determining means for measuring a drift value of an...
|
|
|
7548123 |
Dividerless PLL architecture
A phase-locked loop (PLL) achieves initial lock using a course fractional-N divider driving a binary phase detector. Once frequency lock is achieved, this divider may be turned off, while an...
|
|
|
7548119 |
Digitally controlled oscillator with jitter shaping capability
A digitally controlled oscillator (DCO) generating an output clock includes a jitter shaping module for shifting low frequency digital jitter on the output clock into higher frequency jitter.
|
|
|
7545223 |
PLL circuit
A PLL circuit according to an embodiment of the present invention includes: a phase comparator to output an up signal and a down signal based on a phase difference between a reference clock signal...
|
|
|
7545222 |
Phase lock loop for rapid lock-in and method therefor
A phase-locked loop (PLL) for rapid lock-in applicable to digital, analog, or hybrid digital-analog PLL circuits is provided. Besides the units for basic operation, including a phase-frequency...
|
|
|
7541877 |
Auto-adjusting high accuracy oscillator
An auto-adjusting high accuracy oscillator is disclosed, which comprises: a frequency comparator, for comparing a synchronization signal obtained from a USB host with an oscillation signal obtain...
|
|
|
7538706 |
Mash modulator and frequency synthesizer using the same
A MASH modulator. The MASH modulator receives a fractional input value, generates an integer output value, and comprises three cascaded first order sigma delta modulators (SDMs) each comprising an...
|
|
|
7538619 |
Oscillator reducing clock signal variations due to variations in voltage or temperature
Provided is an oscillator including a logic signal generator and a clock generator. The logic signal generator generates a first logic signal and a second logic signal that have the same period but...
|
|
|
7532077 |
Edge alignment for frequency synthesizers
A frequency synthesizer ( 50, 70 ) including an edge-detection circuit ( 51, 60 ) for disabling elements of the frequency synthesizer ( 50, 70 ) prior to start-up. The edge-detection circuit...
|
|
|
7528664 |
Method of and apparatus for improving the signal-to-noise ratio for a digital conversion circuit
The signal-to-noise ratio for a digital conversion circuit is improved by taking a source signal and generating N signals that are each phase-shifted relative to each other, thereby generating N...
|
|
|
7522005 |
KFM frequency tracking system using an analog correlator
An apparatus providing a phase/frequency modulation system is disclosed herein. The apparatus includes a first circuit configured to introduce an offset to center a signal applied to a VCO. The...
|
|
|
7511581 |
Wide-band multimode frequency synthesizer and variable frequency divider
A wide-band multimode frequency synthesizer using a Phase Locked Loop (PLL) is provided. The multiband frequency synthesizer includes a multimode prescaler, a phase detector/a charge pump, a...
|
|
|
7508274 |
PLL with phase clipping and resynchronization
A phase locked loop with phase clipping and/or resynchronization is disclosed. A reference signal is compared to a feedback signal derived at least in part from an output signal of an oscillator to...
|
|
|
7508271 |
Semiconductor memory apparatus having phase locked loop
A semiconductor memory apparatus includes a PLL selector that selectively activates a plurality of PLL enable signals by decoding pluralities of PLL selection signals, and a plurality of PLL...
|
|
|
7508270 |
Differential-to-single-ended converter and phase-locked loop circuit having the same
In a differential-to-single-ended (D2S) converter having reduced power consumption and excellent duty ratio characteristics, and a phase-locked loop (PLL) circuit having the same, the D2S converter...
|
|
|
7504891 |
Initialization circuit for a phase-locked loop
Integrated circuit including a phase-locked loop (PLL) circuit having a first mode and a second mode of operation. Operating the PLL circuit in the first mode may generate a constant frequency...
|
|
|
7504890 |
Data-directed frequency-and-phase lock loop
A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier...
|
|
|
7501900 |
Phase-locked loop bandwidth calibration
A novel circuit for obtaining the bandwidth of a phase-locked loop circuit is disclosed. The circuit adjusts a phase of a signal (reference or generated), causing the phase-locked loop circuit to...
|
|
|
7498890 |
Continuous reversible gear shifting mechanism
A novel gear shifting mechanism operative to adjust the loop gain of a phase locked loop (PLL) circuit in a continuous and reversible manner. The loop gain can be increased to widen the bandwidth...
|
|
|
7486146 |
Loop system capable of auto-calibrating oscillating frequency range and related method
A loop system capable of auto-calibrating an oscillating frequency range includes a frequency error detector, a voltage controlled oscillator (VCO), a voltage input unit, and a switch. The...
|
|
|
7486145 |
Circuits and methods for implementing sub-integer-N frequency dividers using phase rotators
Circuits and methods are provided for implementing programmable sub-integer N frequency dividers for use in, e.g., frequency synthesizer applications, providing glitch free outputs signals with...
|
|
|
7482885 |
Method of frequency synthesis for fast switching
A digital frequency synthesizer can be implemented with single source design, a multiplexer design, a fractional divider design, or a frequency multiplier and frequency divider design....
|
|
|
7477112 |
Structure for the main oscillator of a counter-controlled delay line
A counter-controlled delay line includes a main oscillator for delaying edges of an input signal to generate a main clock signal. The main oscillator includes a plurality of gated delay elements...
|
|
|
7471160 |
Real-time frequency band selection circuit for use with a voltage controlled oscillator
An integrated circuit including a phase-locked loop (PLL) circuit responsive to a voltage controlled oscillator (VCO) frequency band selection circuit that provides automatic frequency band...
|
|
|
7463710 |
Fractional-N synthesizer and method of programming the output phase
A fractional-N synthesizer with programmable output phase including a phase locked loop having an output signal whose frequency is a fractional multiple of an input reference signal, the phase...
|
|
|
7449960 |
Frequency modulation linearization system for a Fractional-N offset PLL
A linearization system is provided for a Fractional-N Offset Phase Locked Loop (FN-OPLL) in a frequency or phase modulation system. In general, the linearization system processes a modulation...
|
|
|
7446614 |
Logical level converter and phase locked loop using the same
A logical level converter generates an output signal by which a succeeding logical circuit accurately operates even if there is a threshold fluctuation factor. In the logical level converter, an...
|
|
|
7443251 |
Digital phase and frequency detector
Disclosed are a digital phase-frequency detector and a method of operating a digital phase-frequency detector. The detector includes an input circuit, an output circuit and a reset circuit. In use,...
|
|
|
7443247 |
Circuit arrangement for detection of a locking condition for a phase locked loop, and a method
A circuit arrangement includes a phase locked loop, having a phase detector on whose output side a phase signal can be tapped off and whose output side is coupled to a charge pump. Furthermore, the...
|