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6140880 |
Circuits, architectures and methods for detecting and correcting excess oscillator frequencies
A circuit and method for preventing an oscillator from oscillating above a first predetermined frequency or below a second predetermined frequency. The present invention may comprise (a) a clock...
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6140853 |
Digital phase detector and charge pump system reset and balanced current source matching
A digital phase detector and charge pump circuit system reset circuit and method resets a digital phase detector according to the charge outputs between the charge pump circuits and a following...
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6137372 |
Method and apparatus for providing coarse and fine tuning control for synthesizing high-frequency signals for wireless communications
A method and apparatus for synthesizing high-frequency signals is disclosed that overcomes integration problem associated with prior implementations while meeting demanding phase noise and other...
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6133796 |
Programmable divider circuit with a tri-state inverter
A programmable dividing circuit comprises a first plurality N of similar transistor stages connected in a divide-by-N sequence, wherein N is an odd integer, the transistor stages being configured...
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6127897 |
Zero-crossing detection type clock recovery circuit operated at symbol rate
In a clock recovery circuit in a demodulator of a multi-level quadrature amplitude modulation (QAM) system, an analog/digital (A/D) converter performs an A/D conversion upon an analog baseband...
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6127895 |
Clock pulse generator
A clock pulse generator which has a signal controlled oscillator for producing output clock pulses at a repetition rate determined by the value of a control signal. Control means is operative in a...
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6121845 |
Phase-locked loop system and method for modifying an output transition time
A Phase-Locked Loop (PLL) system (30) and a method for modifying the output transition time of the PLL system (30). The PLL system has an input stage (36) connected to a PLL (37). The input stage...
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6114917 |
Analog PLL circuit and method of controlling the oscillation of a voltage controlled oscillator
The present invention provides an analog PLL circuit able to shorten a lockin time during which oscillating frequency and phase of a voltage controlling oscillator settle. An analog PLL circuit...
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6114915 |
Programmable wide-range frequency synthesizer
Method and circuitry for a frequency synthesizer having wide operating frequency range. The frequency synthesizer uses multiple programmable loadable counters in a phase-locked loop arrangement to...
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6111471 |
Apparatus and method for setting VCO free-running frequency
The present invention provides an apparatus for setting the free-running frequency of a VCO to a reference frequency. The apparatus comprises frequency range means for setting the VCO within a VCO...
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6111470 |
Phase-locked loop circuit with charge pump noise cancellation
The switching time of a phase-locked loop (PLL) circuit can be reduced by increasing circuit bandwidth. A charge pump system is commonly used in the PLL circuitry to drive the voltage control...
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6107891 |
Integrated circuit and method for low noise frequency synthesis
An integrated circuit device and method for synthesis of a signal having a desired frequency and low noise. The integrated circuit embodiment of the invention generally includes a phase locked loop...
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6107890 |
Digital phase comparator and frequency synthesizer
The phase of a pulsed test signal is measured with reference to a reference signal of constant frequency by sampling the test signal at times determined by transitions in the reference signal and...
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6107843 |
Fractional phase-locked loop coherent frequency synthesizer
Present-day single or multiple fractional phase-locked loop frequency synthesizers are not phase coherent for they use a digital accumulator modulo a number P with a variable increment K, whose...
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6104251 |
Method and apparatus for providing transient suppression in a central processor unit (CPU) phase locked loop clock (PLL) clock signal synthesis circuit
The present invention is directed to apparatus and methods for reducing transient signals in phase locked loop (PLL) circuits of central processing units. One aspect of the present invention is...
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6100766 |
Correction circuit controlling sensitivities of an oscillator circuit and electronic device using the same
A correction circuit for controlling a correction required circuit includes an oscillator circuit, and a logic circuit which counts an oscillation frequency of the oscillator circuit and thus...
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6100765 |
Digital clock recovery loop
A communications system including a clock recovery circuit that extracts a clock signal from incoming digital data, the clock recovery circuit comprising: a voltage controlled oscillator having a...
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6097777 |
Phase locked loop circuit
The present invention is intended to reliably achieve a locked PLL even with a short VFO field to correctly perform subsequent reproduction of information data. A PLL circuit of the present...
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6097255 |
Phase locked loop circuit for eliminating impulses in output data which tend to produce malfunctions
A phase-locked loop circuit adapted to follow up with the phase of an input signal includes a phase comparator 150 for phase-comparing, in synchronism with pre-set operating clocks, an input...
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6094101 |
Direct digital frequency synthesis enabling spur elimination
The present invention, generally speaking, provides improved methods of generating clean, precisely-modulated waveforms, at least partly using digital techniques. In accordance with one aspect of...
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6094100 |
PLL synthesizer apparatus
Disclosed herein is a fractional N-type PLL frequency synthesizer apparatus. A fractional N-type control circuit employed therein for varying N values for each reference cycle is constructed of a...
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6091305 |
PLL frequency synthesizer
It is an object of the present invention to reduce the amount of spurious noise generated by an emission line spectrum of a signal propagating around the PLL of a PLL frequency synthesizer carrying...
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6087902 |
Phase-locked loop (PLL) circuit containing a biased phase detector for improved frequency acquisition
An extended frequency lock range is achieved in a PLL circuit based on sampled phase detectors by modifying a conventional PLL circuit to utilize a biased phase detector to achieve frequency...
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6084480 |
Phase locked loop circuit including voltage controlled oscillator and low pass filter
A PLL circuit of which pull-in time is reduced. The PLL circuit comprises a voltage controlled oscillator; a frequency divider which divides the frequency of the output signal from the voltage...
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6084479 |
Circuit, architecture and method(s) of controlling a periodic signal generating circuit or device
An apparatus comprising a phase-locked loop, a select circuit and a control circuit. The phase-locked loop may be configured to generate a feedback signal (along with a buffered output signal) in...
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6078634 |
Phase-locked loop circuit with a multi-cycle phase detector and multi-current charge pump
A phase-locked loop circuit for locking the phase of an oscillator to the phase of a reference signal includes a multi-cycle phase detector (11) for detecting a phase difference between an input...
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6078225 |
Switching algorithm for clock distribution function
An output clock signal is generated from a selected input clock signal using a phase-locked loop (PLL). The output clock signal is used to detect failures in the selected input clock signal. If a...
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6075416 |
Method, architecture and circuit for half-rate clock and/or data recovery
A circuit comprising an oscillator, a multiplexer, a half rate clock circuit and a full rate clock circuit. The oscillator may be configured to generate a first clock signal and a second clock...
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6072368 |
Phase locked loop unlock detector
A phase locked loop unlock detector is provided for a data detection channel in a direct access storage device (DASD). The phase locked loop unlock detector includes a counter for generating a...
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6069535 |
Sequence generator for fractional frequency divider in PLL frequency synthesizer
A sequence generator 10 for a frequency synthesiser 1,2,3,4,5,10 forming part of a direct modulator comprises an input 10a for receiving an input multibit signal X(z), an output 10c for outputting...
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6069524 |
FPLL with third multiplier in an analog input signal
A FPLL has an I, a Q and a third multiplier, with the I multiplier supplying demodulated signals to a limiter and the Q multiplier supplying signals to a loop filter. A VCO and phase shift circuit...
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6069505 |
Digitally controlled tuner circuit
A digitally controlled tuner circuit for continuous-time filters. Active RC integrators include digitally programmable feedback capacitors to allow for digital fine tuning of their time constant....
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6066990 |
Frequency divider having a prescaler followed by a programmable counter, and a corresponding prescaler and frequency synthesizer
The invention relates to a frequency divider of the type comprising a prescaler followed by a programmable counter, and serving to divide by an overall division ratio D that can be written D=k.N+A....
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6066988 |
Phase locked loop circuit with high stability having a reset signal generating circuit
A phase locked loop circuit includes a reset signal generating circuit for generating a reference clock signal and a reset signal from an input clock signal. A phase locked loop section generates...
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6064272 |
Phase interpolated fractional-N frequency synthesizer with on-chip tuning
A phase interpolated frequency synthesizer with on chip tuning includes a voltage controlled oscillator, a fractional-N divider, phase compensation and on chip tuning circuits, a phase detector,...
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6064169 |
Motor amplitude control circuit in conductor-on-insulator tuning fork gyroscope
A control system for a tuning fork gyroscope uses motor frequency to control motor amplitude. The tuning fork gyroscope has a drive signal input and an output signal from which motor frequency is...
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6060953 |
PLL response time accelerating system using a frequency detector counter
A PLL response time is accelerated with a frequency detector counter. The PLL utilizes both a phase frequency detector and the frequency detector counter. Initially, the operation of the PLL is...
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6055286 |
Oversampling rotational frequency detector
This invention provides a simple yet robust solution to the phase-locked loop frequency acquisition problem in clock and data recovery circuits by using a frequency detector with a deadband, which...
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6054903 |
Dual-loop PLL with adaptive time constant reduction on first loop
A phase-locked loop fabricated on an integrated circuit includes a phase/frequency detector, a charge pump, a filter node and a voltage-controlled oscillator (VCO) which are coupled together in...
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6049254 |
Phase-locked loop which can automatically adjust to and lock upon a variable input frequency
An apparatus is provided for automatically and dynamically adjusting a frequency division factor of a clock divider situated in the feedback loop of a phase-locked loop (PLL). The frequency...
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6046644 |
Phase-locked loop oscillator formed entirely of logic circuits
Phase-locked loop oscillators that are designed to set the clock rate of electronic circuits based on combinations of logic circuits and to be integrated, at the same time as these electronic...
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6046643 |
Radio-frequency signal generator
A radio-frequency signal generator has a voltage-controlled oscillator for producing a radio-frequency signal. A frequency divider with a fixed division ratio has an input connected to the...
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6044124 |
Delta sigma PLL with low jitter
A phase lock loop circuit for a digital radio generates the sampling frequency for sampling an incoming signal by storing the samples of the incoming signal in an accumulator at a first frequency....
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6043695 |
Phase locked loop using a schmitt trigger block
A phase locked loop (PLL) circuit is described which uses a Schmitt trigger block (28) to achieve a very small steady state phase error at an input of a phase comparator block (21) over the entire...
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6037814 |
PLL circuit of display monitor
In a PLL circuit used in a display monitor, it is made possible to design a PLL circuit using a VCO of excellent frequency stability. In this PLL circuit, low jitter of display monitor is realized...
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6031429 |
Circuit and method for reducing lock-in time in phase-locked and delay-locked loops
Method and circuit aspects for improving lock-in time following power-up in a phase-locked loop are provided. The circuit and method for providing same includes a phase-locked loop, the...
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6031425 |
Low power prescaler for a PLL circuit
A prescaler which can be used in a PLL includes a counter section and an extender section. The counter section has a pair of staged, synchronous flip-flops which generate a frequency divided signal...
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6028905 |
Charge pump steering systems and methods for loop filters of phase locked loops
Charge pump steering systems and methods force a charge pump of a loop filter of a phase locked loop to charge or discharge a capacitor for a predetermined time that it is independent of the phase...
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6028488 |
Digitally-controlled oscillator with switched-capacitor frequency selection
A digitally-controlled oscillator (DCO) (60), such as may be used in clock generator or clock recovery circuitry in an integrated circuit, is disclosed. The disclosed DCO (60) is a single-stage...
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6020782 |
Noise assisted signal processor with nonlinearly coupled arrays of nonlinear dynamic elements
A signal processor utilizes a globally nonlinearly coupled array of nonlinear dynamic elements. In one embodiment of the invention, these elements take the form of bistable overdamped oscillators....
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