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RE36874 |
Supply voltage tolerant phase-locked loop circuit
A phase-locked loop design is provide that can operate at a plurality of dissimilar supply voltages. By adjusting the frequency range of a PLL based on the power supply voltage, the same PLL design...
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6121844 |
PLL frequency synthesizer and method for controlling the PLL frequency synthesizer
A PLL frequency synthesizer is provided with: a voltage detector (9) for detecting the current value of a control voltage to be applied to a voltage-controlled oscillator (6); a storage device (7)...
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6118345 |
Process and device for locking-in a YIG-tuned oscillator
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6118346 |
Dynamic matching of up and down currents in charge pumps to reduce spurious tones
A device in a phase-locked loop circuit that dynamically matches the currents in a charge pump to reduce the spurious tones during each charge pump event when the phase-locked loop is in lock. A...
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6114920 |
Self-calibrating voltage-controlled oscillator for asynchronous phase applications
A circuit, such as a phase-lock loop (PLL), has an oscillator having a plurality of operating curves. During circuit auto-trim operations, the oscillator is automatically trimmed to an appropriate...
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6111468 |
Charge pump with charge/discharge amount control
A charge pump circuit which may be used in a PLL includes a charge/discharge circuit, a detection circuit and an adjusting circuit. The charge/discharge circuit performs a charge operation in...
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6111469 |
Charge pumping circuit and PLL frequency synthesizer
A charge pumping circuit includes a constant current source, a switch element, a first MOS transistor, a second MOS transistor, and a switching-off circuit. The constant current source generates...
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6111470 |
Phase-locked loop circuit with charge pump noise cancellation
The switching time of a phase-locked loop (PLL) circuit can be reduced by increasing circuit bandwidth. A charge pump system is commonly used in the PLL circuitry to drive the voltage control...
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6107889 |
Phase locked loop charge pump circuit
A charge pump circuit including current source circuits for maintaining the current sourced from an upper current source substantially equal to the current sunk by a lower current source. The...
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6107890 |
Digital phase comparator and frequency synthesizer
The phase of a pulsed test signal is measured with reference to a reference signal of constant frequency by sampling the test signal at times determined by transitions in the reference signal and...
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6104251 |
Method and apparatus for providing transient suppression in a central processor unit (CPU) phase locked loop clock (PLL) clock signal synthesis circuit
The present invention is directed to apparatus and methods for reducing transient signals in phase locked loop (PLL) circuits of central processing units. One aspect of the present invention is...
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6104250 |
Method and an apparatus for controlling an oscillator for generating a linear frequency sweep by use of a phase-locked loop
A method and an apparatus for controlling a radar oscillator for use in the traffic field, in particular for a car radar, for generating a linear frequency sweep. A phase-locked linearization loop...
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6100766 |
Correction circuit controlling sensitivities of an oscillator circuit and electronic device using the same
A correction circuit for controlling a correction required circuit includes an oscillator circuit, and a logic circuit which counts an oscillation frequency of the oscillator circuit and thus...
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6100767 |
Phase-locked loop with improved trade-off between lock-up time and power dissipation
In a phase-locked loop with reference, feedback, and error signals, the trade-off between lock-up time and power dissipation is improved by one of the following methods: supplying a continuous...
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6097777 |
Phase locked loop circuit
The present invention is intended to reliably achieve a locked PLL even with a short VFO field to correctly perform subsequent reproduction of information data. A PLL circuit of the present...
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6094101 |
Direct digital frequency synthesis enabling spur elimination
The present invention, generally speaking, provides improved methods of generating clean, precisely-modulated waveforms, at least partly using digital techniques. In accordance with one aspect of...
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6094102 |
Frequency synthesizer using micro electro mechanical systems (MEMS) technology and method
A frequency stabilizer circuit in the form of a charge-pump phase-lock loop utilizing a MEMS capacitance device, preferably a tunable MEMS capacitor or a MEMS capacitor bank, which more rapid and...
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6094105 |
Oscillator with digital frequency control
An oscillator having an adjustable output frequency comprises a resonator, an inverting amplifier coupled to the resonator, a variable capacitance coupled to the resonator and to the amplifier, and...
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6094100 |
PLL synthesizer apparatus
Disclosed herein is a fractional N-type PLL frequency synthesizer apparatus. A fractional N-type control circuit employed therein for varying N values for each reference cycle is constructed of a...
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6091303 |
Method and apparatus for reducing oscillator noise by noise-feedforward
A circuit for reducing phase noise in a transmitted radio signal includes a first phase-locked loop circuit including a first controlled oscillator generating a first output signal at a first...
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6091356 |
Chirp source with rolling frequency lock for generating linear frequency chirps
A source for a linear homodyne transceiver that generates repeated linear chirps. A YIG oscillator with a main coil and an FM coil receives a basic linear current ramp at the main coil to generate...
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6091304 |
Frequency band select phase lock loop device
A multi-band phase lock loop (PLL) device for use in a communication system. The PLL comprises a frequency reference oscillator, a reference frequency divider, a phase and frequency detector, a...
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6091305 |
PLL frequency synthesizer
It is an object of the present invention to reduce the amount of spurious noise generated by an emission line spectrum of a signal propagating around the PLL of a PLL frequency synthesizer carrying...
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6087856 |
Biasing scheme for minimizing output drift in phase comparison and error correction circuits
A phase comparison and error correction circuit which utilizes one of a plurality of outputs of its phase detector as a biasing voltage for its error correction circuit.
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6084480 |
Phase locked loop circuit including voltage controlled oscillator and low pass filter
A PLL circuit of which pull-in time is reduced. The PLL circuit comprises a voltage controlled oscillator; a frequency divider which divides the frequency of the output signal from the voltage...
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6084479 |
Circuit, architecture and method(s) of controlling a periodic signal generating circuit or device
An apparatus comprising a phase-locked loop, a select circuit and a control circuit. The phase-locked loop may be configured to generate a feedback signal (along with a buffered output signal) in...
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6084481 |
Phase locking method and apparatus using switched drive signal
A phase locking method and apparatus use an applied drive signal to acquire and maintain phase lock, and to prevent false locking in the presence of spurious signals. Locking signal and spurious...
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6081163 |
Standard frequency and timing generator and generation method thereof
A frequency standard generator includes a voltage controlled crystal oscillator (VCXO) for generating high stability output signal, a radio wave receiver to receive a radio wave which includes a...
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6075394 |
PLL circuit and recording or reproducing apparatus utilizing the same
In a PLL circuit, the phase of the frequency of an input signal is compared with that of an oscillation frequency generated from a voltage-controlled oscillator. Charge pump circuits are provided...
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6075416 |
Method, architecture and circuit for half-rate clock and/or data recovery
A circuit comprising an oscillator, a multiplexer, a half rate clock circuit and a full rate clock circuit. The oscillator may be configured to generate a first clock signal and a second clock...
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6072369 |
Digital phase locked loop circuit for PCR recovery
Disclosed is a DPLL circuit including a PCR register receiving and storing PCR values; an LPCR counter counted by a system clock; an LPCR register fetching an LPCR value every PCR input cycle; a...
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6064274 |
RCB cancellation in high-side low power supply current sources
A current source circuit for providing a stable current into a filter element of a phase-lock-loop circuit of a clock generator. The current source circuit comprises a first resistor coupled to a...
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6064273 |
Phase-locked loop having filter with wide and narrow bandwidth modes
A phase-locked loop utilizes a pair of diodes in a loop filter design for providing fast acquisition of a reference signal during an acquisition mode, while maintaining a more narrow bandwidth in a...
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6060953 |
PLL response time accelerating system using a frequency detector counter
A PLL response time is accelerated with a frequency detector counter. The PLL utilizes both a phase frequency detector and the frequency detector counter. Initially, the operation of the PLL is...
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6057739 |
Phase-locked loop with variable parameters
An electronic system such as a processor or computer system includes a phase-locked loop (PLL) having a PLL parameter modification circuit. In one embodiment, the PLL parameter modification circuit...
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6054903 |
Dual-loop PLL with adaptive time constant reduction on first loop
A phase-locked loop fabricated on an integrated circuit includes a phase/frequency detector, a charge pump, a filter node and a voltage-controlled oscillator (VCO) which are coupled together in...
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6055362 |
Apparatus for phase synchronizing clock signals in a fully redundant computer system
A redundant computer system including two systems capable of independent operation. The two systems correspondingly employ two independent clock generation and distribution (CGD) units which each...
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6049257 |
Method and arrangement for frequency modulation of a high-frequency signal
In a method and an arrangement for frequency modulation of a high-frequency signal, where the high-frequency signal is generated with an oscillator which is controlled by comparison of an actual...
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6049254 |
Phase-locked loop which can automatically adjust to and lock upon a variable input frequency
An apparatus is provided for automatically and dynamically adjusting a frequency division factor of a clock divider situated in the feedback loop of a phase-locked loop (PLL). The frequency...
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6049255 |
Tuning the bandwidth of a phase-locked loop
A phase-locked loop bandwidth is tuned to a desired level by operating the phase-locked loop in a phase-locked condition at a first frequency and applying a step response to the phase-locked loop...
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6046645 |
Method and device for the digital control of a phase-locked loop and relative phase-locked loop thus obtained
A method is described for the digital control of a phase-locked loop consisting in the separate estimation of both phase and frequency errors of the data source as compared with those of the local...
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6046644 |
Phase-locked loop oscillator formed entirely of logic circuits
Phase-locked loop oscillators that are designed to set the clock rate of electronic circuits based on combinations of logic circuits and to be integrated, at the same time as these electronic...
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6046646 |
Modulation of a phase locked loop for spreading the spectrum of an output clock signal
Apparatus and methods for controlling the frequency spectrum of a clock signal, for example, to reduce EMI emissions. A PLL circuit receives a reference signal and generates an output clock signal....
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6043695 |
Phase locked loop using a schmitt trigger block
A phase locked loop (PLL) circuit is described which uses a Schmitt trigger block (28) to achieve a very small steady state phase error at an input of a phase comparator block (21) over the entire...
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6043724 |
Two-stage power noise filter with on and off chip capacitors
Described is a novel implementation of a medium and high frequency on-module (off-chip)/on-chip power noise filter for power noise sensitive circuits. To achieve this, a second order low-pass...
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6043716 |
Charge pump for phase locked loop including main and auxiliary pump circuits
A charge pump includes a main pump circuit having a main first and second switching transistors and an auxiliary pump circuit. The charge pump is configured to provide a variable bias to at least...
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6043715 |
Phase-locked loop with static phase offset compensation
A phase-locked loop (PLL) has a master circuit configured to a slave circuit. The slave circuit has a phase detector, a charge pump, a loop filter, and a voltage-controlled oscillator configured to...
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6043717 |
Signal synchronization and frequency synthesis system configurable as PLL or DLL
A circuit including a configurable mode device configured to generate an output signal in response to a differential control signal, the differential control signal representing a phase difference...
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6040742 |
Charge-pump phase-locked loop with DC current source
A phase-locked loop (PLL) has a phase detector (PD), a charge pump, a loop filter, and a voltage-controlled oscillator (VCO). The PD generates DOWN pulses based on differences in phase between an...
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6031429 |
Circuit and method for reducing lock-in time in phase-locked and delay-locked loops
Method and circuit aspects for improving lock-in time following power-up in a phase-locked loop are provided. The circuit and method for providing same includes a phase-locked loop, the...
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