Match Document Document Title
7622996 Multi-loop phase locked loop circuit  
Disclosed is a multi-loop PLL circuit and a related method of which, the circuit includes: a first loop for generating a first control current; a second loop for generating a second control...
7616067 Phase synchronization circuit and electronic apparatus  
A phase synchronization circuit and an electronic apparatus equipped with the phase synchronization circuit are provided. The phase synchronization circuit includes an oscillation unit, a phase...
7605667 Frequency synthesizer with a harmonic locked phase/frequency detector  
A frequency synthesizer. The frequency synthesizer comprises a harmonic locked phase/frequency detector, a low pass filter, a voltage controlled oscillator, and a frequency divider. The harmonic...
7605662 Oscillator controller incorporating a voltage-controlled oscillator that outputs an oscillation signal at a desired oscillation frequency  
An oscillator controller has a phase frequency detector that compares a reference signal and a frequency-divided signal and outputs a phase difference signal; a charge pump; a loop filter that...
7590207 Modular serial interface in programmable logic device  
A serial interface for a programmable logic device can be used as a conventional high-speed quad interface, but also allows an individual channel, if not otherwise being used, to be programmably...
7580443 Clock generating method and clock generating circuit  
In a clock generating circuit, while a PLL (Phase-Locked Loop) circuit and a modulator are employed, when a frequency dividing ratio of a feedback-purpose frequency divider in the PLL circuit is...
7567643 Phase lock loop device  
A phase lock loop device further includes a probability shaping device provided between a phase detection device and charge pump and loop filter (CPLF) device. The probability shaping device...
7567629 Multiphase clock recovery  
The invention represents a parallel and distributed approach to clock recovery based on multiple mutually phase shifted sample clock signals (åS) defining a set of orthogonal clock phases. The...
7564313 Phase locked loop for controlling a recording device and method thereof  
A PLL system for generating an output signal according to a first reference signal is disclosed. The PLL system includes a clock generator to generate the output signal according to a phase...
7554412 Phase-locked loop circuit having correction for active filter offset  
A phase locked loop (PLL) circuit automatically corrects the offset of the analog (especially active type) loop filter to improve the stability and precision of the locked clock or frequency...
7548124 System and method for self calibrating voltage-controlled oscillator  
A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an...
7548121 Fractional frequency synthesizer and phase locked loop utilizing fractional frequency synthesizer and method thereof  
A fractional frequency synthesizer, applied to a phase-locked loop, includes a phase detector, a loop filter, a controllable oscillator, a first frequency divider, and a sigma-delta modulator...
7532078 Scannable virtual rail method and ring oscillator circuit for measuring variations in device characteristics  
A scannable virtual rail method and ring oscillator circuit for measuring variations in device characteristics provides the ability to study random device characteristic variation as well as...
7511579 Phase lock loop and operating method thereof  
A PLL is provided, comprising a first divider, a PFD, a loop filter, a VCO, a second divider and a controller. The first divider receives a reference signal and divides the reference signal by R to...
7504894 Phase locked loop circuit and semiconductor integrated circuit device using the same  
To provide a phase locked loop circuit that is capable of performing an automatic adjustment that satisfies a desired characteristic not depending on a process variation and an environmental...
7498884 Self calibrating RC oscillator  
There is disclosed a self-calibrating resistor-capacitor (RC) oscillator in which a resistor has a resistance value varied minimally by temperature change and process variation, a capacitor has a...
7492849 Single-VCO CDR for TMDS data at gigabit rate  
A clock and data recovery circuit has a voltage controlled oscillator that provides a clocking signal synchronized to a received serialized data. A multiple phase generator converts the clocking...
7486146 Loop system capable of auto-calibrating oscillating frequency range and related method  
A loop system capable of auto-calibrating an oscillating frequency range includes a frequency error detector, a voltage controlled oscillator (VCO), a voltage input unit, and a switch. The...
7463100 Phase frequency detector capable of improving noise characteristics  
A phase frequency detector for improving in-band phase noise characteristics of a PLL is disclosed. The phase frequency detector compares a reference frequency with a division frequency created by...
7456694 Self-calibrated constant-gain tunable oscillator  
The present invention provides a tunable oscillator. A voltage-to-current converter receives as input a voltage from a phase-locked loop and outputs a first current. A current-controlled oscillator...
7443250 Programmable phase-locked loop responsive to a selected bandwidth and a selected reference clock signal frequency to adjust circuit characteristics  
A technique that is readily implemented in monolithic integrated circuits includes a phase-locked loop (PLL) that generates an output clock signal based on a reference clock signal and selectable...
7443247 Circuit arrangement for detection of a locking condition for a phase locked loop, and a method  
A circuit arrangement includes a phase locked loop, having a phase detector on whose output side a phase signal can be tapped off and whose output side is coupled to a charge pump. Furthermore, the...
7439816 Phase-locked loop fast lock circuit and method  
Phase-locked loop fast lock circuit and method are described. The apparatus including a voltage controlled oscillator, a control loop filter having a capacitor and at least one resistor, and first...
7439812 Auto-ranging phase-locked loop  
A phase locked loop circuit includes an oscillator, a dividing circuit coupled to the oscillator having a controllable dividing factor, and a rangefinder circuit coupled to the dividing circuit....
7436264 Charge supply apparatus and method in frequency synthesizer  
A charge supplying apparatus in a frequency synthesizer includes first and second charge supply units. The first charge supply unit is activated for generating a first voltage coupled to a loop...
7427899 Apparatus and method for operating a variable segment oscillator  
This disclosure is directed to a communications device having a comparator that receives a signal associated with an output and produces a signal associated with a difference between a reference...
7405628 Technique for switching between input clocks in a phase-locked loop  
A technique that is readily implemented in monolithic integrated circuits reduces or eliminates phase glitches when switching between input reference clock signals. The technique combines a pulsed...
7397312 Spectrum analyzer and method for correcting frequency errors  
A spectrum analyzer corrects for internal frequency errors in a reference oscillator using a timing control signal. The reference oscillator provides a reference signal at a reference frequency. An...
7389192 Determining data signal jitter via asynchronous sampling  
A method for determining data signal jitter via asynchronous sampling provides a low cost and production-integrable mechanism for measuring data signal jitter. The data signal is edge-detected and...
7388437 System and method for tuning a frequency synthesizer  
An apparatus for generating an output signal having a particular frequency includes an oscillator, a first tuning module, and a second tuning module. The oscillator generates an output signal...
7383160 Method and apparatus for constructing a synchronous signal diagram from asynchronously sampled data  
A method a low cost and production-integrable technique for providing a signal diagram. The data signal is edge-detected and asynchronously sampled (or alternatively a clock signal is latched). The...
7372339 Phase lock loop indicator  
A phase-locked loop (PLL) circuit includes a power-on-reset (POR) to reset a digital block and set an initial input voltage value VCTRL of voltage-controlled oscillator (VCO). An input divider and...
7362826 Receiver including an oscillation circuit for generating an image rejection calibration tone  
A receiver circuit includes an oscillator circuit configured to generate a calibration tone and a phase locked loop (PLL) reference signal. An output frequency of the VCO may be divided by...
7362184 Frequency divider monitor of phase lock loop  
A circuit and method for monitoring a frequency divider. The circuit including a phase locked loop circuit including a voltage controlled oscillator and a feedback frequency divider, an output of...
7352248 Method and apparatus for maintaining a clock/data recovery circuit frequency during transmitter low power mode  
A method, algorithm, software, architecture, circuit, and/or system for detecting an idle condition and maintaining a frequency of a clock/data recovery circuit are disclosed. In one embodiment, a...
7343510 Method and device for selecting one of multiple clock signals based on frequency differences of such clock signals  
A clock detection and selection circuit ( 100 ) can include a first counter ( 102 - 0 ) that generates a first count value CNT 1 according to a first clock signal CLK 1 and a second counter ( 102...
7339439 Voltage-controlled oscillator with multi-phase realignment of asymmetric stages  
A multi-phase realigned voltage-controlled oscillator (MRVCO) achieves phase realignment based on charge injection in the VCO stages. The individual VCO stages provide an oscillating output signals...
7323942 Dual loop PLL, and multiplication clock generator using dual loop PLL  
To provide dual loop PLLs capable of reducing the lock-up time in the initial start-up, and multiplication clock generators contributing to reduction of the power dissipation. The dual loop PLL...
7321267 Compensating capacitive dielectric absorption induced frequency error in a phase locked loop  
A PLL comprises a VCO and a loop filter, wherein the VCO generates an AC output signal having a frequency which depends on an applied control voltage, and wherein the loop filter provides a control...
7315214 Phase locked loop  
A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a...
7301414 PLL circuit, radio-communication equipment and method of oscillation frequency control  
A Phase-Locked Loop (PPL) circuit includes a voltage controlled oscillator (VCO), a reference signal oscillator, first and second frequency dividers, a phase comparator, a charge pump and a loop...
7292119 Phase locked loop frequency synthesizer  
The phase locked loop frequency synthesizer, includes: an LC-tank circuit which includes an inductor and a variable capacitor in which the capacity changes depending on the input voltage; a group...
7288997 Phase lock loop and the control method thereof  
A phase lock loop and the control method thereof. The phase lock loop adjusts operating states automatically to generate a feedback clock for tracing a reference clock. The control method generates...
7286947 Method and apparatus for determining jitter and pulse width from clock signal comparisons  
A method and apparatus for determining jitter and pulse width from clock signal comparisons provides a low cost and production-integrable mechanism for measuring a clock signal with a reference...
7282999 Method and device for generating a clock signal using a phase difference signal and a feedback signal  
A method and a device for generating a clock signal (F out ) are provided, wherein a digital phase difference signal (X) is formed depending on a phase difference between a reference clock signal...
7276977 Circuits and methods for reducing static phase offset using commutating phase detectors  
Embodiments of the present invention reduce static phase offset in timing loops. In one embodiment, the present invention includes a timing loop comprising first and second phase detectors, wherein...
RE39807 Phase locked loop circuit  
A PLL circuit comprises a frequency comparator for detecting a phase difference based on a difference in frequencies between a reproduced data pulse and a clock generated by a VCO; a phase...
7259601 Apparatus and method for suppressing jitter within a clock signal generator  
A clock synchronization circuit ( 200 , FIG. 2 ) includes a signal selector ( 202 ), phase detector ( 204 ), and delay line ( 206 ). The signal selector compares an external clock signal ( 220 )...
7256655 Phase-locked loop apparatus and method thereof  
A PLL device includes a first hybrid PLL and a second digital phase/frequency detection module. The second digital phase/frequency detection module and the first hybrid PLL's oscillator, switching...
7233183 Wide frequency range DLL with dynamically determined VCDL/VCO operational states  
In one embodiment of the present invention, a phase generator, comprising a plurality of delay blocks, is coupled in a feedback loop with a phase detector. When in an open loop mode, the phase...