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7071738 |
Glitchless clock selection circuit using phase detection switching
A clock selection circuit includes an output multiplexer, control logic, and edge detection logic. The multiplexer includes inputs to receive multiple input clock signals, an output to generate the...
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7068080 |
Method and apparatus for reducing power consumption within a logic device
Method and apparatus for reducing power consumption within a logic device is described. A logic device comprises a clock gate and a flip-flop. The clock gate includes a clock enable terminal and a...
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7057430 |
Clock shaping device and electronic instrument using the same
A clock shaping device includes a first clock signal selection portion that selects between a reception clock signal and a back-up clock signal based on a detected loss in the reception clock...
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7053675 |
Switching between clocks in data processing
A processor clock control device is disclosed that is operable to control switching between clock signals input to a processor in a glitch-free way. The processor clock control device comprises: at...
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7046047 |
Clock switching circuit
A clock switching circuit capable of preventing occurrence of hazards in an output clock signal at a time of clock switching, regardless of the frequency ratio of input clock signals. At a time of...
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7046704 |
Tunable laser with a fixed and stable wavelength grid especially useful for WDM in fiber optic communication systems
A wavelength tunable mode-locked laser system including a complex laser cavity comprising a broadband reflective mirror at one end and a wavelength chirped selective mirror at the other end. The...
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7038506 |
Automatic selection of an on-chip ancillary internal clock generator upon resetting a digital system
A digital logic system includes a reset input for receiving a reset signal, and a clock input for receiving an externally generated main clock signal. An ancillary clock generator generates an...
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7012458 |
Analog switching circuit
An analog switching circuit selects one of a first pair of differential outputs of a first circuit having a first common mode voltage and a second pair of differential outputs of a second circuit...
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6982573 |
Switchable clock source
A clock source selector for selecting either a first clock signal A or a second clock signal B in accordance with a switch request signal includes three retiming circuits each consisting of two...
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6982589 |
Multi-stage multiplexer
A multiplexer includes a first stage that has tri-state buffers each of which has split outputs and a final stage that has a tri-state buffer with an output. The multiplexer includes circuitry...
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6975145 |
Glitchless dynamic multiplexer with synchronous and asynchronous controls
Described are glitchless clock control circuits capable of switching away from a failed clock. One embodiment supports three basic functions: clock select, clock enable, and clock ignore. The...
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6970033 |
Two-by-two multiplexer circuit for column driver
A two-input, two-output multiplexer circuit has two tri-state inverter circuits and two switch circuits. The multiplexer outputs may be interchanged depending on a control signal. Each tri-state...
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6960942 |
High speed phase selector
Method and circuitry for selecting phases while avoiding glitches in the output signal during phase switching. An integrated circuit having a plurality of input terminals coupled to receive a...
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6943607 |
Method and device for generating delay signal
For generating a delay signal, a series of source signals based on the same high frequency signal are first provided. Every adjacent two of the source signals have a phase difference of a certain...
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6927604 |
Clock signal selector circuit with reduced probability of erroneous output due to metastability
A clock signal selector circuit is disclosed including a synchronizer circuit, two switching circuits, and a multiplexer. The synchronizer circuit synchronizes a first control signal to a first...
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6906563 |
Generating a waveform having one signal level periodically and different signal levels in other durations
Generating a waveform having one signal level periodically and different signal levels in other durations. Two input signals are received, one having a desired constant level and another having...
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6906570 |
Multi clock deciding system
A clock deciding apparatus generates a plurality of delay clock signals and outputs a clock signal most similar to an outer clock signal to reduce the time used to decide the clock greatly. Also,...
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6891409 |
Semiconductor device
For suppressing increase of terminals in number, a semiconductor device is proposed which includes an input terminal to which an external clock is to be inputted. The semiconductor device further...
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6882184 |
Clock switching circuit
A clock switching circuit has a clock output circuit and clock signal transfer circuits. The output circuit provides a selected clock signal. The transfer circuits receive input clock signals and...
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6879188 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device employing two clock signal generating circuits which output clock signals for distribution to an internal circuit of the device, the first and second clock...
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6864732 |
Flip-flop circuit with reduced power consumption
A low power flip-flop is disclosed. The number of transistors which are coupled to the clock signal is reduced by more than half when compared with known flip-flop designs. The flip-flop comprises...
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6859086 |
Method and device for generating selection signal with improved accuracy
A device and a method are used for generating a selection signal provided for a multiplexing circuit. The multiplexing circuit generates an output signal from a plurality of source signals in...
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6845490 |
Clock switching circuitry for jitter reduction
Clock switching circuitry includes a clock switching control circuit for temporarily storing a clock select signal, which is input from the outside for selecting one of a plurality of clock signals...
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6845048 |
System and method for monitoring internal voltages on an integrated circuit
A system and method for monitoring internal voltage sources in an integrated circuit, such as a DRAM integrated circuit, includes an internal analog multiplexing circuit, an internal...
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6842052 |
Multiple asynchronous switching system
A system for allowing an asynchronous clock signal to be selected from a plurality of asynchronous clock signals without causing glitches. In the system, a requestor is connected to control...
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6839391 |
Method and apparatus for a redundant clock
A redundant clock system and communications cards for utilizing the system, the system including a clock source for providing a reference signal for communication cards; an alternate clock source,...
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6828830 |
Low power, area-efficient circuit to provide clock synchronization
A clock signal generator, which requires no clock selection pin includes a multiplexer to which external and internal clocks are applied. The external clock is further coupled directly and via an...
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6825707 |
Current mode logic (CML) circuit concept for a variable delay element
An apparatus for a current mode logic variable delay element. A preferred embodiment comprises an input signal that is provided to a multiplexer (for example, multiplexer 210 ) in both buffered...
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6822486 |
Multiplexer methods and apparatus
In a first aspect, a method is provided for selecting a signal from a plurality of signals. The method includes the steps of (1) providing a plurality of multiplexers, each multiplexer configured...
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6809556 |
Self-compensating glitch free clock switch
A glitch free self-correcting clock switching mechanism operative to switch between two clocks in a glitch free manner while compensating for the ambiguity inherent in the switching operation....
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6806755 |
Technique for glitchless switching of asynchronous clocks
A technique for glitchless switching among different frequency input clocks in a circuit includes monitoring each of the clocks and determining when the relative phases of the respective clocks are...
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6803796 |
Bi-direction switching and glitch/spike free multiple phase switch circuit
The present invention is to provide a multiple phases switching circuit which is operable with a multiple phase signal generator and a succeeding circuit. The multiple-phase signal generator...
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6801074 |
Clock switching circuit
A clock switching circuit is provided for switching from a first clock signal being output to a freely selected second clock signal among a plurality of clock signals having different frequencies...
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6798266 |
Universal clock generator using delay lock loop
A clock generator and method generates a plurality of clocks of different frequencies using a delay lock loop and a sequencer. The delay lock loop receives an input clock signal having an input...
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6791375 |
Method and circuit for switching source modulation frequency
The DC to DC converter has an oscillator and generates an output voltage to drive a system. The modulation frequency is used for modulating a pulse width modulation (PWM) circuit in the DC to DC...
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6791376 |
Integrated circuit interconnect routing using double pumped circuitry
Circuit interconnect communication circuitry dual edge triggered latching circuits transmit two data signals over a common interconnect line during one clock cycle; on signal is transmitted during...
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6784699 |
Glitch free clock multiplexing circuit with asynchronous switch control and minimum switch over time
A symmetric glitch free clock multiplexing circuit allows the input clock to a digital or analog processing unit to be switched from one frequency to the other at any moment during the operation,...
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6774681 |
Switchable clock source
A clock source selector for selecting either a first clock signal A or a second clock signal B in accordance with a switch request signal includes three retiming circuits each consisting of two...
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6759879 |
Storage circuit
A storage circuit comprises a first clock receiver circuit for receiving an external clock signal so as to produce from said external clock signal a first internal clock signal and so as to output...
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6759890 |
Integrated semiconductor module with a bridgeable input low-pass filter
An integrated semiconductor module having at least one terminal for connection to a data bus and having at least one low-pass filter that is connected downstream of the terminal in order to limit...
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6737904 |
Clock circuit, GSM phone, and methods of reducing electromagnetic interference
A method of producing a clock signal with reduced electromagnetic interference spectral components includes providing a first clock signal; producing a second clock signal by delaying the first...
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6731140 |
Complement reset multiplexer latch
A complement reset multiplexer latch is provided. The complement reset multiplexer latch selectively regenerates a first or a second data input signal on an output node. To react to rising edges of...
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6657461 |
System and method for high speed integrated circuit device testing utilizing a lower speed test environment
A system and method for low cost testing of integrated circuit devices at their rated speed during wafer probe testing while input signals to, and output signals from, the device may be operated at...
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6653871 |
Method of and circuit for controlling a clock
This invention relates to switching-over to a higher speed clock from a lower speed clock. The switching-over of the clock is performed before, after, or simultaneously to a transition to a sleep...
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6653867 |
Apparatus and method for providing a smooth transition between two clock signals
An apparatus and method is disclosed for providing a smooth transition between a first clock signal at a first frequency and a second clock signal at a lower second frequency. A pulse is generated...
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6646480 |
Glitchless clock output circuit and the method for the same
A circuit and a method for generating a variable delay clock without glitches are provided. A DLL clock output circuit comprises a selection circuit. A plurality of select signals selectively...
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6642770 |
Multi-layer control interface for clock switching in a communications element
A clock system includes a provisioning layer corresponding to a plurality of input clocks, and a plurality of layers arranged according to a hierarchy. The first layer in the hierarchy is operable...
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6639449 |
Asynchronous glitch-free clock multiplexer
A clock multiplexer selects between two asynchronous clock signal inputs to produce a clock signal output such that the clock signal input corresponding to the clock signal output may be denoted as...
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6614291 |
Low voltage, high speed CMOS CML latch and MUX devices
A signal multiplexer system and a signal latch system for low voltage (V dd ≈1.2 volts) and high speed transitions between states. A dc signal isolation circuit, inserted between a clock signal...
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6611158 |
Method and system using a common reset and a slower reset clock
The operability and scaleability of electronic circuits is improved using a circuit arrangement that is modular, scaleable, straightforward to implement and allows for simple and safe physical...
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