|
Match
|
Document |
Document Title |
|
|
5686848 |
Power-up/power-down reset circuit for low voltage interval
A power up, power down reset circuit formed of charge storage apparatus for receiving and storing charge from one pole of a voltage supply, a pair of complementary field effect transistors having...
|
|
|
5682118 |
Circuit for controlling the voltages between well and sources of the transistors of and MOS logic circuit, and system for slaving the power supply to the latter including the application thereof
The control circuit includes a reference MOS transistor (24) on which preermined operating characteristics are imposed. Circuitry (21, 22, 23) is provided for comparing an operating characteristic...
|
|
|
5672996 |
Substrate voltage supply control circuit for memory
A substrate voltage supply control circuit for a memory which is capable of controlling substrate voltages having different voltage levels generated from a substrate voltage generating circuit...
|
|
|
5672995 |
High speed mis-type intergrated circuit with self-regulated back bias
There are provided a MIS transistor having a substrate portion, a gate, a source, and a drain, a back-bias generator to be applied to the substrate portion of the MIS transistor, and a resistor...
|
|
|
5668487 |
Circuit detecting electric potential of semiconductor substrate by compensating fluctuation in threshold voltage of transistor
A substrate potential detection circuit includes a substrate potential detection unit including a first transistor having a gate and a source connected respectively to a ground line and a reference...
|
|
|
5656970 |
Method and structure for selectively coupling a resistive element, a bulk potential control circuit and a gate control circuit to an output driver circuit
An output driver including pull-up and pull-down output transistors is formed in a silicon substrate. The source and the drain of the pull-up output transistor are formed in a common bulk region of...
|
|
|
5644266 |
Dynamic threshold voltage scheme for low voltage CMOS inverter
The present invention utilizes a CMOS (complementary metal-oxide-semiconductor) inverter, which includes a PMOS transistor and an NMOS transistor connected in cascade, and back-gate biasing...
|
|
|
5640123 |
Substrate voltage control circuit for a flash memory
A substrate voltage control circuit is used to apply bias voltage to a substrate or a well of a semiconductor memory such as a flash memory. The substrate voltage control circuits do not use any...
|
|
|
5633825 |
Voltage generating circuit in semiconductor integrated circuit
A voltage generating circuit in a semiconductor integrated circuit driven by two sorts of power supply voltages, includes a unit for generating plural sorts of signals; a unit for selecting one of...
|
|
|
5612644 |
Circuits, systems and methods for controlling substrate bias in integrated circuits
Substrate bias control circuitry 100 is provided which includes a bias sensor 101 for measuring a bias voltage of a substrate and generating a control signal and response. A master oscillator 102...
|
|
|
5612643 |
Semiconductor integrated circuit which prevents malfunctions caused by noise
In a semiconductor integrated circuit device, a MOS transistor has a relatively high built-in threshold, and in operation, a substrate bias is applied to the MOS transistor so as to cause the MOS...
|
|
|
5610549 |
Voltage boosting circuit of a semiconductor memory circuit
A voltage booting circuit for boosting a supply voltage VCC supplied from a system to a desired boosting voltage VPP level. The voltage boosting circuit includes a transmission transistor formed by...
|
|
|
5602506 |
Back bias voltage generator
A back bias voltage generator comprising a power-on signal generator for generating a power-on signal when an external voltage remains at a constant level, a reference voltage generator for...
|
|
|
5594381 |
Reverse current prevention method and apparatus and reverse current guarded low dropout circuits
A reverse current limited circuit configured to provide a reverse current limited low dropout voltage output. The reverse current limited circuit, coupled between a pair of terminals, comprises (i)...
|
|
|
5578961 |
MMIC bias apparatus and method
A microwave monolithic integrated circuit (MMIC) RF-generated bias circuit and method includes an input for receiving an RF signal. A rectifier coupled to the input and to electrical ground...
|
|
|
5570005 |
Wide range power supply for integrated circuits
A wide range power supply for integrated circuits includes a voltage-down converter to receive the input supply voltage and generate a controlled low voltage signal. The circuit also includes a...
|
|
|
5557231 |
Semiconductor device with improved substrate bias voltage generating circuit
A semiconductor device including an NMOS transistor includes a first bias generating circuit 30 for generating a substrate bias VBB1 for making smaller the amount of leak current in an inactive...
|
|
|
5552723 |
CMOS output circuit compensating for back-gate bias effects
An output circuit according to the present invention comprises an input terminal, first and second MOS transistors of a same conductivity type connected in series between first and second power...
|
|
|
5546020 |
Data output buffer with latch up prevention
A data output buffer comprising a pull-up transistor having an N type-well, the pull-up transistor transferring a supply voltage from a supply voltage source to an output line in response to a...
|
|
|
5541531 |
Switch capacitor interface circuit
A switched capacitor interface circuit translates a voltage output of a sensor which is outside the range of the power supply voltage for a signal processing circuit to a voltage within that range....
|
|
|
5539771 |
Communication line driver, LSI for interface including such a circuit and communication terminal apparatus
A communication line driver for a communication interface includes on one chip, a trimming circuit for adjusting a reference voltage generated by a reference voltage generating circuit, a driving...
|
|
|
5534795 |
Voltage translation and overvoltage protection
A voltage translator is provided that translates a lower voltage to a higher voltage, for example, a 3.3 V voltage to a 5.0 V voltage. The 3.3 V voltage is received on source/drain terminal N1 of...
|
|
|
5532653 |
Supply voltage compensated charge pump oscillator
A charge pump oscillator for regulating an oscillator frequency over a wide range of supply voltages is disclosed. Such a charge pump oscillator provides a charge pump system that provides a...
|
|
|
5530640 |
IC substrate and boosted voltage generation circuits
A voltage generation circuit has a charge pump circuit, a clamping circuit for clamping an output voltage of the charge pump circuit, and detecting means for detecting the output voltage of the...
|
|
|
5528193 |
Circuit for generating accurate voltage levels below substrate voltage
A simple operational amplifier is coupled to a pair of resistors such that a positive reference voltage is reliably converted to a negative voltage. The op amp includes a differential pair of pnp...
|
|
|
5519654 |
Semiconductor memory device with external capacitor to charge pump in an EEPROM circuit
A semiconductor memory device having a memory cell array with a plurality of transistors (memory cells MC) disposed in a matrix form capable of electrically altering data. In writing data to a...
|
|
|
5519360 |
Ring oscillator enable circuit with immediate shutdown
An integrated memory circuit is described which includes a charge pump for producing a pumped voltage and a ring oscillator coupled to the charge pump. The ring oscillator is used to operate the...
|
|
|
5508654 |
Transistor circuits with a terminal for receiving high voltages and signals
A transistor circuitry keeps its constituent transistors from being forward biased to prevent injection of large currents into the transistor substrates, and like problems. The transistor circuitry...
|
|
|
5506540 |
Bias voltage generation circuit
A bias voltage generation circuit has a bias voltage generation means and a VBB detector. The bias voltage generation means is made up of a charge pump circuit, and a ring oscillator for biasing a...
|
|
|
5493233 |
MOSFET circuit apparatus with avalanche breakdown prevention means
A transistor circuit apparatus comprises a MOS transistor to be improved, for preventing an avalanche breakdown, the MOS transistor being connected in a channel conductor path provided between one...
|
|
|
5489870 |
Voltage booster circuit
A booster circuit which can cancel the back bias effect, can prevent the increase of the surface area of the circuit and the power consumption, prevent the complication of the clock generation...
|
|
|
5483205 |
Low power oscillator
An oscillator circuit (150) is designed with a reference circuit (102), responsive to a first voltage, for producing a second voltage. An oscillator (108), responsive to the second voltage,...
|
|
|
5471246 |
Apparatus for determining charge/voltage conversion ratios in charge coupled devices
A method for determining a charge/voltage conversion ratio of a solid state image pickup element with an electronic shutter function which is capable of transferring signal charge accumulated in a...
|
|
|
5469387 |
Circuit for clamping enable clock in a semiconductor memory device
A circuit for a clamping an /RAS signal in a DRAM. The bit line pre-charge generator is activated after the set-up of the VBB voltage, so that /RAS signals may be supplied to the chip after the bit...
|
|
|
5467031 |
3.3 volt CMOS tri-state driver circuit capable of driving common 5 volt line
A CMOS tri-state driver circuit is capable of operating in a normal drive mode and in a high impedance mode. The circuit is powered by a 3 volt power supply, and drives an output terminal that is...
|
|
|
5467048 |
Semiconductor device with two series-connected complementary misfets of same conduction type
A low-voltage driven semiconductor device is simple to fabricate, operates at high speed, and consumes low power. The semiconductor device is made of first and second MISFETs connected in series....
|
|
|
5461338 |
Semiconductor integrated circuit incorporated with substrate bias control circuit
The semiconductor IC according to this invention comprises an internal circuit including a plurality of transistors formed on a P-type or an N-type substrate (or a well) which carries out a...
|
|
|
5461585 |
Semiconductor integrated circuit having delay circuit with voltage-to-delay characteristics proportional to power voltage level
A semiconductor memory device has an addressable data storage powered with an internal step-down power voltage for storing data bits, a signal buffer circuit powered with a non-step-down power...
|
|
|
5461591 |
Voltage generator for semiconductor memory device
A voltage generator for use in a semiconductor memory device suitable for use as a backbias voltage generator, as an internal high voltage generator, or as an internal power voltage generator. The...
|
|
|
5451889 |
CMOS output driver which can tolerate an output voltage greater than the supply voltage without latchup or increased leakage current
A mixed mode buffer circuit 11 including a first input (12), a second input (13), and an output (14). A voltage exceeding a supply voltage of mixed mode buffer circuit 11 can be applied to the...
|
|
|
5448198 |
Semiconductor integrated circuit device having circuitry for limiting forward junction current from a terminal
A semiconductor integrated circuit device comprises a semiconductor substrate; an input and output terminal (1) formed on the semiconductor substrate; an input and output circuit (2, 3) formed on...
|
|
|
5434526 |
Output circuit and semiconductor integrated circuit device
The present invention relates to an output circuit and a semiconductor integrated circuit. It is an object of the present invention to cut off a passage of a current through a forward parasitic...
|
|
|
5432469 |
Method and apparatus for a two phase bootstrap charge pump
An integrated circuit charge pump circuit including a plurality of stages, each stage including a first N type field effect switching transistor device having source and drain terminals connected...
|
|
|
5422583 |
Back gate switched sample and hold circuit
An improved back gate switched sample and hold circuit includes a sample and hold channel including a sample switch having a back gate and a storage element; a back gate circuit for controlling the...
|
|
|
5412257 |
High efficiency N-channel charge pump having a primary pump and a non-cascaded secondary pump
A high efficiency charge pump for low and wide voltage ranges. The charge pump includes main and secondary charge pumps, the secondary charge pump is employed to avoid the Vt N drop that the main...
|
|
|
5408140 |
Substrate potential generating circuit generating substrate potential of lower level and semiconductor device including the same
A substrate potential generating circuit can generate a lower substrate potential. The substrate potential generating circuit includes a clock signal generating circuit and first and second charge...
|
|
|
5404329 |
Boosting circuit improved to operate in a wider range of power supply voltage, and a semiconductor memory and a semiconductor integrated circuit device using the same
A boosting circuit is provided applicable in various semiconductor integrated circuits such as a word line boosting circuit in a semiconductor memory. Because a backgate electrode of a PMOS...
|
|
|
5397934 |
Apparatus and method for adjusting the threshold voltage of MOS transistors
An apparatus and method for adjusting the effective threshold voltage of a MOS transistor is disclosed. Reference voltage generation circuitry is used for generating a first voltage signal....
|
|
|
5397931 |
Voltage multiplier
The present invention relates to a voltage multiplier for generating an output voltage which is several times greater than the operating voltage for connection of a load connected to ground to the...
|
|
|
5396128 |
Output circuit for interfacing integrated circuits having different power supply potentials
An output driver circuit has a circuitry portion (70) which is used to generate a Drive-Hi control signal in response to an Output Enable, an optional Precondition signal, and a Data Input signal....
|