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7619456 |
Wide frequency multi-phase signal generator with variable duty ratio and method thereof
A multi-phase signal generator may include a duty control buffer configured to receive a first differential input signal and a second differential input signal, and generate a first differential...
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7609102 |
Pattern-dependent phase detector for clock recovery
A phase detector apparatus and method used for clock recovery from a data signal is provided. The phase detector provides phase correction signals to a clock signal generator, where the phase...
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7579891 |
Method and circuit arrangement for generating a periodic electric signal with controllable phase
The invention relates to the generation of an electric output signal with a specified frequency and a phase (P) dependent upon a control signal (x) by means of weighted superposition of several...
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7558556 |
Adaptive radio transceiver with subsampling mixers
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a...
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7545193 |
Voltage-controlled delay circuit using second-order phase interpolation
Phase interpolation techniques for voltage-controlled delay line (VCDL) implementation are provided. The techniques of the invention may employ a second-order phase interpolation topology to...
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7519925 |
Integrated circuit with dynamically controlled voltage supply
An electronic system ( 10 ). The system comprises circuitry (P 1 ) for receiving a system voltage from a voltage supply. The system also comprises circuitry ( 14 1 ), responsive to the system...
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7491931 |
Power supply regulation using a feedback circuit comprising an AC and DC component
In various aspects, ion sources, mass spectrometer systems, and a power supply circuit coupled to a feedback circuit are provided. A power supply is provided that includes at least the power supply...
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7446616 |
Multi-phase clock generator and method thereof
A multi-phase clock generator for generating a set of multi-phase clock signals is disclosed. The multi-phase clock generator includes a signal generator, a phase adjusting circuit, and a phase...
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7420404 |
Phase adjuster circuit and phase adjusting method
A phase adjustor circuit and a phase adjusting method are capable of preventing a phase shift amount from fluctuating even if a frequency of a transmission carrier wave of a sensor signal...
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7362156 |
Reliable phase adjustment circuit
A phase adjustment circuit generates multiple clock signals by, for example, successively delaying a first clock signal. One of the generated clock signals is selected and output. A phase...
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7324043 |
Phase shifters deposited en masse for an electronically scanned antenna
A system and method for an electronically scanned antenna is provided in which phase shifters are deposited en masse along with other electronically scanned antenna components on a wafer scale...
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7301410 |
Hybrid current-starved phase-interpolation circuit for voltage-controlled devices
A hybrid circuit includes a current-starved voltage-controlled circuit configured to adjust a first type of signal difference, and a phase-interpolated voltage controlled circuit configured to...
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7301383 |
Circuit for controlling phase with improved linearity of phase change
A circuit for controlling phase includes a first node providing a current responsive to a first clock signal, a first plurality of switch circuits coupled to the first node, a first plurality of...
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7298194 |
Interpolation
A steering current generator for a phase interpolator has a multiplicity of fine phase adjustment current sources, each of which is switchable to direct its current to one or other of two summing...
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7282979 |
Phase shifting device
A phase shifting device includes a signal source; a variable phase shifter; first and second doubling circuits; and a 90-degree phase comparator. An output from the signal source is connected to an...
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7274276 |
Amplifier circuit, gyrator circuit, filter device and method for amplifying a signal
An amplifier circuit comprising a transconductor device connected to a phase shifter section. The phase shifter section has an adjustable phase shift and an impedance at least partially dependent...
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7259606 |
Data sampling clock edge placement training for high speed GPU-memory interface
Circuits, methods, and apparatus for training a phase shift circuit to provide a phase shift for improved data recovery. A specific embodiment of the present invention provides a variable delay...
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7187243 |
Delay circuit
A delay circuit according to embodiments of the present invention capable of operating over a wide range of frequencies is presented. Embodiments of the invention minimize or eliminate parasitic...
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7183828 |
Shift clock generator, timing generator and test apparatus
There is provided a shift clock generator for phase-shifting a shift clock by inserting insertion pulses into the shift clock, wherein an insertion pulse generating section has a compensation...
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7180352 |
Clock recovery using clock phase interpolator
A clock recovery circuit includes a delay locked loop, and a clock phase interpolator circuit. The delay locked loop provides multiple phases of an input clock signal to the interpolator circuit,...
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7167034 |
Arrangement for correcting the phase of a data sampling clock signal during a period of sampling data in a received signal
In a clock phase corrector appropriately correcting the phase of a data sampling clock signal, a series of shift registers responds to respective sampling clock signals to store received data...
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7102404 |
Interpolator circuit
An improved interpolator includes a replica delay line and an interpolated delay edge generator. The replica delay line provides two replica delay edges to the interpolated delay edge generator....
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7088156 |
Delay-locked loop having a pre-shift phase detector
A clock generator for generating an output clock signal synchronized with an input clock signal having first and second adjustable delay lines. The first adjustable delay lines is adjusted...
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7082293 |
Adaptive radio transceiver with CMOS offset PLL
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a...
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7068086 |
Phase correction circuit
There is provided a phase correction circuit capable of detecting a skew between a data signal and a clock signal without requiring a clock signal as pattern data upon initialization. The phase...
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7046064 |
Clock generation with continuous phase
A clock generation system includes an oscillator and one or more clock generators. The oscillator provides inphase and quadrature oscillator signals having a fixed frequency. Each clock generator...
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7038518 |
Method and apparatus for adjusting the phase and frequency of a periodic wave
A delay circuit includes a phase vernier having a plurality of logic components. Each logic component includes a selectable injection input capable of adjusting a phase of an input to the phase...
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6982578 |
Digital delay-locked loop circuits with hierarchical delay adjustment
Fine tuned signal phase adjustments are provided by multiple cascaded phase mixers. Each phase mixer outputs a signal having a phase between the phases of its two input signals. With each...
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6977539 |
Clock signal generators having programmable full-period clock skew control and methods of generating clock signals having programmable skews
Clock signal generators include an integrated circuit chip having a PLL-based or DLL-based clock driver therein. The clock driver is configured to support generation of a plurality of clock signals...
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6914472 |
Phase modulating system
Phase modulating systems and methods for modulating the phase of a signal are based on a digital control signal used to select one of a plurality of carriers having different phase angles. In order...
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6900679 |
Digital phase control circuit
The digital phase control circuit of the present invention is provided with: voltage-controlled delay line VCDL 1 in which differential buffers G 1 -G 10 having a propagation delay time of 160 ps...
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6825644 |
Switching power converter
A switching power converter including a ring oscillator constructed using a plurality of series connected inverters is utilized to generate a plurality of waveforms. A selection circuit, in...
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6765976 |
Delay-locked loop for differential clock signals
A significantly more efficient implementation of a DLL for systems using two separate clock signals, whereby a single DLL circuit is used to provide for locking of both clock signals. According to...
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6756818 |
Voltage-controlled delay line with reduced timing errors and jitters
A voltage controlled delay line having a plurality of delay cells is used to delay a first reference clock by a predetermined delay time to generate an in-phase first delay clock and to delay a...
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6717448 |
Data output method and data output circuit for applying reduced precharge level
A data output method and data output circuit capable of increasing data output speed by reducing clock power while increasing sensing speed are provided. The data output method includes (a)...
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6680636 |
Method and system for clock cycle measurement and delay offset
A clock edge placement circuit for implementing source synchronous communication between integrated circuit devices. The clock edge placement circuit includes a delay line having an input to...
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6677796 |
Method and apparatus for implementing precision time delays
A system and method of implementing precision time delays that provides important and novel improvements over prior techniques of implementing time delays by utilizing a new strategy for selecting...
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6628156 |
Integrated circuit having a timing circuit, and method for adjustment of an output signal from the timing circuit
An integrated circuit has a timing circuit with a power source and a capacitor. The timing circuit outputs an output signal whose time can be adjusted and which has a switching time delayed with...
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6587017 |
Method and apparatus for calibrated phase-shift networks
An apparatus comprising a first calibration circuit and a phase shift network stage. The first calibration circuit may be configured to generate a control signal. The phase shift network stage may...
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6580301 |
Method and apparatus for a clock circuit
An additional clock is delayed from a master clock by 90 degrees to provide needed additional clock edges during a cycle. The need for the additional clock edges arises from the desire to perform a...
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6472921 |
Delivering a fine delay stage for a delay locked loop
A circuit, for use in a delay locked loop, provides a phase-shifted output relative to a first signal. The circuit includes plural current sources, current source switches that are selectable to...
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6411244 |
Phase startable clock device for a digitizing instrument having deterministic phase error correction
A phase stable clock circuit includes a phase gate having track-and-hold (T/H) circuits with each T/H circuit receiving a phase shifted continuous sinusoidal signal of predetermined phase and a...
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6404255 |
Phase shift apparatus
A source ( 20 ) provides an input signal (S 1 ) to be phase shifted and a combining circuit ( 24 ) concurrently combines first (A), second (B) and third (C) intermediate signals derived from the...
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6393083 |
Apparatus and method for hardware implementation of a digital phase shifter
An apparatus and method for an improved hardware implementation of a digital phase shifter which provides a simplified process for phase correction of digital signals and eliminates the use of a...
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6392462 |
Multiphase clock generator and selector circuit
A multiphase clock generator includes oscillator, selector circuit and frequency divider circuit. The oscillator generates a first multiphase clock having a first phase difference. The selector...
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6388485 |
Delay-locked loop circuit having master-slave structure
A delay-locked loop (DLL) circuit having a master-slave structure wherein the DLL circuit includes a master delay loop and a slave stage. The master delay loop delays an external clock signal by a...
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6370200 |
Delay adjusting device and method for plural transmission lines
In simultaneous transmission of a signal using plural transmission lines, a synchronous cycle is set, plural signals A, B, C and D are simultaneously transmitted to the plural transmission lines,...
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6294938 |
System with DLL
A system (50) has a shifting delay circuit (60) which provides a variable delay for delaying a source clock and a delay locked loop (DLL) (70) which includes a delay line (72) which provides a...
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6255877 |
Wide range, variable phase shift circuit
A filter includes an FET and a capacitor in a phase shift network wherein the FET operates as a variable resistor. An impedance multiplier is coupled to the FET for increasing the range of...
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6194938 |
Synchronous integrated clock circuit
A synchronous integrated circuit clock circuit is disclosed. The clock circuit (200) receives a system clock (CLKX) and in response thereto, generates an internal clock (CLKI) that is shifted...
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