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7414438 |
Clock based voltage deviation detector
The clock based voltage deviation detector of the present invention includes a pulse module, an indicator module and a correlation module. The pulse module generates a stream of reset pulses as a...
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7383370 |
Arbiter circuit and signal arbitration method
An arbiter circuit ( 100 ) can include a latch circuit ( 102 ) that latches competing input signals (MATCH 1 and MATCH 2 ) to generate signals on latch output ( 110 - 0 and 110 - 1 ). A filter...
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7225283 |
Asynchronous arbiter with bounded resolution time and predictable output state
An arbiter circuit ( 100 ) can include a latch ( 106 ) that latches competing input signals (Req_A and Req_B) to generate latch output signals (latn 1 and latn 2 ). A filter section ( 108 ) can...
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7039824 |
Calibrating return time with cross-coupled arbiter/delay circuits to compare clock signals
Calibrating return time includes determining clock calibration information based on clock signals local to a master device and return clock signals corresponding to each of at least two slave...
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6781418 |
Arbiter/pulse discriminator circuits with improved metastable failure rate by delayed balance point adjustment
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to arbitrate a plurality of input request signals and present one or more first control signals....
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6774679 |
Semiconductor integrated circuit
In a semiconductor integrated circuit including a phase comparator circuit for a PLL or DLL, overall lock precision of the PLL or DLL is improved by eliminating a dead zone of the phase comparator...
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6617900 |
Arbitrator with no metastable voltage levels on output
An arbiter that includes a phase comparator receiving two input signals. The outputs of the phase comparator are propagated to a first SR type flip-flop. The outputs of the first SR type flip-flop...
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6340901 |
Measurement of signal propagation delay using arbiters
Arbiter circuits placed between two signal path segments on a semiconductor chip to measure the difference in propagation delay between those paths at their beginning and end. Each arbiter circuit...
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6188249 |
Asymmetric arbiter with fast signal path
An asymmetric arbiter provides a fast signal path and a slow signal path. Signals may travel over the fast signal path in substantially less time than it takes for the signals to travel over the...
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6002274 |
Oversampled state machine for jitter tolerant pulse detection
A transmission line sampling circuit for a T1 line is disclosed. A multi phase oscillator is connected to a plurality of state machines which are connected in parallel to a transmission line. The...
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5896048 |
Method for determining active/stand-by mode for use in a duplicated system
An active/stand-by determination method for use in a duplicated system, wherein two elements, one given a priority and the other not given a priority, in the duplicated system operate in an active...
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5838171 |
Low power real-time clock circuit having system and battery power arbitration
A circuit for power arbitration, low battery voltage detection, and the operation of battery backed circuitry for systems in which the system power supply voltage range overlaps that of a battery...
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5714901 |
Hysteretic coupling system
An interconnecting network comprising operational amplifiers, summing ampiers, and hysteretic coupling circuits is disclosed. The interconnecting network responds to signals of interest that may be...
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5568072 |
Circuit indicating the phase relation between several signals having the same frequency
A circuit, indicating the first or last signal activated among n signals, includes flip-flops respectively associated with pairs of signals, a first signal of each pair being applied to a reset...
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5555540 |
ASIC bus structure
A bi-directional ring bus structure is formed on an integrated circuit from a conductive bus and M X:1 multiplexer modules (where M is an integer ≥2), coupled in a point-to-point configuration....
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5539338 |
Input or output selectable circuit pin
A circuit for selecting between two states and using the same pin as an input and an output. On power-up, the pin can be connected to either a grounded resistor (to select the first state) or the...
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5495190 |
Arbiter circuit
An arbiter circuit for determining priority as between two or more competing request signals and applicable for use in a memory system having a number of memories operating independently without...
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5341052 |
Arbiter with test capability and associated testing method
An arbiter based on pairwise mutual exclusion produces an absolute priority signal (G) indicating that one of three or more requests (R 1 , R 2 , . . . R N ) has gained absolute priority over all...
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5315184 |
Self arbitrating auto resettable flag circuit
A flag setting, reading and clearing circuit is described which includes self arbitrating logic to provide priority for the flag setting portion of the circuit over the flag clearing portion. The...
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5266844 |
Timing discriminator circuit and method for determining the arrival order of input signals
The present invention is directed to systems and methods capable of analyzing a wide variety of input signal waveforms to arbitrate their arrival sequence with a high resolution. In an exemplary...
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5148112 |
Efficient arbiter
A logic circuit for use as an arbiter to arbitrate among N devices of a computer system for access to a shared resource. The arbiter generates state variables to represent arbitration win...
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5136180 |
Variable frequency clock for a computer system
A circuit generates a system clock signal. On a first input of the circuit a first oscillating signal is placed. On a second input, a second oscillating signal may be placed. Clock sense logic is...
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5121413 |
Digital pulse processor for determining leading and trailing time-of-arrival
A Digital Pulse Processor (DPP) designed to accept pulsed inputs and produce digital pulse descriptor word (PDW) outputs accepts pulsed signals from three adjacent channelized inputs. The DPP then...
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5065052 |
Arbiter circuit using plural-reset RS flip-flops
This invention is realized, in sum, by providing at least one reset input terminal, aside from a reset input terminal to which a request end signal is supplied, to output stage RS flip-flops of...
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5049766 |
Delay measuring circuit
In a delay measuring circuit (10), an input clock signal (13) is applied to a multitapped delay line (14), the output taps of which are connected to a switch (26) which selects one of the switch...
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4998030 |
Circuit to arbitrate multiple requests for memory access
An asynchronous arbiter circuit processes multiple different address signals that request access to the same memory location during the same memroy cycle. The circuit employs two sets of latches....
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4998027 |
Arbiter circuit
Disclosed is an arbiter circuit for arbitrating a contention between two request signals which simultaneously attain the H (logical high) level indicating a "request". In this arbiter circuit,...
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4980577 |
Dual triggered edge-sensitive asynchrounous flip-flop
An architecture for bistable circuits with minimized sensitivity to metastability events and with improved operation in signal timing, arbitration, and protocol applications. Conventional...
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4916339 |
Signal processing for contact-sensing probe
A probe (12) is connected to an interface circuit (10). The probe (12) has two different types of contact sensors, namely a piezo electric sensor and an electro-mechanical switching sensor. The...
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4894565 |
Asynchronous digital arbiter
An asynchronous digital arbiter circuit suitable for use in computer systems applications requiring fast asynchronous arbitration between two asynchronous inputs. The arbiter resolves which of two...
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4865538 |
Fail safe gas valve drive circuit
A fail safe drive circuit for enabling the relay which in turn opens the valve for supplying gas to a burner is disclosed and includes a pair of field effect transistors both of which must be...
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4864243 |
Method and an apparatus for resolving identical address requests in a dual port circuit device
An improvement to an arbitration circuit in a dual port memory circuit device is disclosed. The arbitration circuit resolves near simultaneous identical address requests on the two ports. The...
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4841178 |
Asynchronous processor arbitration circuit
The invention provides a circuit for arbitrating access to a common resource by a pair of processors using an asynchronous sequential logic circuit. A latch circuit is held in a pseudo-stable state...
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4835422 |
Arbiter circuits with metastable free outputs
A high-speed low-power-consumption two-input arbiter circuit comprises two input inverters, two inverters cross-coupled to form a latch and two additional inverters that drive a difference...
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4815039 |
Fast real-time arbiter
An arbiter (52) is operable to supply an up/down signal (11) and a clock signal (13) to an up/down counter (10) so that the up/down counter (10) can count the difference between read requests (54)...
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4757217 |
Refresh operation control circuit for semiconductor device
This invention provides a refresh operation control circuit for a semiconductor memory device. Two flip-flop circuits respectively temporarily hold a normal read start command signal and a refresh...
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4620118 |
Dual port access circuit with automatic asynchronous contention resolving capability
Two microprocessors, which may be operating asynchronously, share a random access memory (RAM) array; that is, at any one moment of time, either microprocessor can seek access to the RAM but only...
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4611295 |
Supervisory control system for microprocessor based appliance controls
A supervisory control system for microprocessor based appliance controls, the supervisory control system incorporating means for detecting dynamic failure of a microprocessor incorporated in the...
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4596048 |
Optically isolated contention bus
Optical isolation means electrically isolates the electrical network ground of a logical contention bus from a transmitter coupled to the bus and having a local logic ground and a receiver coupled...
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4497068 |
Encoding system for optic data link
Encoding circuitry is provided for optic digital data transmission. A transmitter transmits a pair of timed optic pulses of different duration in response to respective leading and trailing edges...
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4446382 |
Arrangement to time separate bidirectional current flow
The present disclosure describes a circuit arrangement wherein a clock signal generator generates two sets of time-period, separated enable signals and wherein there is controllable first direction...
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4423384 |
Asynchronous multi-port arbiter
The arbitration circuit for granting control of a shared resource to one of a plurality of ports based upon a predetermined scheme of priority includes a plurality of input flip-flops for receiving...
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4420695 |
Synchronous priority circuit
A logic circuit is connected to "n" input terminals having a descending order of priority 1, . . . k, . . . n, and to "n" corresponding output terminals for causing a logical "true" signal to be...
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4419592 |
Bidirection data switch sequencing circuit
Circuit for sequencing asynchronously the direction-indicating signal and the gating signal to bidirectional switch so that the direction-indicating signal is maintained before, during, and after...
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4403192 |
Priority circuit for service request signals
An interlock arrangement in which each service request path comprises two inverter gates between an input and an output with a junction between the gates. Cross-coupling circuits are coupled from...
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4398105 |
Arbiter circuit
An arbiter circuit includes a latch made of two crosscoupled NAND gates, one of which is a Schmitt NAND gate, a difference detector, and two output NOR gates. The output of the latch is coupled to...
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4339808 |
Asynchronous event prioritizing circuit
A prioritizing circuit is provided for arbitrating between asynchronously occurring memory access request and memory refresh request signals to a dynamic RAM memory module. The circuit includes a...
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4315167 |
Self-switching bidirectional digital line driver
A logic driver circuit repowers signals in either direction along a line, without requiring any external direction-control signal. Two back-to-back driver halves each include a gate, an...
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4314164 |
Computer channel access circuit for multiple input-output devices
An access circuit for use in a computer input-output channel. Retriggerable mono-stable multivibrators are used to provide access timing periods during which an input-output device can access a...
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4249093 |
Multiple request arbitration circuit
Multiple usage requests for a common resource, such as a memory system, are given usage priorities by a multiple request arbitration circuit. Priority is given to a predetermined one of the input...
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