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7430140 |
Method and device for improved data valid window in response to temperature variation
A memory architecture and a method of operating the same can provide a substantially constant data valid window (DVW) irrespective of a temperature for the memory device. Generally, a memory device...
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7423466 |
Apparatus for enabling duty cycle locking at the rising/falling edge of the clock
An apparatus for enabling duty cycle locking at the rising/falling edge of the clock includes a counter that receives a gated input clock. A lock detector receives an input clock for generating...
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7411435 |
Duty detection circuit
A duty detection circuit includes an integration circuit for receiving an RCLK signal and an FCLK signal that are internal clock signals generated by a DLL circuit, and generating voltage levels in...
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7397291 |
Clock jitter minimization in a continuous time sigma delta analog-to-digital converter
A digital-to-analog converter adapted for use as a feedback converter in a continuous time sigma delta analog-to-digital converter. The digital-to-analog converter has a discrete time digital...
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7397290 |
Method and relative circuit for generating a control voltage of a synchronous rectifier
A control voltage for a synchronous rectifying transistor is generated with the desired anticipation time. The anticipation time is continuously controlled with a closed-loop technique by comparing...
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7378889 |
Pulse width modulation device with a power saving mode controlled by an output voltage feedback hysteresis circuit
A pulse width modulation device with a power saving mode controlled by an output voltage feedback hysteresis circuit is used in a power supply. The present invention comprises a hysteresis...
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7375563 |
Duty cycle correction using input clock and feedback clock of phase-locked-loop (PLL)
A clock generator corrects the duty cycle of an input clock. The input clock has a poor duty cycle such as less than 50%. The input clock is applied to a phase detector of a phase-locked loop...
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7372312 |
Pulse width modulation generating circuit
A pulse width modulation (PWM) generating circuit includes a first comparator, a first resistor, a second resistor, a third resistor, a fourth resistor, a capacitor, and a diode. The first resistor...
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7368966 |
Clock generator and clock duty cycle correction method
A clock duty cycle correction (DCC) circuit for correcting a clock duty cycle of an external clock includes a phase comparator for comparing a phase of a rising clock with that of a falling clock...
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7352220 |
Measuring average of phase voltage of a frequency converter based on an idealized waveform
A method and arrangement for determining the effective time of a voltage pulse of phase voltage generated by a frequency converter provided with an intermediate voltage circuit, the voltage pulses...
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7320049 |
Detection circuit for mixed asynchronous and synchronous memory operation
A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals,...
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7317341 |
Duty correction device
A duty correction device includes: a duty correction unit having a plurality of duty correction cells for selectively activating the duty correction cells according to a count signal to adjust a...
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7312668 |
High resolution PWM generator or digitally controlled oscillator
A high resolution pulse width modulation (PWM) or voltage controlled output (DCO) generator is disclosed. The resolution is increased over that of the circuit clock by delaying the generated signal...
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7301417 |
Pulse width modulation method and apparatus
Disclosed is a pulse width modulation method and apparatus capable of expressing as many values as possible in a pulse width modulation (PWM) period, while maintaining the center of pulse energy...
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7282977 |
Duty cycle correction device
Enclosed is a duty cycle correction device for correcting a duty cycle of a clock signal output from a delay locked loop circuit. The duty cycle correction device includes a mixer for mixing phases...
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7256632 |
Pulse width modulation (PWM) controlling module and method for adjusting a PWM signal thereof
A pulse width modulation (PWM) controlling module, includes: a PWM controller, a load detector, and an adjusting module. The PWM controller generates a PWM signal that is utilized for controlling a...
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7242233 |
Simplified method for limiting clock pulse width
The present invention provides for correcting excessive pulse widths using incremental delays. The pulse width is evaluated through a correction block and leak detector. An acceptable pulse passes...
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7230466 |
Data strobe signal generating circuit and data strobe signal generating method
Provided is a data strobe signal generating circuit capable of guaranteeing a preamble time (tRPRE). The data strobe signal generating circuit includes: a strobe output driver for outputting a data...
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7148738 |
Systems, devices, and methods for providing control signals
Certain exemplary embodiments comprise a system, comprising: an electrical isolator adapted to couple a processor of a programmable logic controller to a user load; a transistor adapted to provide...
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7138841 |
Programmable phase shift and duty cycle correction circuit and method
A phase shift and duty cycle correction circuit is disclosed herein as comprising a programmable digital to analog converter (DAC), a storage device (e.g., a capacitor), a charge sub-circuit and...
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7132856 |
Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors
A logic circuit performs an internal level conversion function by driving portions of the circuit with different supply voltages. In one embodiment, first and second stage storage circuits are...
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7116916 |
Method and apparatus for compacting data in a communication network
A pulse width of a pulse having a nominal pulse width is modulated in accordance with a digital value to be communicated. The number of clock cycles that the modulated pulse width exceeds the...
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7102388 |
Interface device and information processing system
A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an...
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7091763 |
Clock generation
Clock generation techniques are disclosed to provide clock generation with duty cycle replication. The clock generation techniques may further compensate for clock insertion delays and minimize...
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7088162 |
Circuit generating constant narrow-pulse-width bipolarity monocycles
A mono-cycle generating circuit includes a multiplexer, a pulse generating circuit, and a buffer circuit. The multiplexer receives data of a logical 1 or a logical 0, determines whether to generate...
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7071748 |
Charge pump clock for non-volatile memories
A charge pump clock for a memory device wherein pump clock signals are generated at an adaptive rate. The circuit of the present invention generates clock edges at a minimum of T D seconds apart...
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7019574 |
Circuit and method for correction of the duty cycle value of a digital data signal
According to the invention, a duty cycle correction device is disclosed. The duty cycle correction device corrects the duty cycle value of a data signal as a function of a digital control signal...
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7005898 |
Programmable divider with built-in programmable delay chain for high-speed/low power application
A programmable divider includes a synchronous counter configured to process an input clock signal and produce first output signals in response the input clock signal. A number of logic devices are...
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7002386 |
Self-limiting pulse width modulation regulator
A self-adjusting PWM regulator which minimizes undershoot and overshoot conditions is disclosed. The regulator includes a charge pump, a voltage comparator circuit, and a latch circuit. The input...
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6992517 |
Self-limiting pulse width modulation regulator
A self-adjusting PWM regulator which minimizes undershoot and overshoot conditions is disclosed. The regulator includes a charge pump, a voltage comparator circuit, and a latch circuit. The input...
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6992515 |
Clock signal duty cycle adjust circuit
Systems and methods for independently adjusting a duty cycle of an input clock signal in an IC to compensate for uncertainties and distortions in the logic signals resulting from the logic signals...
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6985018 |
Programmable, multi-turn, pulse width modulation circuit for a non-contact angular position sensor
A multi-turn pulse width modulation (PWM) generator for generating a PWM output corresponding to multiple 360 degree turns. A counter receives a reference signal, and counts a number of cycles of...
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6977522 |
Interface device and information processing system
A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an...
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6928573 |
Communication clocking conversion techniques
A plurality of groups of first flip-flops (group 40 of flip-flops A 1 -An−1 for each of channels CIA-CIC) store input data clocked in response to first clock signals (A-C). First enable signals...
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6927642 |
Duty cycle correction method for frequency synthesis
A duty cycle correction method converts a pair of differential analog signals from an oscillator into an output pulse signal with 50% of duty cycle. The pulse signal has the same frequency as that...
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6919749 |
Apparatus and method for a digital delay locked loop
A circuit and method is shown for digital control of delay lines in a delay locked loop (DLL) system. A pair of multiplexors (MUXes) is used to select output taps from a pair of complementary delay...
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6882196 |
Duty cycle corrector
A device that uses an input clock signal to generate an output clock signal with a desired frequency is provided. The device uses a voltage controlled delay element that outputs a reset signal to a...
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6882189 |
Programmable divider with built-in programmable delay chain for high-speed/low power application
A programmable divider includes a synchronous counter configured to process an input clock signal and produce first output signals in response the input clock signal. A number of logic devices are...
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6879201 |
Glitchless pulse generator
A glitchless T length pulse is generated by coupling a trigger signal and the latched output of a counter. The trigger signal initiates the start of the T length pulse, and the latched output of...
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6861877 |
Circuit to independently adjust rise and fall edge timing of a signal
A circuit to independently control rise and fall delay edge timing of a signal is achieved. The circuit comprises, first, a first delay element and a second delay element. Each of the delay...
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6838919 |
DCVSL pulse width controller and system
A pulse-width controller ( 1800 ) is described. Pulse generators ( 1700 L, 1700 H) are coupled to receive clock signals ( 1320, 1321 ) and configured to extend respective high-time and low-time...
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6833744 |
Circuit for correcting duty factor of clock signal
Circuit for correcting a duty factor of a clock signal, including a phase comparator for detecting a phase difference of an input clock signal having a duty factor to be corrected, and a corrected...
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6831493 |
Duty cycle regulator
A duty cycle regulator derives from an input clock of arbitrary duty cycle, an output clock having an adjustable duty cycle of similar frequency. The duty cycle regulator includes a bistable...
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6815991 |
Clock frequency multiplier
A clock frequency multiplier design is provided. The clock frequency multiplier includes an input stage arranged to receive an input clock signal, a first clock cycle generator stage operatively...
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6812761 |
Selectively combining signals to produce desired output signal
The present invention provides a mechanism for combining programming signals to provide an output signal, the properties of which depend only on selected properties of the programming signals. An...
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6798262 |
Switching regulator control circuit for a PFM control
A switching regulator control circuit for PFM control of a DC-DC converter includes a reference voltage producing circuit, a voltage dividing circuit for dividing an output voltage of the DC-DC...
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6798261 |
Method and apparatus for characterizing switching history impact
A method for characterizing a change in delay induced by a switching history of a circuit includes the steps of generating a first signal having a pulse width that is selectively adjustable, the...
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6777989 |
Generation of synchronized clocks to multiple locations in a system
A system and method for providing synchronous clocking allows for precise control of the phase relationship of the clocking signals to thereby provide accurate duty cycles for proper system...
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6774692 |
Apparatus and method for providing square wave to atomic force microscope
An apparatus and method for providing an input signal having a desired pulse width and amplitude to atomic force miscoscopes (AFMs) for use in nano-lithography are provided. An input signal...
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6771061 |
High speed tester with narrow output pulses
A tester that is well suited for operation at high speeds or with narrow pulses. The tester includes a state based pulse shaping circuit that combines edge signals into a pulsed output signal. The...
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