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7631209 Turning off clock to flip flops  
Exemplary techniques for turning off the clock signal to flip flops are described, which may reduce power consumption by electronic devices. In an implementation, a clock-gating logic turns off the...
7594150 Fault-tolerant architecture of flip-flops for transient pulses and signal delays  
A method and apparatus for a structure of a flip-flop that is tolerant to the noise pulses occurring due to the presence of crosstalk faults by sampling the input data multiple times before and...
7542533 Apparatus and method for calibrating the frequency of a clock and data recovery circuit  
Embodiments of the invention include an apparatus and method for continuously calibrating the frequency of a clock and data recovery (CDR) circuit. The apparatus includes a delay arrangement that...
7509107 Method and apparatus for extending the lower frequency operation of a sampler based VNA  
Circuitry is provided to drive a step recovery diode (SRD) ( 8 ) in a sampler based vector network analyzer (VNA) that allows harmonic samplers ( 10, 11 ) to operate over many octaves. The circuit...
7506126 Detection circuit for mixed asynchronous and synchronous memory operation  
A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device The memory access mode detection circuit receives the memory address signals,...
7486121 System and method for generating two effective frequencies using a single clock  
A method and apparatus are disclosed for generating a second clock signal, having a second effective clock frequency, from a first clock signal, having a first effective clock frequency. Clock...
7487481 Receiver circuit for on chip timing adjustment  
A structure for for maintaining signal integrity between integrated circuits residing on a printed circuit board. The structure has adjustable delay circuitry within the circuits and the adjustable...
7414451 Clock generator for semiconductor memory apparatus  
The clock generator for semiconductor memory apparatus which includes: a first divider; a first delay unit; a second divider; a second delay unit; a duty-cycle corrector; a third divider; a third...
7375566 Clock signal generator  
A clock signal generator includes a quartz crystal multivibrator circuit and a pulse-shaping circuit. The pulse-shaping circuit includes a D trigger. The D trigger includes a Q terminal, a Q′...
7328229 Clock divider with glitch free dynamic divide-by change  
The circuit of this invention performs clock division with dynamic divide-by value change capability. This circuit provides low area and low latency. The clock divider is conventional except for...
7304517 Duty cycle corrector  
A duty cycle corrector, including a first, second circuit and a third circuit is disclosed. The third circuit is configured to obtain a threshold value in response to charge flow that is regulated...
7253661 Method and apparatus for a configurable latch  
A configurable latch is implemented using a configurable pulse generator and a level sensitive (LS) latch. The configurable pulse generator produces either a pulse signal that is aligned with the...
7154316 Circuit for controlling pulse width  
Provided is directed to a circuit for controlling a pulse width which can be adjustable to a next generation standard DRAM such as a high speed DDR2 or DDR3 as well as a high speed graphic DRAM for...
7126396 System for clock duty cycle stabilization  
A clock signal duty cycle stabilization system. The system includes a clock signal duty cycle stabilization circuit having an edge detection circuit and a latch circuit. The edge detection circuit...
7102388 Interface device and information processing system  
A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an...
7081778 Semiconductor integrated circuit related to a circuit operating on the basis of a clock signal  
A semiconductor integrated circuit comprises therein a plurality of logic circuits synchronously designed to operate in synchronization with a clock signal, a first power supply wire for supplying...
7057434 Circuit and method to eliminate startup and shutoff runt pulses from crystal oscillators  
A crystal oscillator circuit which does not produce runt pulses when the oscillator is turned on or off. The circuit includes a crystal oscillator, an integrator which integrates the energy in a...
7053685 Frequency signal enabling apparatus and method thereof  
The present invention discloses a frequency signal enabling apparatus and the method thereof for filtering noises and glitch when entering an operating mode from a power-saving mode. When the pulse...
7039143 Circuit for determining the time difference between edges of a first digital signal and of a second digital signal  
The circuit has a first input for supplying a first signal (S 1 ) to a series circuit made from a plurality of basic elements. Each basic element has a memory (M) for storing the signal level which...
7016284 Method and related circuit for generating a wobble clock and an ATIP clock through a reference clock and a wobble signal  
A method and related circuit for clock generation and recovery utilizes digital components exclusively. The method is used to generate a wobble clock and an absolute time in pre-groove (ATIP) clock...
6946920 Circuit for locking an oscillator to a data stream  
An apparatus comprising a control circuit and a first circuit. The first circuit may be configured to generate a calibration signal in response to an adjustment signal and a first control signal....
6934348 Device for recovering burst-mode optical clock  
Disclosed is a device for recovering a burst-mode clock. The burst-mode clock recovery device includes a delay unit and a logic element. A reference clock is produced by implementing a logic...
6911854 Clock skew tolerant clocking scheme  
A clock skew tolerant clocking scheme addresses both the max-time and min-time problems by using dual transparent pulsed latches operated by complementary phases of the clock signal. According to...
6771104 Switching electronic circuit for random number generation  
A physical random number generator has a bi-stable latch that operates to latch a random number bit in response to a reception of a voltage oscillating signal. When a switching device is in a first...
6771726 Device for the regeneration of a clock signal from at least two synchronization bits  
A device for the regeneration of a clock signal uses a reference clock signal given by an internal oscillator to measure the number of reference clock pulses between the first two synchronization...
6738442 Pulse detection and synchronization system  
A synchronization method and apparatus for detecting and synchronizing asynchronous signal data pulses. The synchronization system passes individual data pulses through two parallel synchronization...
6707331 High speed one-shot circuit with optional correction for process shift  
A one-shot circuit provides a pulse on receipt of a first edge, and removes the pulse after a delay generated by a delay chain. However, a second, opposite edge resets the circuit without an...
6633605 Pulse code sequence analyzer  
A pulse code analyzer for analyzing data transmitted by transmitter/receivers on a transmission facility interconnecting the transmitter/receivers. The analyzer apparatus has a data converter with...
6608514 Clock signal generator circuit and semiconductor integrated circuit with the same circuit  
A clock signal generator circuit comprises an off-chip driver, a first clock control circuit for outputting a first internal clock signal Tu synchronizing with an external clock signal CK, a second...
6608513 Flip-flop circuit having dual-edge triggered pulse generator  
A pulse generator system includes a plurality of buffers at least two transmission gates. The inverters successively and input insert delays into an signal having a series of pulses, each pulse...
6600355 Clock generator circuit providing an output clock signal from phased input clock signals  
A clock generator circuit accepts phased input clock signals having an input clock frequency, and generates from the phased signals an output clock signal having low jitter and a clock frequency...
6552588 Method and apparatus to generate pseudo-random non-periodic digital sequences  
One embodiment of the present invention provides a system for generating a pseudo-random non-periodic digital sequence. The system operates by receiving a non-periodic signal at a data input of a...
6535044 Clock signal generator  
A clock signal generator for generating a clock signal with minimum phase jitter at a clock signal generator output ( 41 ), the clock signal generator ( 1 ) having: a DT oscillator ( 4 ) which is...
6507230 Clock generator having a deskewer  
A clock generator having a deskewer is disclosed. The clock generator includes a waveform generator and a deskewer. Clocked by an input clock signal, the waveform generator generates a waveform...
6452426 Circuit for switching between multiple clocks  
A circuit to synchronously select one of the multiple clocks is presented. In one embodiment the selection circuit consists of four main blocks. These are the stable selects block, the decoder...
6441656 Clock divider for analysis of all clock edges  
A method for dividing a high frequency clock signal for analysis of all clock edges has been developed. The method includes receiving a high frequency clock signal and dividing it up into multiple...
6411135 Clock signal switching circuit  
A clock signal switching circuit that switches between two clock signals having a phase difference. The clock signal switching circuit includes a first selector that selects one of the clock...
6407595 Digital clock throttling means  
A digital clock throttling device, for gating a clock signal of a circuit, at least includes an accumulator and a gating circuit. The accumulator responsive to a throttling value generates a first...
6407612 Method and system for suppressing input signal irregularities  
An input signal latching circuit for suppressing the effect of any ringing or other irregularities that occur within a specified time period after a transitional voltage level is reached, without...
6404243 System and method for controlling delay times in floating-body CMOSFET inverters  
The present invention discloses a floating body architecture CMOSFET inverter with body biasing inverters added for controlling the delay time of the inverter. At least one body biasing inverter is...
6362671 Device for the regeneration of a clock signal  
A device for the regeneration of a clock signal from an external serial bus includes a ring oscillator and counter. The ring oscillator provides n phases of a clock signal. Of these n phases, one...
6362694 Method and apparatus for providing a ring oscillator  
A circuit for generating a clock signal is provided. The circuit includes a flip-flop having a first input and a second input. The flip-flop is operable to generate a first output signal and a...
6326823 Clock control circuit  
A simplified clock control circuit in which noise and consumed electric power is reduced. When an output signal of a first flip-flop becomes "H" by input of a starting signal, an output signal of a...
6316982 Digital clock with controllable phase skew  
A method and apparatus for generating an output clock signal having a frequency f O derived from a reference clock signal having a frequency f R , such that ##EQU1## is satisfied, wherein M and N...
6307412 Clock monitor circuit and synchronous semiconductor memory device utilizing the circuit  
A clock monitor circuit includes a first and second delay and clock signal generating unit for receiving a clock signal and an inverted clock signal, respectively. The first and second delay and...
6307413 Reference-free clock generator and data recovery PLL  
An apparatus comprising a first circuit, a second circuit and a logic circuit. The first circuit may be configured generate a first output signal having a first data rate and in response to (i) an...
6249192 Clock injection system  
A tuning signal is injected into an LC tank circuit oscillator, e.g., through an impedance (either reactive, inductive, capacitive and/or resistive) to tune the phase and/or frequency of the LC...
6249160 Clock reproduction and identification apparatus  
In a clock reproduction and identification device, a clock extraction circuit extracts a transmission line clock from input data and a phase synchronization section reproduces an identification...
6246276 Clock signal cleaning circuit  
A device which reduces jitter and narrows the frequency spectrum of a jitter-ridden clock signal includes a basic unit having a plurality of series connected delay elements outputs from each delay...
6239626 Glitch-free clock selector  
A pair of synchronized clock sources provides phase and frequency synchronous first and second clocks accompanied by first and second control signals to a clock selection circuit having a data...
Matches 1 - 50 out of 250 1 2 3 4 5 >