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7594150 Fault-tolerant architecture of flip-flops for transient pulses and signal delays  
A method and apparatus for a structure of a flip-flop that is tolerant to the noise pulses occurring due to the presence of crosstalk faults by sampling the input data multiple times before and...
7583459 Method and apparatus for write precompensation in a magnetic recording system  
A phase interpolator is provided that, in one implementation, includes an output node, a plurality of phase input circuits, and a plurality of switches corresponding to the plurality of phase input...
7558357 Systems and methods for reducing frequency-offset induced jitter  
Methods and apparatus nullify an intrinsic jitter component in a digital clock recovery circuit induced by a time base frequency difference between an incoming data signal and a local...
7542533 Apparatus and method for calibrating the frequency of a clock and data recovery circuit  
Embodiments of the invention include an apparatus and method for continuously calibrating the frequency of a clock and data recovery (CDR) circuit. The apparatus includes a delay arrangement that...
7539243 Method and system for low-power integrating decision feedback equalizer with fast switched-capacitor feed forward path  
A method and system for decision feedback equalization for digital transmission systems is provided. Low-power integrating decision feedback equalization with fast switched-capacitor paths are...
7519750 Linear burst mode synchronizer for passive optical networks  
The present invention discloses a host receiver synchronizer for passive optical networks, and in particular a burst clock data recovery circuit in a host receiver in a bursty asynchronous...
7486121 System and method for generating two effective frequencies using a single clock  
A method and apparatus are disclosed for generating a second clock signal, having a second effective clock frequency, from a first clock signal, having a first effective clock frequency. Clock...
7436232 Regenerative clock repeater  
A regenerative clock repeater comprises an edge detector and an output driver means to produce the clock signal by recovering its high logical level and low logical level. The output driver means...
7429883 Oscillator configured to complete an output pulse after inactivation  
An oscillator includes an oscillating block for generating a control signal in response to an enable signal, wherein the control signal is periodically toggled and a feedback block for receiving...
7397291 Clock jitter minimization in a continuous time sigma delta analog-to-digital converter  
A digital-to-analog converter adapted for use as a feedback converter in a continuous time sigma delta analog-to-digital converter. The digital-to-analog converter has a discrete time digital...
7359461 Apparatus and method for recovering clock signal from burst mode signal  
There are provided an apparatus and method for recovering a clock signal from a burst mode signal. A first delay delays an input data signal for half of a time period of the input data signal, and...
7352816 Data oversampling via clock and data interpolation  
An oversampling delay is provided between clock and data signals by steering a current between first and second nodes. The first node is coupled to an input differential pair of a clock...
7315591 Reproduced signal waveform processing apparatus  
A reproduced signal waveform processing apparatus is provided. The apparatus includes an A/D converter for sampling a reproduced signal at a reproducing clock having a predetermined oscillation...
7284145 Clock control circuit and integrated circuit  
A clock management control circuit of the present invention is a clock control circuit for supplying a valid clock signal to a target circuit in accordance with a system clock signal. When a valid...
7253671 Apparatus and method for compensating for clock drift in downhole drilling components  
A precise downhole clock that compensates for drift includes a prescaler configured to receive electrical pulses from an oscillator. The prescaler is configured to output a series of clock pulses....
7242233 Simplified method for limiting clock pulse width  
The present invention provides for correcting excessive pulse widths using incremental delays. The pulse width is evaluated through a correction block and leak detector. An acceptable pulse passes...
7236551 Linear half-rate phase detector for clock recovery and method therefor  
There is a clock recovery circuit to correct the timing relationship between a data signal and clock signal. The clock recovery circuit comprises a phase detector having an input for receiving a...
7227396 Clock signal input/output device for correcting clock signals  
The invention relates to a clock signal correction method, and to a clock signal input/output device into which a clock signal or a signal obtained therefrom is input and transmitted to a frequency...
7184502 Circuit arrangement for recovering clock and data from a received signal  
A circuit arrangement to recover clock and data from a received signal comprises an electronic commutator for sampling the received signal in such a way that several sampling values of a bit cell...
7078942 Driving apparatus for generating a driving current using PWM  
A current driving apparatus includes a first square wave generator ( 100 ), a second square wave generator ( 200 ), an FET (Field Effect Transistor) ( 3 ), and a power supply ( 9 ). The first...
7076177 Bit-rate independent optical receiver and method thereof  
A bit-rate independent optical receiver and a method thereof. In the bit-rate independent optical receiver, an optoelectric converter converts an input optical signal to an original electrical...
7065132 Memory-free retimer  
A method of transmitting digital signals which are passed via a communication system by means of a retimer between an input and an output, whereby according to the invention the data packet applied...
7057434 Circuit and method to eliminate startup and shutoff runt pulses from crystal oscillators  
A crystal oscillator circuit which does not produce runt pulses when the oscillator is turned on or off. The circuit includes a crystal oscillator, an integrator which integrates the energy in a...
7053685 Frequency signal enabling apparatus and method thereof  
The present invention discloses a frequency signal enabling apparatus and the method thereof for filtering noises and glitch when entering an operating mode from a power-saving mode. When the pulse...
7049869 Adaptive lock position circuit  
An adaptive lock position circuit includes a jitter distribution extremity detector and a phase shifting circuit. The jitter distribution extremity detector receives an input data signal and is...
7034723 Timing comparator, data sampling apparatus, and testing apparatus  
A data sampling apparatus includes plural stages of first variable delay elements for sequentially delaying a data signal by a first delay amount, plural stages of second variable delay elements...
7033090 Lenticular-printing calibration targets  
Calibration targets are generated for lenticular printing. A method involves generating a square wave at a frequency determined by a target pitch for the lenticules. Then filtering the square wave...
6987410 Clock recovery circuit and communication device  
A clock recovery circuit includes plural stages of first variable delay elements for sequentially delaying a data signal by a first delay amount, plural stages of second variable delay elements for...
6987824 Method and system for clock/data recovery for self-clocked high speed interconnects  
A method and system is provided for clock/data recovery for self-clocked high speed interconnects. A data signal is received and then equalized. The equalized data signal then provides the trigger...
6947494 Bit rate control apparatus and method of optical receiver  
A bit rate control apparatus having a delay unit for delaying an input signal received in an optical receiver in an optoelectrically-converted state; a DC level outputting unit for exclusively...
6937078 Circuit configuration for regenerating clock signals  
A circuit configuration regenerates clock signals. The circuit configuration includes an input differential amplifier, first and second inverters, and an offset compensation circuit. The input...
6934348 Device for recovering burst-mode optical clock  
Disclosed is a device for recovering a burst-mode clock. The burst-mode clock recovery device includes a delay unit and a logic element. A reference clock is produced by implementing a logic...
6911854 Clock skew tolerant clocking scheme  
A clock skew tolerant clocking scheme addresses both the max-time and min-time problems by using dual transparent pulsed latches operated by complementary phases of the clock signal. According to...
6903587 Clock data recovery circuit with improved jitter transfer characteristics and jitter tolerance  
A clock extracting part has a first phase comparator circuit, a first up/down counter, a weighting circuit, a charge pump and a low-pass filter forming a voltage value determining part, and a...
6891417 Circuits and methods for alignment of signals in integrated circuits  
Circuits and methods align an internal signal with an external signal. A phase lock loop network receives the external signal to generate phase lock loop signals. A programmable ratio decoder...
6867659 Method and apparatus for filtering a clock signal  
A method and an apparatus are provided for filtering a substantially square wave signal. At least a portion of the substantially square wave signal is applied to a first filter adapted to pass a...
6864735 Circuit and method for regenerating reset and clock signals and high-speed digital system incorporating the same  
An apparatus and method for regenerating reset and clock signals and a high-speed digital system using the apparatus and method are provided. In the regenerating circuit of the invention, a clock...
6862483 Apparatus for changing pulse width modulation at desired timing  
A device generating a pulse signal includes at least one first register which stores waveform data therein, a pulse signal generation unit which generates a pulse signal in accordance with the...
6844791 Digital pulse shaper with variable weighting function  
A method of providing real time digital pulse shaping includes: receiving a digital pulse input signal ( 31 ); applying the digital pulse input signal to first ( 33, 34, 35 ) and second ( 32, 36,...
6791393 Anti-jitter circuits  
An anti-jitter circuit has an integrator storage capacitor. A charge pump derives from an input pulse train at least one charge packet during each cycle of the input pulse train and supplies the...
6791386 Clock controlling method and circuit with a multi-phase multiplication clock generating circuit  
A clock control circuit comprises a control circuit 102 for outputting a control signal for adding or subtracting a phase to a reference clock, which is an input clock or a clock generated from...
6771104 Switching electronic circuit for random number generation  
A physical random number generator has a bi-stable latch that operates to latch a random number bit in response to a reception of a voltage oscillating signal. When a switching device is in a first...
6771726 Device for the regeneration of a clock signal from at least two synchronization bits  
A device for the regeneration of a clock signal uses a reference clock signal given by an internal oscillator to measure the number of reference clock pulses between the first two synchronization...
6768133 Semiconductor device, test method for semiconductor device, and tester for semiconductor device  
The present invention comprises: a plurality of output terminals through which a signal from an internal circuit is output; buffer circuits, each provided between one of the plurality of output...
6762630 Integrated circuit having a synchronous and an asynchronous circuit and method for operating such an integrated circuit  
An integrated circuit has a synchronous circuit and an asynchronous circuit. A clock-controlled input register circuit and an output register circuit for storing data are each connected to the...
6731149 Synchronizing circuit for generating a signal synchronizing with a clock signal  
A first delay line for forward pulses and a second delay line for backward pulses are composed of unit delay elements. A state holding section determines the input position of a backward pulse on...
6690224 Architecture of a PLL with dynamic frequency control on a PLD  
An apparatus including a clock generating circuit and a programmable logic circuit. The clock generating circuit may be configured to generate one or more output signals in response to a reference...
6630851 Low latency clock distribution  
A system and method for distributing clock signal information as rising and falling edge signals is disclosed. In one embodiment a first pulse signal includes a pulse generated for the rising edge...
6624676 Asymmetry detection circuit and detection method of same  
An asymmetry detection circuit having a simple circuit configuration capable of realizing reliable detection without dependence on the signal level and capable of realizing high precision asymmetry...
6608514 Clock signal generator circuit and semiconductor integrated circuit with the same circuit  
A clock signal generator circuit comprises an off-chip driver, a first clock control circuit for outputting a first internal clock signal Tu synchronizing with an external clock signal CK, a second...
Matches 1 - 50 out of 367 1 2 3 4 5 6 7 8 >