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9041474 Phase locked loop with bandwidth control  
A phase locked loop (PLL) includes a first loop, a second loop, and a lock detector. The first loop locks a feedback signal having a frequency equal to a fraction of a frequency of an output...
9041443 Digital phase-locked loop using phase-to-digital converter, method of operating the same, and devices including the same  
A digital phase locked loop (DPLL), a method of operating the same, and a device including the same are provided. The DPLL includes a digitally-controlled oscillator configured to change a...
9041442 Semiconductor device and method for driving the same  
A semiconductor device including an integrator circuit, in which electric discharge from a capacitor can be reduced to shorten time required for charging the capacitor in the case where supply of...
9035682 Method and apparatus for single port modulation using a fractional-N modulator  
A method and apparatus for single port modulation of a phase locked loop frequency modulator includes a phase locked loop with a voltage controlled oscillator (VCO) and a integer loop for...
9035683 Circuit for controlling variation in frequency of clock signal  
Disclosed herein is a circuit for controlling a variation in the frequency of a clock signal for blocking an unwanted variation in the frequency of the clock signal. When a frequency variation out...
9030241 PLL frequency synthesizer with multi-curve VCO implementing closed loop curve searching  
A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a...
9024694 Voltage controlled oscillator with a large frequency range and a low gain  
A system is disclosed for a voltage controlled oscillator (“VCO”) having a large frequency range and a low gain. Passive or active circuitry is introduced between at least one VCO cell in the...
9024692 Voltage controlled oscillator band-select fast searching using predictive searching  
A method, an apparatus, and a computer program product are provided. The apparatus tunes a frequency provided by a VCO. The apparatus determines a relative capacitance change associated with a...
9024666 Phase-locked loop device with synchronization means  
A phase-locked loop (PLL) device includes synchronization means suitable for synchronizing a frequency-converted signal produced by a frequency divider of the PLL device, with a reference signal...
9024684 Area-efficient PLL with a low-noise low-power loop filter  
Techniques for reducing noise and power consumption in a loop filter for a phase-locked loop (PLL) are described herein. In one embodiment, a loop filter for a PLL comprises a first proportional...
9025965 Digital phase locked loop having insensitive jitter characteristic for operating circumstances  
Disclosed are a phase locked loop (PLL) of a digital scheme and a method thereof. More specifically, disclosed are a digital phase locked loop having a time-to-digital converter (TDC), a digital...
9019021 Multi-phase voltage-controlled oscillator  
Embodiments provide a multi-phase voltage controlled oscillator (VCO) that produces a plurality of output signals having a common frequency and different phases. In one embodiment, the VCO may...
9020086 Clock data recovery circuit module and method for generating data recovery clock  
A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to...
9019018 Integrated circuit with an internal RC-oscillator and method for calibrating an RC-oscillator  
An integrated circuit (10) has an internal RC-oscillator (20) for providing an internal clock signal (CLI) having an adjustable oscillator frequency. The integrated circuit (10) further comprises...
9018991 Data recovery circuit and operating method thereof  
A data recovery circuit may include a data sampling unit suitable for sampling source data including an edge data using data clocks and an edge clock, a data extraction unit suitable for...
9020088 Digital system and method of estimating quasi-harmonic signal non-energy parameters using a digital Phase Locked Loop  
The present invention proposes a digital system and method of measuring (estimating) non-energy parameters of the signal (phase, frequency and frequency rate) received in additive mixture with...
9019016 Accumulator-type fractional N-PLL synthesizer and control method thereof  
There are provided an accumulator-type fractional N-PLL synthesizer for suppressing the fractional spurious caused by periodically switching a frequency division number of a fractional frequency...
9020089 Phase-locked loop (PLL)-based frequency synthesizer  
This disclosure describes techniques for generating signals that have relatively steep frequency profiles with a phase-locked loop (PLL) circuit architecture. In some examples, the techniques for...
9013216 Digital phase-locked loop  
Disclosed is a digital phase-locked-loop including: a time-to-digital converter (TDC) configured to output a digital bit based on an input clock and a reference clock, in which the TDC includes: a...
9013215 Signal processing apparatus and associated method  
A signal processing apparatus includes: a signal conversion circuit, for performing a signal conversion operation on a reception signal to generate a first output signal according to a first clock...
9015508 Semiconductor device and automobile control system  
Even after power-down, distinction between a transition from a PLL normal-oscillation state and a transition from a PLL self-oscillation is allowed. A semiconductor device includes a first region...
9007132 Oscillation signal generator  
An oscillation signal generator includes a quadrature voltage-controlled oscillator (QVCO), a phase corrector and a frequency adjusting circuit. The QVCO provides multiple oscillation signals...
9007131 Integrated circuit with calibrated pulling effect correction  
A frequency-control circuit includes a phase frequency detector configured to receive a reference frequency signal and generate an output detection signal. The phase frequency detector can be...
9007861 Clock generating circuit, semiconductor device including the same, and data processing system  
A clock generating circuit includes a delay line that generates an internal clock signal, a phase-controlling unit that adjusts a phase of the internal clock signal by controlling the delay line,...
9007105 Hitless switching phase-locked loop  
A PLL includes an oscillator, multiple time-to-digital converters (TDCs) and a system for the remaining functionality. The TDCs measure the oscillator's phase against respective multiple reference...
9007108 Frequency multiplier jitter correction  
A system and method are provided for frequency multiplication jitter correction. The method accepts an analog reference signal having a first frequency, and using the analog reference signal,...
9007109 Automatic loop-bandwidth calibration for a digital phased-locked loop  
A phase-locked loop digital bandwidth calibrator includes a digital loop filter having a gain multiplier memory and a perturbation unit configured to generate a calibration offset signal to...
9000816 Phase locked loop and semiconductor device using the same  
It is an object of the present invention to provide a phase locked loop in which a voltage signal input to a voltage controlled oscillator after a return from a stand-by state becomes constant in...
9001951 Techniques for transferring time information between clock domains  
A circuit includes a logic circuit, first and second storage circuits, a timing detection circuit, and a compensation circuit. The logic circuit generates a digital value in response to a first...
9000815 Fractional spur reduction using controlled clock jitter  
In one embodiment, an apparatus includes a jitter generator configured to receive a reference clock; add jitter to the reference clock; and output the reference clock with the included jitter to a...
8994420 Higher-order phase noise modulator to reduce spurs and quantization noise  
A frequency synthesizer capable of generating a clock signal having reduced digital spurs and reduced jitter is described. An apparatus includes a frequency modulator configured to generate a...
8989333 Clock data recovery method and clock data recovery circuit  
A clock data recovery method includes: integrating an input data signal over a number of cycles of a sample clock to generate an integrated signal; performing a digital process on the integrated...
8989332 Systems and methods for controlling frequency synthesis  
Disclosed are systems and method for controlling frequency synthesizers. A control system can be implemented in a phase-locked loop (PLL), such as a Frac-N PLL of a frequency synthesizer, to...
8988060 Power control system and method  
A system and method for controlling an electrical device is provided. The method comprises receiving three phase power from a source, decomposing signals representative of power in each phase of...
8988121 Method and apparatus for generating a reference signal for a fractional-N frequency synthesizer  
A frequency synthesizing system includes a clock generator to generate a reference clock signal, a frequency doubler to generate a frequency-doubled clock signal in response to rising edges and...
8981824 Phase-locked loop, method of operating the same, and devices having the same  
A method of operating a phase-locked loop (PLL) such as an all-digital PLL includes operations of comparing a reference clock signal with a feedback signal of the PLL and outputting a comparison...
8982974 OFDM clock recovery  
Receiver synchronization techniques (RST), contributing more accurate synchronization of receiver clock to OFDM composite frame combined with much faster acquisition time and better stability of...
8981855 Method and apparatus for drift compensation in PLL  
Aspects of the disclosure provide a phase-locked loop (PLL). The PLL includes a voltage-controlled oscillator (VCO), a detector module, and a ramp module. The VCO has a first capacitor unit and a...
8983016 Circuit, control system, control method, and computer-readable recording medium for recording program  
In order to provide a circuit which can realize high-speed frequency tracking performance while satisfying jitter/wander suppression performance, the circuit controls loop gain of a PLL means,...
8976051 Floating point timer techniques  
Aspects of the present disclosure relate to floating point timers and counters that are used in a variety of contexts. In some implementations, a floating point counter can be used to generate a...
8975975 Spread spectrum clocking method for wireless mobile platforms  
According to some embodiments, a method and apparatus are provided to vary a clock signal frequency for a first time period between a lower limit of a range of problematic frequencies and a...
8975924 Phase frequency detector circuit  
A phase-frequency detector (PFD) circuit is disclosed. The PFD circuit includes a PFD portion adapted to detect frequency and phase difference of two input signals and to generate control signals...
8970254 Systems and methods for frequency detection  
Methods and systems according to one or more embodiments are provided for frequency detection. In an embodiment, a frequency detector is provided that includes a capacitor that discharges or...
8963593 High-frequency signal processing device  
A high-frequency signal processing device having a frequency synthesizer (PLL: Phase Locked Loop) is provided. A control circuit measures oscillation frequencies obtained upon setting a bias...
8963649 PLL with oscillator PVT compensation  
A voltage controlled oscillator (VCO) includes a current controlled oscillator, a voltage-to-current converter, and a sensing circuit. The sensing circuit includes a delay unit, and the sensing...
8964427 Adaptive online filter for DC offset elimination  
A phase angle detector with a PLL, a power converter, and a method for reducing offsets in an input signal, in which an adaptive offset processor selectively removes a DC offset component from the...
8963594 Phase-locked loop circuit  
A phase-locked loop (PLL) circuit is provided. The PLL circuit includes a phase frequency detector (PFD), a first charge pump (CP), a second CP, a first loop component set, a second loop component...
8963750 Time-to-digital conversion with analog dithering  
There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC (20), wherein dithering is built in the digital domain and...
8963592 PLL circuit and phase comparison method in PLL circuit  
A PLL circuit includes a divider configured to generate a divided signal having a cycle of T/M (where M is an integer greater than or equal to two) by dividing an oscillation signal; a phase...
8957735 Phase-locked loop (PLL) circuit and communication apparatus  
According to one embodiment, a phase locked loop (PLL) circuit includes an application unit, a correlator, an integrator and a power supply noise canceller. The application unit applies the test...