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7602386 |
Reference clock signal generation circuit, power supply circuit, driver circuit, and electro-optical device
A reference clock signal generation circuit for generating a reference clock signal for a charge-pump operation which raises or lowers a voltage includes a clock signal generation circuit which...
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7598782 |
Circuit for changing a frequency
A circuit is provided for multiplying a frequency by a cascade formed of a transadmittance having a transfer characteristic and a transimpedance having a transfer characteristic. The...
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7595677 |
Arbitrary clock circuit and applications thereof
A clock circuit includes a waveform generator, a comparison module, and a clock signal module. The waveform generator is coupled to generate a waveform based on a reference oscillation. The...
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7579884 |
Frequency doubler device
A frequency doubler circuit includes first and second arrangements of switches connected to the positive and negative inputs of a comparator, respectively, and arranged in such a way that first and...
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7577231 |
Clock multiplier structure for fixed speed testing of integrated circuits
An on-chip clock multiplier for outputting a fast clock that is approximately a predetermined multiple n of a slow clock. The multiplier utilizing a high-speed oscillator to generate a...
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7546095 |
Frequency multiplier
It is intended to provide a frequency multiplier capable of switching as appropriate among frequency signals having frequencies obtained by multiplying prescribed multiplication numbers with low...
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7535269 |
Multiplier circuit
A multiplier circuit includes a bias circuit which outputs a reference voltage and a bias signal, a first delay circuit which inputs an input signal and outputs a first delayed signal according to...
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7536617 |
Programmable in-situ delay fault test clock generator
A system and method for programmable in-situ launch and capture clock generation is provided. The system provides an efficient and improved manner for delay and signal transition fault testing in...
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7509104 |
Method and apparatus for tuning radio frequency
A double conversion RF tuner includes an up-conversion unit and a down-conversion unit. The up-conversion unit up converts a received radio frequency (RF) signal corresponding to a first frequency...
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7466786 |
Rational number frequency multiplier circuit and method for generated rational number frequency
A rational number frequency multiplier circuit and a method for generating rational number multiple frequency are disclosed. The circuit receives a plurality of input signals having the same...
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7459946 |
Circuit arrangement for generating a reference signal
In a circuit arrangement for generation of a reference signal with an oscillation generator, a phase-controlled filter and a frequency multiplier are arranged downstream from the oscillation...
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7456666 |
Frequency-doubling delay locked loop
A frequency multiplier circuit comprising a delay line receiving at one end thereof a reference clock for generating clock tap outputs from respective ones of a plurality of period matched delay...
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7454301 |
Method and apparatus for predicting system noise
A jitter calculator engine that includes a core effects module, an input/output (I/O) module, and a phase lock loop (PLL) module is provided. The core effects module estimates core jitter caused by...
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7427883 |
High bandwidth phase locked pool (PLL)
A phase locked loop (PLL) is provided. In one implementation, the PLL includes a feedback loop having a frequency multiplier and an integer divider to generate a divided signal. The PLL includes a...
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7414443 |
Frequency multiplier
A device is provided for multiplying the pulse frequency of a pulse train signal. The device includes input means for the signal and means for accessing the signal at points with a predetermined...
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7394299 |
Digital clock frequency multiplier
A digital clock frequency multiplier ( 100 ) for increasing an input frequency of an input clock signal includes a generator ( 102 ) that receives the input clock signal and a high frequency...
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7388412 |
Clock multipliers using filter bias of a phase-locked loop and methods of multiplying a clock
A clock multiplier includes a phase-locked loop (PLL), a bias generator, a counter, a selection circuit, a flip-flop, a phase comparator, a delay controller and a variable delay circuit. The...
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7372310 |
Digital frequency-multiplying DLLs
Digital delay-locked loops (DLLs) and methods are provided for signal frequency multiplication. Analog delay elements of typical frequency-multiplying DLLs are replaced with digital and...
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7366937 |
Fast synchronization of a number of digital clocks
The present invention relates to a method for synchronizing a number of digital clocks to a synchronizing signal, said method comprising generating centrally a reference clock, synthesizing said...
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7340233 |
Integrated circuit and methods for third sub harmonic up conversion and down conversion of signals
An integrated circuit may include a receiver and/or a transmitter that performs third order sub-harmonic conversion. The integrated circuit may include a Gilbert cell active mixer with three or...
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7245164 |
Radio frequency doubler
When a signal of a double frequency is generated from the original signal, conventionally a 90-degree phase-shift circuit is necessary to suppress an output of a DC component and efficiently obtain...
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7236058 |
Low frequency doubler
A circuit and corresponding method for doubling the frequency of an input signal, even when the input signal is of low frequency or a square wave. The input signal is applied to a phase-shifting...
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7236557 |
Counter-based clock multiplier circuits and methods
Clock multiplier circuits and methods use counters to define the positions of the output clock edges. A plurality of counters are each clocked by a count clock relatively much faster than the input...
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7236763 |
Method and apparatus providing improved mixer performance for radio receivers
A mixer circuit ( 50 ) includes a first switching mixer ( 20 A) with a first desired signal input (RF+ and RF−), a first switching signal input (LO+& LO−), and a first output (IF+ and IF−), a...
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7227392 |
Frequency multiplier
A multiplier core outputs a single-phase signal containing a frequency component having a frequency which is an even multiple of the frequency of an input signal. A differential amplifier includes...
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7216279 |
Testing with high speed pulse generator
An integrated circuit, where a hard macro is resident within the integrated circuit. The hard macro receives a clock signal at a frequency that is below the operational frequency of the integrated...
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7212045 |
Double frequency signal generator
A double frequency signal generator to which a synchronization signal having a duty cycle of 1% to 999% is inputted. The synchronization signal is used for triggering of a switching component at...
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7196560 |
Clock frequency multiplier and method for multiplying a clock frequency
A clock frequency multiplier is provided. The clock frequency multiplier comprises a tracking circuit, a pulsing circuit, and a shaping circuit. The tracking circuit receives a clearing signal and...
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7180340 |
Frequency multiplier capable of adjusting duty cycle of a clock and method used therein
Provided is a frequency multiplier including a delay circuit, an XOR gate, and a control circuit and a method of operating such a frequency multiplier to adjust the duty cycle of a clock signal....
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7173464 |
Duty adjustment circuit
In a duty adjustment circuit, a clock signal is frequency-divided to ½ n by a frequency divider. In a first frequency doubler among n cascade-connected frequency doublers, the divided clock...
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7161394 |
Digital phase mixers with enhanced speed
Digital phase mixers with enhanced speed are provided. A phase mixer generates a signal having a phase between the phases of two input signals based on select signals. The propagation delay of the...
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7139546 |
Up-conversion of a down-converted baseband signal in a direct conversion architecture without the baseband signal passing through active elements
A direct conversion circuit that not only down-converts the received modulated signal using a down-converting mixer into a baseband signal, but also, after performing a passive low pass filtering...
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7132863 |
Digital clock frequency doubler
A digital clock frequency doubler for increasing an input frequency of an input clock signal includes an input block, and a generator block. The input block receives the input clock signal, and...
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7134036 |
Processor core clock generation circuits
An invention is provided for generating custom clock frequencies within a processor core. A CPU clock signal propagates through a DLL circuit. Further, a control signal controls the CPU clock...
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7130607 |
Adjusting a programmable mixer
A method for adjusting a programmable mixer of a local oscillation module to reduce local oscillation leakage begins by determining at least one of: DC offset of an input signal of the programmable...
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7119588 |
Circuit for multiplying continuously varying signals
A means for obtaining an output signal which is the sum of the frequencies of two periodic input signals that may vary in amplitude and frequency over time. The apparatus, which provides means for...
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7116144 |
High bandwidth phase locked loop (PLL)
A phase locked loop (PLL) is provided. In one implementation, the PLL includes a feedback loop having a frequency multiplier and an integer divider to generate a divided signal. The PLL includes a...
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7085549 |
Dynamic power sharing zero intermediate frequency (ZIF) mixer and method of forming same
A zero intermediate frequency (ZIF) radio frequency (RF) digital mixer ( 200 ) includes a low noise amplifier (LNA) ( 203 ), a first RF mixer stage ( 205 ) for mixing an RF signal from the at least...
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7075346 |
Synchronized frequency multiplier for multiple phase PWM control switching regulator without using a phase locked loop
A method and circuit for synchronizing an input clock signal with a plurality of internal clock signals in a multiple phase Pulse Width Modulation (PWM) switching power supply without using a Phase...
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7076231 |
Receiver apparatus controlling the power consumption according to the reception signal level
A receiver apparatus is provided with a receiver section including an amplifying stage for amplifying a high frequency signal received by an antenna, a frequency converting stage for converting a...
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7071741 |
Interrupt-based phase-locked frequency multiplier
A method and system utilize a processor's digital timer and two interrupts to form a frequency multiplier. The first interrupt's processing time window is definable by a first number of counts C 1 ...
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7061285 |
Clock doubler
A clock doubler including clock doubling circuitry for generating from a system clock a clock signal having a frequency substantially double that of the system clock and also having a pulse width...
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7031372 |
Multiple user reconfigurable CDMA processor
A circuit consistent with certain embodiments of the present invention has a source of N reference clock frequencies ( 230 ), where N is an integer greater than one. N frequency extender circuits (...
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7031686 |
Image rejection mixer with mismatch compensation
An image rejection mixer (IRM) for rejecting signals having image frequency and, more particularly, a mixer for rejecting signals of image frequency by using mismatch compensation is provided. The...
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7019565 |
Methods and systems for fully differential frequency doubling
Methods and systems for fully differential frequency doubling include receiving a differential input signal having a first frequency, generating a non-inverted or positive output signal having...
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7005900 |
Counter-based clock doubler circuits and methods with optional duty cycle correction and offset
Clock doubler circuits and methods use counters to define the positions of the output clock edges. A plurality of counters are each clocked by a count clock relatively much faster than the input...
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6998941 |
Frequency multiplier
The invention can be used for telecommunications, measuring and other devices in order to produce stable superhigh frequency signals. An IMPATT diode ( 4 ) operating in the cascade break-down mode...
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6999747 |
Passive harmonic switch mixer
A passive harmonic switch mixer is shown that is immune to self mixing of the local oscillator greatly reducing leakage noise, pulling noise, and flicker noise when used in a direct conversion...
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6980036 |
Semiconductor device comprising frequency multiplier of external clock and output buffer of test data and semiconductor test method
In a frequency multiplier and a method of multiplying a frequency of an external clock signal, a data output buffer, and a semiconductor device including the frequency multiplier and the data...
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6977536 |
Clock multiplier
A clock multiplier capable of modulating the duty cycle of the output clock comprises a first clock multiplication circuit, an inverter, a first low pass filter, a second low pass filter and an...
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