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6771098 Data output buffer having a preset structure  
Disclosed is a data output buffer having a preset structure. The data output buffer comprises a plurality of groups, each group having two data output buffers, a preset driver for precharging or...
6770941 Semiconductor device and method of manufacturing a semiconductor device  
The invention provides a method of producing a semiconductor device conforming to plural supply voltage specifications without increasing the chip size and the production cost, while the device...
6771097 Series terminated CMOS output driver with impedance calibration  
A differential line driver includes a plurality of driver cells. Control logic outputs positive and negative control signals to the driver cells so as to match a combined output impedance of the...
6762620 Circuit and method for controlling on-die signal termination  
A system and method allows for multiple modes of termination, including termination by a fixed value that is preprogrammed, and by a variable value that can, for example, be measured and...
6762624 Current mode logic family with bias current compensation  
In one aspect, a circuit system includes a logic circuit and a bias circuit. The logic circuit includes one or more current mode logic gates each of which is operable to steer a respective tail...
6759874 Electronic circuit with a driver circuit  
An electronic circuit has a driver circuit to drive a signal onto a signal line. The driver circuit contains a first switching device with a first forward resistance between a first supply voltage...
6759868 Circuit and method for compensation if high-frequency signal loss on a transmission line  
A circuit and method that maintains the impedance matching characteristics of a common output driver while compensating for the high-frequency signal attenuation inherent in printed circuit board...
6753707 Delay circuit and semiconductor device using the same  
A delay circuit includes an output circuit including first and second output elements. The first and second output elements are connected serially between a first power supply source and a second...
6737886 Low-noise output buffer  
An output buffer for causing a voltage (Vout) of an integrated circuit output line (OUT,OUT_PAD) to switch from a voltage of a first voltage line (VDD) to a voltage of a second voltage line (GND)...
6700418 Output driver having dynamic impedance control  
Disclosed is an input/output (IO) device for transmitting a data bit signal. In one embodiment, the IO device includes an IO device input node for receiving an input data bit signal and an IO...
6693450 Dynamic swing voltage adjustment  
The disclosure presents a device comprising a driver configured to transmit a signal on a bus line, including a driver element configured to pull against termination impedance. The impedance of...
6690211 Impedance matching circuit  
An impedance matching circuit includes a plurality of latch circuits, each connected to one of a plurality of logic circuits. Each latch circuit has a first input commonly connected to a signal...
6686765 GTL&plus driver  
A driver operable with two power supplies, and provides, among other things, a high data communication rate, stabilized operating parameters including voltage output high, voltage output low, and...
6678763 Pulse transmission line control system  
To provide a pulse transmission line control system that can prevent a malfunction of microcomputers included in an apparatus configured by the microcomputers that have a function of decoding an...
6667633 Multiple finger off chip driver (OCD) with single level translator  
A multiple finger off chip driver (OCD) has a single level translator for each of a plurality of PFET fingers and NFET fingers which allow the impedance of the OCD to be varied to match the...
6664805 Switched capacitor piecewise linear slew rate control methods for output devices  
A novel method and apparatus is presented for reducing the slew rate signals on transmission lines of integrated circuits by stepwise ramping up or down the voltage level on the transmission line....
6658053 Pulse shaping for a baseband wireless transmitter  
A method and apparatus for generating a baseband signal from a data pulse to approximate a filter transfer function is disclosed. The method comprises generating the data pulse, generating a...
6643110 Stress-follower circuit configuration  
Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a stress-follower circuit configuration. The stress-follower circuit of the configuration is coupled to...
6642742 Method and apparatus for controlling output impedance  
A method and apparatus for controlling output impedance of an input/output (I/O) circuit. In one embodiment, an I/O circuit includes a first plurality of resistive elements connected in parallel...
6639427 High-voltage switching device and application to a non-volatile memory  
A high voltage switching device includes a switching circuit for switching a high voltage to an output line and for providing a control signal. The high voltage switching device also includes a...
6636073 Semiconductor integrated circuit  
A semiconductor integrated circuit of the present invention includes MOSFETs of at least one of N channel- and P channel-types where at least two MOSFETs included in a plurality of MOSFETs, which...
6636069 Method and apparatus for compensated slew rate control of line termination  
In one embodiment, a high speed bi-directional driver/receiver is provided. When a first component driving data onto a bi-directional bus switches to receiving data from the bus, a second...
6624661 Programmable drive circuit for I/O port  
This specification discloses a programmable drive circuit for the I/O port. Using a logic circuit, the driver on the IC I/O port can be programmed to be an open-drained driver or a push-pull...
6624662 Buffer with compensating drive strength  
A compensating buffer providing both course tuning on initialization and fine-tuning during operation is disclosed. The course tuning is provided by a plurality of binary-weighted driver legs...
6608517 Live-insertion PMOS biasing circuit for NMOS bus switch  
A bus switch has an n-channel bus-switch transistor between two buses and a p-channel pullup transistor. When power is disconnected from the bus switch, and one bus is hot and has a voltage above...
6608505 Ouput buffer circuit  
An output buffer circuit is provided, which is capable of obtaining a large drive power when the level of an input signal changes, while allowing a through current to flow in suppressed amounts. A...
6600347 Dynamically producing an effective impedance of an output driver with a bounded variation during transitions thereby reducing jitter  
A method and system for reducing a reflection coefficient below a predetermined value thereby reducing jitter by the variation of the effective impedance of a driver appearing to be bounded during...
6597199 Method and circuit for logic output buffer  
An output buffer having one or more of the following advantages: (1) faster slew rate, (2) reduced switching noise during signal transitions, and (3) improved switching time. The output buffer...
6586986 Circuit for generating internal power voltage in a semiconductor device  
A circuit for generating internal power voltage comprising: a comparison unit for comparing reference voltage and internal voltage; a buffer unit, its input terminal comprising CMOS inverters, for...
6578156 Output buffer having a plurality of switching devices being turned on successively at shorter time intervals to achieve increasing drive capability using a predriver  
An output drive circuit of an output buffer circuit has a signal output line and first, second and third switching circuits connected to the signal output line at different locations thereof. Each...
6577164 Output circuit for a transmission system  
An output circuit for a transmission system includes an input terminal receiving an input logical signal, a first output terminal outputting a first output logical signal having a logic...
6573753 Microcontroller input/output nodes with both programmable pull-up and pull-down resistive loads and programmable drive strength  
The present invention relates to an input/output node in an electronic device which comprises an input/output pin, a plurality of programmable pull-up resistors and a plurality of programmable...
6566904 Pad calibration circuit with on-chip resistor  
A pad calibration circuit with on-chip resistor. An integrated circuit with an impedance terminated output terminal is disclosed. A source is provided for sourcing current to the output terminal...
6563337 Driver impedance control mechanism  
In one embodiment, a driver impedance control mechanism is adapted for a circuit board. The driver impedance control mechanism comprises (i) an integrated circuit including at least one driver...
6563343 Circuitry for a low internal voltage  
A technique provides an on-chip voltage to a core portion of an integrated circuit by way of a conversion transistor. The on-chip voltage may be a reduced internal voltage, less than the VCC of...
6559676 Output buffer circuit  
An output buffer circuit includes first and second MOS transistors connected in series between a power supply and ground, a first pull up transistor coupled between the power supply and a gate of...
6556048 High speed low skew LVTTL output buffer with invert capability  
A prebuffer circuit configured to generate one or more output control signals in response to one or more current sources and an input signal. The one or more output control signals may reduce a...
6556049 Output driver having output current compensation and method of compensating output current  
An output driver supplying constant output current regardless of output voltage changes. The output driver includes a current source for regulating changes in a voltage of an output terminal...
6542004 Output buffer method and apparatus with on resistance and skew control  
A pre-buffer circuit configured to generate one or more output control signals in response to a bandgap reference based control circuit. The one or more output control signals control output ON...
6541997 Clockless impedance controller  
An impedance controller comprises impedance control logic outputting an adjustable impedance and a comparator comparing the adjustable impedance with a reference voltage. The impedance control...
6538464 Slew rate control  
Controlling the slew rate of a driver circuit. According to one embodiment of the present invention an output buffer includes a driver circuit having an impedance and a pre-driver circuit to...
6531892 Bias voltage generator usable with circuit for producing low-voltage differential signals  
Described are systems for producing differential logic signals and circuits for biasing the voltages of the differential logic signals. These systems can be adapted for use with different loads by...
6518792 Method and circuitry for a pre-emphasis scheme for single-ended center taped terminated high speed digital signaling  
A method and circuitry for pre-emphasizing transmitted logic signals. The method and circuitry may be applied to single-ended center-taped terminated I/O lines. In one embodiment, a driver circuit...
6509778 BIST circuit for variable impedance system  
Disclosed is a programmable impedance driver that includes two sets of impedance devices, two primary counters and two test counters. The primary counters selectively activate individual ones of...
6509757 Binary weighted thermometer code for PVT controlled output drivers  
A binary weighted thermometer code is employed to adjust the output impedance of a variable impedance output driver circuit. The driver circuit includes an impedance network comprising a plurality...
6509765 Selectable resistor and/or driver for an integrated circuit with a linear resistance  
One embodiment of the present invention provides resistor within an integrated circuit with a substantially linear resistance. This resistor includes a diode-connected transistor coupled in...
6489806 Zero-power logic cell for use in programmable logic devices  
Zero-power logic cells are implemented in CMOS technology for forming part of programmable logic devices with minimized static power dissipation. The zero-power logic cells are implemented with...
6489809 Circuit for receiving and driving a clock-signal  
A receiver circuit includes a first circuit having two modes of operation controlled by a feedback loop. The feedback loop is connected to an output of the first circuit, and the modes of...
6472917 Semiconductor integrated circuit device having compensation for wiring distance delays  
A third gate circuit which is controlled by a clock signal and operates upon the detection of change of a signal on a critical path driven by a first gate circuit and transmits a signal provided...
6466055 Integrated circuit buffer system  
An integrated circuit input buffer system includes numerous buffers used to receive input signals. The buffer system controls the buffers in a manner that places some of the buffers in a standby...