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6876229 Method and system for providing bidirectional asynchronous communication  
A communication system for establishing bidirectional, asynchronous communication between a first device and a second device. The system includes first asynchronous encoder logic and second...
6873178 Skewed bus driving method and circuit  
Circuits and methods for driving buses (data buses or address buses) which provide a reduction in interference such as crosstalk between adjacent bus lines of a bus, even as the width of the bus...
6870400 Supply voltage detection circuit  
A supply voltage detection circuit determines when the voltage for any one of the power supply signals received by an integrated circuit device is below its steady state level, as may occur during...
6870399 Bidirectional input/output cells  
A bi-directional input/output (IO) cell for transmitting and receiving data signals simultaneously over a single line. The bidirectional IO cell having an IO node adapted to connect to the line. A...
6864717 Signal transmission system  
A signal transmission system is provided which can accurately recognize data even if two signals are superimposed on each other on the same signal line. The potential of a read signal indicating...
6864711 Programmable array logic circuit whose product and input line junctions employ single bit non-volatile ferromagnetic cells  
A programmable array logic circuit whose temporary memory circuitry employs single bit non-volatile ferromagnetic memory cells. The ferromagnetic memory cells or bits store data even when there is...
6856167 Field programmable gate array with a variably wide word width memory  
A field programmable gate array, an access lead network coupled to the FPGA, and a plurality of memories electrically coupled to the access lead network. The FPGA, access lead network, and...
6856169 Method and apparatus for signal reception using ground termination and/or non-ground termination  
Receiving units with inputs that may be ground-terminated and with inputs that are selectively ground-terminated or non-ground terminated are enabled with signal level shifting and a termination...
6850108 Input buffer  
An input buffer comprises: a pull-up transistor connected between a power supply voltage and an input pad and having a gate to which a control voltage is applied, and a substrate to which a...
6847230 Information handling system featuring a BJT-based bi-directional level translator  
A method of implementing bi-directional level translation in an information handling system includes coupling a first device port via a first resistor to a first voltage. A second device port is...
6842044 Glitch-free receivers for bi-directional, simultaneous data bus  
A structure and method for eliminating glitches at the output of a receiver receiving signals sent to one end of a bi-directional, simultaneous transmission line. The receiver comprises two...
6838907 Supplying logic values for sampling on high-speed interfaces  
A method and circuit that supplies valid logic values at an end of a transmission line for sampling on high speed interfaces, such as HSTL and SSTL, during reset. The circuit may include...
6836143 Seminconductor integrated circuit with termination circuit  
A semiconductor integrated circuit device which includes a termination circuit for terminating a bus line. An impedance control circuit controls impedance of the termination circuit in accordance...
6833734 Line-driver with power down loopback protection  
A line driver selectively drives one of two transmission lines. The line driver includes a differential amplifier connected to first and second differential switches. The first differential switch...
6833732 Output signal circuit capable of automatically detecting polarity  
The present invention proposes an output signal circuit capable of automatically detecting polarity, whose input/output signal terminal of the output signal circuit has both input and output...
6833733 Apparatus for improving bus capacity  
A two-wire serial bus allows bus mastering by any device on the bus utilizing bus pull-ups. In systems with long bus lengths or large numbers of devices, rise times suffer unless accelerated. An...
6825686 Line interface circuit, associated line drivers and methods of operating the same  
A line driver is disclosed comprising a termination portion which includes a termination resistance (R term ) and which is supplied in use by an operational amplifier (op-amp), with a termination...
6822490 Data output circuit for reducing skew of data signal  
In a data output circuit for reducing a skewing error of a data signal, a first inversion unit receives a first data signal of an operating voltage level and inverts the received first data signal...
6819138 Dividing and distributing the drive strength of a single clock buffer  
Devices, methods, and networks that divide and proportionally distribute the drive strength of a clock buffer such that the output drive strength of the clock buffer is divided proportionally among...
6819139 Skew-free dual rail bus driver  
A skew-free dual rail bus driver is provided. The dual rail bus driver includes a first driver outputting first dual signals of the same level, and outputting second dual signals of different...
6815979 Impedance control circuit for controlling multiple different impedances with single control circuit  
An impedance control circuit includes a reference voltage output circuit for outputting one of a plurality of reference voltages; a variable resistor; a comparator and a control circuit. The...
6812742 Electronic device  
An electronic device having a current switch type driver is provided. The current switch type driver includes a differential circuit that supplies a current to a transmission channel according to a...
6812741 Bidirectional signal transmission circuit and bus system  
A bidirectional transmission circuit for inputting/outputting a signal from/onto a bidirectional transmission line includes: a transceiver for transmitting/receiving a signal; a first element...
6813579 Apparatus and method for test mode control  
A test mode control unit of an integrated circuit receives and decodes a test mode signal to perform testing of the integrated circuit. Logical AND operations are performed on the decoded test...
6812740 Low-voltage drive circuit and method for the same  
A low-voltage drive circuit for driving a sensor coil in a coordinate input device at a constant current includes a DC coupling capacitor and a constant-current output bias circuit unit. The DC...
6803790 Bidirectional port with clock channel used for synchronization  
A simultaneous bidirectional port coupled to a bus combines a synchronization circuit and a clock circuit. The synchronization and clock circuit synchronizes the port with another simultaneous data...
6803791 Equalizing receiver with data to clock skew compensation  
A receiver performs on data to clock skew compensation by compensating ISI between signals, the ISI being caused by a bandwidth limitation generated in case of chip-to-chip communications in a...
6798238 Semiconductor integrated circuit  
A semiconductor integrated circuit, comprises a first reference voltage line; a second reference voltage line; a plurality of single logic circuits each including a plurality of transistors; a...
6798245 Current mirror circuit  
A first input transistor of a current mirror, in which one end is connected to a first constant current source and another end is connected to a reference potential (for example, the ground),...
6798234 Apparatus for protecting an integrated circuit formed in a substrate and method for protecting the circuit against reverse engineering  
An apparatus for protecting an integrated circuit formed in a substrate and a method for protecting the integrated circuit against reverse engineering includes an active shield having a signal...
6798256 Resonant buffer apparatus, method, and system  
A buffer circuit includes a resonant circuit. An output of the resonant buffer circuit transitions once for three transitions on an input.
6794899 On chip method and apparatus for transmission of multiple bits using quantized voltage levels  
Multiple level logic bus drivers and receivers communicate over a bus using a multiple-level logic protocol that transfers multiple bits on each signal wire of a bus in a given interval without...
6791358 Circuit configuration with signal lines for serially transmitting a plurality of bit groups  
A circuit configuration has a transmitter unit connected to a first signal line and a receiver unit connected to a second signal line and is coupled to the transmission unit via a third signal line...
6788116 Low voltage differential swing (LVDS) signal driver circuit with low PVT sensitivity  
A low voltage differential swing (LVDS) signal driver having a constant output differential voltage (Vod) over variations in circuit fabrication processes, power supply voltages and operating...
6788586 Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same  
Described herein is an output buffer including an output stage formed by a pull-up transistor and a pull-down transistor, which are connected in series between a supply line set at a supply...
6781422 Capacitive high-side switch driver for a power converter  
The present invention discloses a capacitive high-side switch driver for a power converter. The capacitive high-side switch driver according to the present invention includes an inverter and two...
6774674 Semiconductor device  
A high-potential side power device driving circuit has a clock signal generation circuit generating the so-called internal clock signal by outputting a pulse in a constant cycle for driving NMOS...
6768346 Signal transmission system  
A signal transmission system includes a first circuit block having a first output circuit for producing a first signal, a plurality of second circuit blocks each including a first receiving circuit...
6759871 Line segmentation in programmable logic devices having redundancy circuitry  
Methods and apparatus for segmenting lines in programmable logic devices having redundancy circuitry. A programmable logic device includes a first plurality of logic array blocks. The first...
6756815 Input buffer with selectable operational characteristics  
The disclosed embodiments relate to an input buffer circuit. The input buffer circuit comprises a first input buffer having a first operational characteristic and a second input buffer having a...
6747476 Method and apparatus for non-linear termination of a transmission line  
An active termination circuit for clamping a signal on a transmission line in an electronic device is described. The active termination circuit is configured to clamp the signal on the transmission...
6747487 Gate coupled voltage support for an output driver circuit  
A method and apparatus for supporting a voltage in an output driver circuit and smoothing the response of the voltage to switching operations in the output driver circuit. A capacitive element is...
6744276 Serial digital audio data port with multiple functional configurations  
A bidirectional serial port for digital audio data includes a cable connector for coupling the port to a cable, a cable driver having a serial digital audio signal as an input and also having an...
6744287 Slew rate control circuit  
A bi-directional communication system includes a driver capable of controlling a slew rate of transmitted data signals. Impedance matching can be provided to match an impedance of a driver circuit...
6744277 Programmable current reference circuit  
A programmable current reference circuit is described. The programmable current reference circuit includes a programmable resistance, where the programmable resistance is programmable to provide...
6741099 Transistor driver circuit  
The invention is related to methods and apparatus for driving transistors. One embodiment includes a driver circuit that can drive power transistors at relatively high switching speeds, which can...
6737891 Tri-directional, high-speed bus switch  
A tri-directional, high-speed switching element connects to a bus port, an A memory port, and a B memory port. A first FET switch” source is connected to the bus port, and a second FET switch”s...
6731137 Programmable, staged, bus hold and weak pull-up for bi-directional I/O  
The present invention encompasses a bus hold and weak pull-up circuit. A resistor having a first node and a second node is coupled to a bi-directional I/O pin at the first node. The weak pull-up...
6731141 Low supply voltage line driver  
A line driver provides an output signal onto an output. The line driver includes a first current driver coupled to a first terminal of the output. The first current driver is capable of providing a...
6727730 High speed on-chip signaling system and method  
An improved signaling system and method are provided that uses transconductance signaling rather than voltage or current signaling. A transient voltage applied to a first end of a conductor can...