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7551897 |
Method and apparatus for performing transmit pre-emphasis
A pre-emphasis circuit and methods are provided. The circuit includes a first amplifier and a second amplifier. The first amplifier contains M first driver cells and is operable to amplify a...
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7548094 |
Systems and methods for on-chip signaling
Systems and methods for on-chip signaling are disclosed. In some embodiments, an integrated circuit having on-chip signaling between a first component and a second component includes, a...
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7541835 |
Circuit technique to achieve power up tristate on a memory bus
Techniques and circuits for ensuring undefined control signals are not inadvertently driven onto a bus due to core logic and I/O logic supply voltages reaching final voltage levels at different...
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7538582 |
Driver circuit, test apparatus and adjusting method
A test apparatus for testing a device under test is provided. The test apparatus includes a test signal generating section for generating a test signal to be provided to the device under test, a...
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7535257 |
Receiver circuit, interface circuit, and electronic instrument
A receiver circuit includes: a current/voltage conversion circuit which performs a current/voltage conversion based on current which flows through the differential signal lines and outputs voltage...
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7535258 |
Programmable current output and common-mode voltage buffer
A buffer for a programmable logic device has programmable current sink and source circuitry and an independently programmable common-mode voltage reference source. An amplifier, responsive to a...
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7532047 |
Mixed-voltage input/output buffer
A mixed-voltage I/O buffer comprises an input circuit, an output circuit, an I/O pad, a pre-driver circuit coupled to the output circuit, two added coupled N-type transistors, and a dynamical...
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7532035 |
Address transition detector for fast flash memory device
An address transition detector circuit includes an input node, an output node, a bandgap reference node, and P bias and N bias nodes having voltages derived from the bandgap reference node. First...
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7525371 |
Multi-threshold CMOS system and methods for controlling respective blocks
A multi-threshold CMOS system and method controls a state of respective blocks individually. Each block includes a logic circuit having a logic transistor and a control transistor connected between...
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7521966 |
USB 2.0 transmitter using only 2.5 volt CMOS devices
A USB transmitter 3.3V output stage includes a PMOS cascode transistor connected between a PMOS pullup transistor and a USB port data pin, an NMOS cascode transistor connected between an NMOS...
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7521956 |
Methods and apparatus for adaptively adjusting a data receiver
Methods are provided to reduce offsets and timing skews in data signals captured in a data receiver by adaptively adjusting a transition threshold of the data receiver. A set of adjustment vectors...
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7518403 |
Two-stage level shifting module
For raising low voltage levels of a voltage range without over-broadening the voltage range, a first stage voltage level shifting circuit, which is capable of raising an upper bound of its input...
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7518409 |
Input stage of semiconductor device with multiple pads of common function, and multi-chip package having the same
An input stage of a semiconductor device includes at least two pads, input buffers, a current source, and a logic operation circuit. The at least two pads, to which the input buffers respectively...
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7514962 |
Configurable I2C interface
A synchronous serial data two-wire communications bus that can transfer data at rates up to 100 kbit/s (standard mode), 400 kbits/s (fast mode), or 3.4 Mbit/s (high-speed mode). The load of I2C bus...
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7515486 |
Multimode data buffer and method for controlling propagation delay time
A data buffer, such as a data strobe input buffer or a data input buffer, which may operate in multiple modes, such as a single mode (SM) and a dual mode (DM) and where the mode is selected by...
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7515669 |
Dynamic input setup/hold time improvement architecture
A new method to sample a digital input signal is achieved. The method comprises sampling a digital input processed through a first digital buffer. The sampling is at the rising edge of a system...
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7511649 |
Circuit for converting a voltage range of a logic signal
In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output...
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7508235 |
Differential line termination technique
A technique for terminating a differential signal line substantially matches the output impedances of a first node and a second node of a differential node. The power dissipation is substantially...
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7501859 |
Differential signaling system with signal transmission interruption following error detection
A differential signaling system in which errors in signal transmission or reception, or both, can be detected to allow signal transmission to be interrupted and thereby prevent further erroneous...
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7501898 |
Method and apparatus for generating an optimized reference current threshold
In one embodiment, apparatus is provided with current optimization logic, a programmable current source for generating a reference current threshold, and current programming logic. In response to a...
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7495466 |
Triple latch flip flop system and method
A triple latch flip flop system and method are disclosed. In one embodiment, triple latch flip-flop system includes a pull up latch, a pull down latch, a primary latch and an output. The pull up...
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7495475 |
Drive circuit
A drive circuit includes a load circuit, first and second series circuits, a bias circuit, and first and second voltage applying units. The load circuit is arranged between first and second nodes....
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7495474 |
Integrated circuit device and electronic instrument
An integrated circuit device includes a first transfer mode first transmitter circuit including first and second transmission drivers and a second transfer mode second transmitter circuit including...
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7492193 |
Driver circuit
A driver circuit that prevents amplitude reduction at a high temperature comprises a differential pre-buffer circuit 22 for performing signal clamping by diodes 16 and 17 each having a...
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7492189 |
Current mode bus interface system, method of performing a mode transition and mode control signal generator for the same
A current mode bus interface system includes a host interface device configured to transmit a reference current and a clock current, and to transmit a data current during a first transfer mode, and...
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7489166 |
Gate drive for lower switching noise emission
A gate drive circuit for driving the gate of a power transistor switch comprising a gate drive sourcing circuit supplying gate drive current to the power transistor switch, the gate drive sourcing...
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7486116 |
Driver device, in particular for a semiconductor device, and method for operating a driver device
The invention relates to a driver device and a method for operating a driver device in particular for a semiconductor device. The driver device includes a signal driver connected to a supply...
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7482837 |
System and method for combining signals on a differential I/O link
System and method for combining signals on a differential signal provided over a communication link. In one aspect, a system for providing a differential communication link includes a signal...
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7482832 |
Termination circuit and semiconductor device comprising that termination circuit
A termination circuit that adjusts differences in the resistance values of wiring-layer resistance and transistor ON resistance so that a desired termination resistance value is obtained. A...
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7482845 |
Output buffer circuit
Provided is an output buffer circuit having a slew rate increasing part configured with a switching element. The output buffer circuit can obtain an output voltage having a high slew rate even...
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7482838 |
High-speed differential receiver
A high-speed differential receiver is used between a high voltage domain and a low voltage domain. The high-speed differential receiver includes a common mode differential amplifier coupled to a...
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7479804 |
Interface device and information processing system
A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an...
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7480167 |
Set programming methods and write driver circuits for a phase-change memory array
Exemplary embodiments of the present invention provide set programming methods and write driver circuits for a phase-change memory array. An exemplary embodiment of a set programming method may...
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7477068 |
System for reducing cross-talk induced source synchronous bus clock jitter
A first clock signal of frequency F is used to couple data to an off-chip driver (OCD) using a master/slave flip flop (FF), wherein the master latch is clocked with the first clock signal and the...
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7477082 |
Method and circuit for driving H-bridge that reduces switching noise
An H-bridge drive circuit for reducing switching noises while preventing shoot-through current from flowing in the H-bridge circuit. The H-bridge drive circuit includes an H-bridge circuit for...
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7477075 |
CMOS output driver using floating wells to prevent leakage current
An I/O buffer circuit including: a driver circuit containing a pull-up device in a first floating well and a pull-down device in a second floating well; a first and second biasing circuits to bias...
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7474124 |
Electronic circuit for maintaining and controlling data bus state
The inventions herein are directed to an inventive bus keeper and logic circuit for use with an I/O circuit, for example, for use on the receiver side of the I/O buffer circuit. The inventive...
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7468617 |
Electrostatic discharge (ESD) protection device for use with multiple I/O standards
In one aspect, the present invention comprises an electrostatic discharge (ESD) protection circuit comprising a plurality of input circuits in which each input circuit comprises a first PMOS and a...
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7468616 |
Circuit for and method of generating a delay in an input/output port of an integrated circuit device
A circuit for generating a delayed output in an input/output port of a device adapted to implement circuits operating on a range of voltages is disclosed. The circuit comprises a first terminal of...
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7456655 |
System and process for overcoming wire-bond originated cross-talk
A system and process overcomes the influence of induced current and/or capacitance in wires and, more particularly, reduces and overcomes induced current and/or capacitance cross-talk between...
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7456648 |
Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals
An output amplifier is provided for use in a bidirectional communications interface, for example, connecting a transmitter and a receiver to a transmission line. The output amplifier includes a...
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7456657 |
Common input/output terminal control circuit
A first data selection circuit selects a data signal among a plurality of data signals from a plurality of circuits, a first direction selection circuit selects a direction control signal of the...
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7453283 |
LVDS input circuit with connection to input of output driver
First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential...
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7453287 |
Switching power-supply circuit and semiconductor integrated circuit
A switching power-supply circuit generates a predetermined output voltage by controlling a first switching transistor connected to a power supply and a second switching transistor connected between...
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7446569 |
Line driving circuit of semiconductor device
Disclosed is a line driving circuit which includes two NMOS transistors in series between a supply voltage and a ground voltage. The output of the line driving circuit is applied to an interior...
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7446567 |
Signal transmission apparatus and interconnection structure
Apparatus for transmitting a digital signal within, for example, an integrated circuit includes a signal transmission line with a directional coupler at one or both ends. The directional coupler...
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7446568 |
Receiver start-up compensation circuit
An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access...
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7446576 |
Output driver with slew rate control
A circuit and method for controlling a slew rate of an output buffer. A pre-driver is provided that drives an input of an output pad driver of the output buffer. An output slew rate of the...
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7443202 |
Semiconductor device and electronic apparatus having the same
With an offset circuit including transistors of the same conductivity type, offset of an input signal is performed. Then, the input signal after the offset is supplied to a logic circuit including...
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7443201 |
Low voltage differential signaling receiver with a digital resistor unit and low voltage differential signaling interface system having the same
A low voltage differential signaling (LVDS) receiver includes a digital resistor unit configured to detect a voltage difference between a differential signal pair indicative of a digital signal, in...
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